#[repr(C)]pub struct RegisterBlock {Show 53 fields
pub verid: Reg<VERID_SPEC>,
pub param: Reg<PARAM_SPEC>,
pub ctrl: Reg<CTRL_SPEC>,
pub stat: Reg<STAT_SPEC>,
pub ie: Reg<IE_SPEC>,
pub de: Reg<DE_SPEC>,
pub cfg: Reg<CFG_SPEC>,
pub pause: Reg<PAUSE_SPEC>,
pub swtrig: Reg<SWTRIG_SPEC>,
pub tstat: Reg<TSTAT_SPEC>,
pub ofstrim: Reg<OFSTRIM_SPEC>,
pub tctrl: [Reg<TCTRL_SPEC>; 16],
pub fctrl: [Reg<FCTRL_SPEC>; 2],
pub gcc: [Reg<GCC_SPEC>; 2],
pub gcr: [Reg<GCR_SPEC>; 2],
pub cmdl1: Reg<CMDL1_SPEC>,
pub cmdh1: Reg<CMDH1_SPEC>,
pub cmdl2: Reg<CMDL2_SPEC>,
pub cmdh2: Reg<CMDH2_SPEC>,
pub cmdl3: Reg<CMDL3_SPEC>,
pub cmdh3: Reg<CMDH3_SPEC>,
pub cmdl4: Reg<CMDL4_SPEC>,
pub cmdh4: Reg<CMDH4_SPEC>,
pub cmdl5: Reg<CMDL5_SPEC>,
pub cmdh5: Reg<CMDH5_SPEC>,
pub cmdl6: Reg<CMDL6_SPEC>,
pub cmdh6: Reg<CMDH6_SPEC>,
pub cmdl7: Reg<CMDL7_SPEC>,
pub cmdh7: Reg<CMDH7_SPEC>,
pub cmdl8: Reg<CMDL8_SPEC>,
pub cmdh8: Reg<CMDH8_SPEC>,
pub cmdl9: Reg<CMDL9_SPEC>,
pub cmdh9: Reg<CMDH9_SPEC>,
pub cmdl10: Reg<CMDL10_SPEC>,
pub cmdh10: Reg<CMDH10_SPEC>,
pub cmdl11: Reg<CMDL11_SPEC>,
pub cmdh11: Reg<CMDH11_SPEC>,
pub cmdl12: Reg<CMDL12_SPEC>,
pub cmdh12: Reg<CMDH12_SPEC>,
pub cmdl13: Reg<CMDL13_SPEC>,
pub cmdh13: Reg<CMDH13_SPEC>,
pub cmdl14: Reg<CMDL14_SPEC>,
pub cmdh14: Reg<CMDH14_SPEC>,
pub cmdl15: Reg<CMDL15_SPEC>,
pub cmdh15: Reg<CMDH15_SPEC>,
pub cv1: Reg<CV_SPEC>,
pub cv2: Reg<CV_SPEC>,
pub cv3: Reg<CV_SPEC>,
pub cv4: Reg<CV_SPEC>,
pub resfifo: [Reg<RESFIFO_SPEC>; 2],
pub cal_gar: [Reg<CAL_GAR_SPEC>; 33],
pub cal_gbr: [Reg<CAL_GBR_SPEC>; 33],
pub tst: Reg<TST_SPEC>,
/* private fields */
}Expand description
Register block
Fields§
§verid: Reg<VERID_SPEC>0x00 - Version ID Register
param: Reg<PARAM_SPEC>0x04 - Parameter Register
ctrl: Reg<CTRL_SPEC>0x10 - ADC Control Register
stat: Reg<STAT_SPEC>0x14 - ADC Status Register
ie: Reg<IE_SPEC>0x18 - Interrupt Enable Register
de: Reg<DE_SPEC>0x1c - DMA Enable Register
cfg: Reg<CFG_SPEC>0x20 - ADC Configuration Register
pause: Reg<PAUSE_SPEC>0x24 - ADC Pause Register
swtrig: Reg<SWTRIG_SPEC>0x34 - Software Trigger Register
tstat: Reg<TSTAT_SPEC>0x38 - Trigger Status Register
ofstrim: Reg<OFSTRIM_SPEC>0x40 - ADC Offset Trim Register
tctrl: [Reg<TCTRL_SPEC>; 16]0xa0..0xe0 - Trigger Control Register
fctrl: [Reg<FCTRL_SPEC>; 2]0xe0..0xe8 - FIFO Control Register
gcc: [Reg<GCC_SPEC>; 2]0xf0..0xf8 - Gain Calibration Control
gcr: [Reg<GCR_SPEC>; 2]0xf8..0x100 - Gain Calculation Result
cmdl1: Reg<CMDL1_SPEC>0x100 - ADC Command Low Buffer Register
cmdh1: Reg<CMDH1_SPEC>0x104 - ADC Command High Buffer Register
cmdl2: Reg<CMDL2_SPEC>0x108 - ADC Command Low Buffer Register
cmdh2: Reg<CMDH2_SPEC>0x10c - ADC Command High Buffer Register
cmdl3: Reg<CMDL3_SPEC>0x110 - ADC Command Low Buffer Register
cmdh3: Reg<CMDH3_SPEC>0x114 - ADC Command High Buffer Register
cmdl4: Reg<CMDL4_SPEC>0x118 - ADC Command Low Buffer Register
cmdh4: Reg<CMDH4_SPEC>0x11c - ADC Command High Buffer Register
cmdl5: Reg<CMDL5_SPEC>0x120 - ADC Command Low Buffer Register
cmdh5: Reg<CMDH5_SPEC>0x124 - ADC Command High Buffer Register
cmdl6: Reg<CMDL6_SPEC>0x128 - ADC Command Low Buffer Register
cmdh6: Reg<CMDH6_SPEC>0x12c - ADC Command High Buffer Register
cmdl7: Reg<CMDL7_SPEC>0x130 - ADC Command Low Buffer Register
cmdh7: Reg<CMDH7_SPEC>0x134 - ADC Command High Buffer Register
cmdl8: Reg<CMDL8_SPEC>0x138 - ADC Command Low Buffer Register
cmdh8: Reg<CMDH8_SPEC>0x13c - ADC Command High Buffer Register
cmdl9: Reg<CMDL9_SPEC>0x140 - ADC Command Low Buffer Register
cmdh9: Reg<CMDH9_SPEC>0x144 - ADC Command High Buffer Register
cmdl10: Reg<CMDL10_SPEC>0x148 - ADC Command Low Buffer Register
cmdh10: Reg<CMDH10_SPEC>0x14c - ADC Command High Buffer Register
cmdl11: Reg<CMDL11_SPEC>0x150 - ADC Command Low Buffer Register
cmdh11: Reg<CMDH11_SPEC>0x154 - ADC Command High Buffer Register
cmdl12: Reg<CMDL12_SPEC>0x158 - ADC Command Low Buffer Register
cmdh12: Reg<CMDH12_SPEC>0x15c - ADC Command High Buffer Register
cmdl13: Reg<CMDL13_SPEC>0x160 - ADC Command Low Buffer Register
cmdh13: Reg<CMDH13_SPEC>0x164 - ADC Command High Buffer Register
cmdl14: Reg<CMDL14_SPEC>0x168 - ADC Command Low Buffer Register
cmdh14: Reg<CMDH14_SPEC>0x16c - ADC Command High Buffer Register
cmdl15: Reg<CMDL15_SPEC>0x170 - ADC Command Low Buffer Register
cmdh15: Reg<CMDH15_SPEC>0x174 - ADC Command High Buffer Register
cv1: Reg<CV_SPEC>0x200 - Compare Value Register
cv2: Reg<CV_SPEC>0x204 - Compare Value Register
cv3: Reg<CV_SPEC>0x208 - Compare Value Register
cv4: Reg<CV_SPEC>0x20c - Compare Value Register
resfifo: [Reg<RESFIFO_SPEC>; 2]0x300..0x308 - ADC Data Result FIFO Register
cal_gar: [Reg<CAL_GAR_SPEC>; 33]0x400..0x484 - Calibration General A-Side Registers
cal_gbr: [Reg<CAL_GBR_SPEC>; 33]0x500..0x584 - Calibration General B-Side Registers
tst: Reg<TST_SPEC>0xffc - ADC Test Register