Module lpc55_pac::i2c0::mstctl[−][src]

Master control register.

Structs

MSTCONTINUE_W

Field MSTCONTINUE writer - Master Continue. This bit is write-only.

MSTCTL_SPEC

Master control register.

MSTDMA_R

Field MSTDMA reader - Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write.

MSTDMA_W

Field MSTDMA writer - Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write.

MSTSTART_R

Field MSTSTART reader - Master Start control. This bit is write-only.

MSTSTART_W

Field MSTSTART writer - Master Start control. This bit is write-only.

MSTSTOP_R

Field MSTSTOP reader - Master Stop control. This bit is write-only.

MSTSTOP_W

Field MSTSTOP writer - Master Stop control. This bit is write-only.

R

Register MSTCTL reader

W

Register MSTCTL writer

Enums

MSTCONTINUE_AW

Master Continue. This bit is write-only.

MSTDMA_A

Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write.

MSTSTART_A

Master Start control. This bit is write-only.

MSTSTOP_A

Master Stop control. This bit is write-only.