Struct lpc55_pac::flash_cfpa0::dcfg_cc_socu_dflt::CPU1_DBGEN_W [−][src]
pub struct CPU1_DBGEN_W<'a> { /* fields omitted */ }
Field CPU1_DBGEN
writer - CPU1 (Micro cortex M33) invasive debug fixed state
Implementations
impl<'a> CPU1_DBGEN_W<'a>
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impl<'a> CPU1_DBGEN_W<'a>
[src]pub fn variant(self, variant: CPU1_DBGEN_A) -> &'a mut W
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Writes variant
to the field
pub fn disable(self) -> &'a mut W
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Disable
pub fn enable(self) -> &'a mut W
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Enable
pub fn set_bit(self) -> &'a mut W
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Sets the field bit
pub fn clear_bit(self) -> &'a mut W
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Clears the field bit
pub fn bit(self, value: bool) -> &'a mut W
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Writes raw bits to the field
Auto Trait Implementations
impl<'a> Send for CPU1_DBGEN_W<'a>
impl<'a> Send for CPU1_DBGEN_W<'a>
impl<'a> Sync for CPU1_DBGEN_W<'a>
impl<'a> Sync for CPU1_DBGEN_W<'a>
impl<'a> Unpin for CPU1_DBGEN_W<'a>
impl<'a> Unpin for CPU1_DBGEN_W<'a>