Enum lpc55_pac::flash_cfpa0::dcfg_cc_socu_dflt::CPU1_DBGEN_A [−][src]
pub enum CPU1_DBGEN_A { DISABLE, ENABLE, }
CPU1 (Micro cortex M33) invasive debug fixed state
Value on reset: 0
Variants
0: Disable
1: Enable
Trait Implementations
impl Clone for CPU1_DBGEN_A
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impl Clone for CPU1_DBGEN_A
[src]fn clone(&self) -> CPU1_DBGEN_A
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pub fn clone_from(&mut self, source: &Self)
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impl Copy for CPU1_DBGEN_A
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impl Copy for CPU1_DBGEN_A
[src]impl PartialEq<CPU1_DBGEN_A> for CPU1_DBGEN_A
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impl PartialEq<CPU1_DBGEN_A> for CPU1_DBGEN_A
[src]fn eq(&self, other: &CPU1_DBGEN_A) -> bool
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#[must_use]pub fn ne(&self, other: &Rhs) -> bool
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#[must_use]
pub fn ne(&self, other: &Rhs) -> boolimpl StructuralPartialEq for CPU1_DBGEN_A
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impl StructuralPartialEq for CPU1_DBGEN_A
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