Struct lpc43xx::usb0::usbcmd_d::R
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[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn rs(&self) -> RSR[src]
Bit 0 - Run/Stop
pub fn rst(&self) -> RSTR[src]
Bit 1 - Controller reset. Software uses this bit to reset the controller. This bit is set to zero by the Host/Device Controller when the reset process is complete. Software cannot terminate the reset process early by writing a zero to this register.
pub fn sutw(&self) -> SUTWR[src]
Bit 13 - Setup trip wire During handling a setup packet, this bit is used as a semaphore to ensure that the setup data payload of 8 bytes is extracted from a QH by the DCD without being corrupted. If the setup lockout mode is off (see USBMODE register) then there exists a hazard when new setup data arrives while the DCD is copying the setup data payload from the QH for a previous setup packet. This bit is set and cleared by software and will be cleared by hardware when a hazard exists. (See Section 18.10).
pub fn atdtw(&self) -> ATDTWR[src]
Bit 14 - Add dTD trip wire This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint's linked list. This bit is set and cleared by software during the process of adding a new dTD. See also Section 18.10. This bit shall also be cleared by hardware when its state machine is hazard region for which adding a dTD to a primed endpoint may go unrecognized.
pub fn itc(&self) -> ITCR[src]
Bits 16:23 - Interrupt threshold control. The system software uses this field to set the maximum rate at which the host/device controller will issue interrupts. ITC contains the maximum interrupt interval measured in micro-frames. Valid values are shown below. All other values are reserved. 0x0 = Immediate (no threshold) 0x1 = 1 micro frame. 0x2 = 2 micro frames. 0x8 = 8 micro frames. 0x10 = 16 micro frames. 0x20 = 32 micro frames. 0x40 = 64 micro frames.