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RegisterBlock

lpc1769::mcpwm

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 22 fields
    pub con: Reg<CON_SPEC>,
    pub con_set: Reg<CON_SET_SPEC>,
    pub con_clr: Reg<CON_CLR_SPEC>,
    pub capcon: Reg<CAPCON_SPEC>,
    pub capcon_set: Reg<CAPCON_SET_SPEC>,
    pub capcon_clr: Reg<CAPCON_CLR_SPEC>,
    pub tc: [Reg<TC_SPEC>; 3],
    pub lim: [Reg<LIM_SPEC>; 3],
    pub mat: [Reg<MAT_SPEC>; 3],
    pub dt: Reg<DT_SPEC>,
    pub cp: Reg<CP_SPEC>,
    pub cap: [Reg<CAP_SPEC>; 3],
    pub inten: Reg<INTEN_SPEC>,
    pub inten_set: Reg<INTEN_SET_SPEC>,
    pub inten_clr: Reg<INTEN_CLR_SPEC>,
    pub cntcon: Reg<CNTCON_SPEC>,
    pub cntcon_set: Reg<CNTCON_SET_SPEC>,
    pub cntcon_clr: Reg<CNTCON_CLR_SPEC>,
    pub intf: Reg<INTF_SPEC>,
    pub intf_set: Reg<INTF_SET_SPEC>,
    pub intf_clr: Reg<INTF_CLR_SPEC>,
    pub cap_clr: Reg<CAP_CLR_SPEC>,

}
Expand description

Register block

Fields§

§con: Reg<CON_SPEC>

0x00 - PWM Control read address

§con_set: Reg<CON_SET_SPEC>

0x04 - PWM Control set address

§con_clr: Reg<CON_CLR_SPEC>

0x08 - PWM Control clear address

§capcon: Reg<CAPCON_SPEC>

0x0c - Capture Control read address

§capcon_set: Reg<CAPCON_SET_SPEC>

0x10 - Capture Control set address

§capcon_clr: Reg<CAPCON_CLR_SPEC>

0x14 - Event Control clear address

§tc: [Reg<TC_SPEC>; 3]

0x18..0x24 - Timer Counter register

§lim: [Reg<LIM_SPEC>; 3]

0x24..0x30 - Limit register

§mat: [Reg<MAT_SPEC>; 3]

0x30..0x3c - Match register

§dt: Reg<DT_SPEC>

0x3c - Dead time register

§cp: Reg<CP_SPEC>

0x40 - Communication Pattern register

§cap: [Reg<CAP_SPEC>; 3]

0x44..0x50 - Capture register

§inten: Reg<INTEN_SPEC>

0x50 - Interrupt Enable read address

§inten_set: Reg<INTEN_SET_SPEC>

0x54 - Interrupt Enable set address

§inten_clr: Reg<INTEN_CLR_SPEC>

0x58 - Interrupt Enable clear address

§cntcon: Reg<CNTCON_SPEC>

0x5c - Count Control read address

§cntcon_set: Reg<CNTCON_SET_SPEC>

0x60 - Count Control set address

§cntcon_clr: Reg<CNTCON_CLR_SPEC>

0x64 - Count Control clear address

§intf: Reg<INTF_SPEC>

0x68 - Interrupt flags read address

§intf_set: Reg<INTF_SET_SPEC>

0x6c - Interrupt flags set address

§intf_clr: Reg<INTF_CLR_SPEC>

0x70 - Interrupt flags clear address

§cap_clr: Reg<CAP_CLR_SPEC>

0x74 - Capture clear address

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