Struct lpc13xx::ct32b0::bmcr::W
[−]
[src]
pub struct W { /* fields omitted */ }
Value to write to the register
Methods
impl W
[src]
pub fn reset_value() -> W
[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
[src]
Writes raw bits to the register
pub fn mr0i(&mut self) -> _MR0IW
[src]
Bit 0 - Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.
pub fn mr0r(&mut self) -> _MR0RW
[src]
Bit 1 - Reset on MR0: the TC will be reset if MR0 matches it.
pub fn mr0s(&mut self) -> _MR0SW
[src]
Bit 2 - Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.
pub fn mr1i(&mut self) -> _MR1IW
[src]
Bit 3 - Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.
pub fn mr1r(&mut self) -> _MR1RW
[src]
Bit 4 - Reset on MR1: the TC will be reset if MR1 matches it.
pub fn mr1s(&mut self) -> _MR1SW
[src]
Bit 5 - Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.
pub fn mr2i(&mut self) -> _MR2IW
[src]
Bit 6 - Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.
pub fn mr2r(&mut self) -> _MR2RW
[src]
Bit 7 - Reset on MR2: the TC will be reset if MR2 matches it.
pub fn mr2s(&mut self) -> _MR2SW
[src]
Bit 8 - Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.
pub fn mr3i(&mut self) -> _MR3IW
[src]
Bit 9 - Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.
pub fn mr3r(&mut self) -> _MR3RW
[src]
Bit 10 - Reset on MR3: the TC will be reset if MR3 matches it.
pub fn mr3s(&mut self) -> _MR3SW
[src]
Bit 11 - Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.