litex_hal/
timer.rs

1#[macro_export]
2macro_rules! timer {
3    ($(
4        $TIMERX:ident: $PACTIMERX:ty,
5    )+) => {
6        $(
7            #[derive(Debug)]
8            pub struct $TIMERX {
9                registers: $PACTIMERX,
10                pub sys_clk: u32,
11            }
12
13            impl $TIMERX {
14                pub fn new(registers: $PACTIMERX, sys_clk: u32) -> Self {
15                    Self { registers, sys_clk }
16                }
17
18                pub fn free(self) -> $PACTIMERX {
19                    self.registers
20                }
21            }
22
23            impl<UXX: core::convert::Into<u32>> $crate::hal::blocking::delay::DelayMs<UXX> for $TIMERX {
24                fn delay_ms(&mut self, ms: UXX) -> () {
25                    let value: u32 = self.sys_clk / 1_000 * ms.into();
26                    unsafe {
27                        self.registers.en().write(|w| w.bits(0));
28                        self.registers.reload().write(|w| w.bits(0));
29                        self.registers.load().write(|w| w.bits(value));
30                        self.registers.en().write(|w| w.bits(1));
31                        self.registers.update_value().write(|w| w.bits(1));
32                        while self.registers.value().read().bits() > 0 {
33                            self.registers.update_value().write(|w| w.bits(1));
34                        }
35                    }
36                }
37            }
38        )+
39    }
40}