Trait lis3dh_async::Lis3dhCore

pub trait Lis3dhCore {
    type BusError;
    type WriteRegisterFuture<'a>: Future<Output = Result<(), Error<Self::BusError>>> + 'a
    where
        Self: 'a;
    type ReadRegisterFuture<'a>: Future<Output = Result<u8, Error<Self::BusError>>> + 'a
    where
        Self: 'a;
    type ReadAccelBytesFuture<'a>: Future<Output = Result<[u8; 6], Error<Self::BusError>>> + 'a
    where
        Self: 'a;

    fn write_register(
        &mut self,
        register: Register,
        value: u8
    ) -> Self::WriteRegisterFuture<'_>;
    fn read_register(
        &mut self,
        register: Register
    ) -> Self::ReadRegisterFuture<'_>;
    fn read_accel_bytes(&mut self) -> Self::ReadAccelBytesFuture<'_>;
}

Required Associated Types

type BusError

type WriteRegisterFuture<'a>: Future<Output = Result<(), Error<Self::BusError>>> + 'a
where
    Self: 'a

type ReadRegisterFuture<'a>: Future<Output = Result<u8, Error<Self::BusError>>> + 'a
where
    Self: 'a

type ReadAccelBytesFuture<'a>: Future<Output = Result<[u8; 6], Error<Self::BusError>>> + 'a
where
    Self: 'a

Required Methods

fn write_register(
    &mut self,
    register: Register,
    value: u8
) -> Self::WriteRegisterFuture<'_>

fn read_register(&mut self, register: Register) -> Self::ReadRegisterFuture<'_>

fn read_accel_bytes(&mut self) -> Self::ReadAccelBytesFuture<'_>

Implementors

impl<CORE> Lis3dhCore for Lis3dh<CORE>where
    CORE: Lis3dhCore,

type BusError = <CORE as Lis3dhCore>::BusError

type WriteRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<(), Error<<Lis3dh<CORE> as Lis3dhCore>::BusError>>> + 'a

type ReadRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<u8, Error<<Lis3dh<CORE> as Lis3dhCore>::BusError>>> + 'a

type ReadAccelBytesFuture<'a>
where
    Self: 'a = impl Future<Output = Result<[u8; 6], Error<<Lis3dh<CORE> as Lis3dhCore>::BusError>>> + 'a

impl<I2C, E> Lis3dhCore for Lis3dhI2C<I2C>where
    I2C: I2c<Error = E>,

type BusError = E

type WriteRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<(), Error<<Lis3dhI2C<I2C> as Lis3dhCore>::BusError>>> + 'a

type ReadRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<u8, Error<<Lis3dhI2C<I2C> as Lis3dhCore>::BusError>>> + 'a

type ReadAccelBytesFuture<'a>
where
    Self: 'a = impl Future<Output = Result<[u8; 6], Error<<Lis3dhI2C<I2C> as Lis3dhCore>::BusError>>> + 'a

impl<SPI, ESPI> Lis3dhCore for Lis3dhSPI<SPI>where
    SPI: SpiDevice<Error = ESPI>,
    SPI::Bus: SpiBus + SpiBusWrite,

type BusError = ESPI

type WriteRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<(), Error<<Lis3dhSPI<SPI> as Lis3dhCore>::BusError>>> + 'a

type ReadRegisterFuture<'a>
where
    Self: 'a = impl Future<Output = Result<u8, Error<<Lis3dhSPI<SPI> as Lis3dhCore>::BusError>>> + 'a

type ReadAccelBytesFuture<'a>
where
    Self: 'a = impl Future<Output = Result<[u8; 6], Error<<Lis3dhSPI<SPI> as Lis3dhCore>::BusError>>> + 'a