[−][src]Struct lis2dh12::Lis2dh12
LIS2DH12
driver
Implementations
impl<I2C, E> Lis2dh12<I2C> where
I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
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I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
pub fn new(i2c: I2C, addr: SlaveAddr) -> Result<Self, Error<E>>
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Create a new LIS2DH12
driver from the given I2C
peripheral
pub fn destroy(self) -> I2C
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Destroy driver instance, return I2C
bus instance
pub fn get_device_id(&mut self) -> Result<u8, Error<E>>
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WHO_AM_I
register
pub fn set_mode(&mut self, mode: Mode) -> Result<(), Error<E>>
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Operating mode selection,
CTRL_REG1
: LPen
bit,
CTRL_REG4
: HR
bit
pub fn set_odr(&mut self, odr: Odr) -> Result<(), Error<E>>
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Data rate selection,
CTRL_REG1
: ODR
pub fn enable_axis(
&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
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&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
X,Y,Z-axis enable,
CTRL_REG1
: Xen
, Yen
, Zen
pub fn enable_i1_click(&mut self, enable: bool) -> Result<(), Error<E>>
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CLICK
interrupt on INT1
pin,
CTRL_REG3
: I1_CLICK
pub fn enable_i1_ia1(&mut self, enable: bool) -> Result<(), Error<E>>
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IA1
interrupt on INT1
pin,
CTRL_REG3
: I1_IA1
pub fn enable_i1_ia2(&mut self, enable: bool) -> Result<(), Error<E>>
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IA2
interrupt on INT1
pin,
CTRL_REG3
: I1_IA2
pub fn enable_i1_zyxda(&mut self, enable: bool) -> Result<(), Error<E>>
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ZYXDA
interrupt on INT1
pin,
CTRL_REG3
: I2_ZYXDA
pub fn enable_i1_wtm(&mut self, enable: bool) -> Result<(), Error<E>>
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FIFO watermark on INT1
pin,
CTRL_REG3
: I2_ZYXDA
pub fn enable_i1_overrun(&mut self, enable: bool) -> Result<(), Error<E>>
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FIFO overrun on INT1
pin,
CTRL_REG3
: I1_OVERRUN
pub fn set_bdu(&mut self, bdu: bool) -> Result<(), Error<E>>
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Block data update,
CTRL_REG4
: BDU
pub fn set_fs(&mut self, fs: FullScale) -> Result<(), Error<E>>
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Full-scale selection,
CTRL_REG4
: FS
pub fn reboot(&mut self, reboot: bool) -> Result<(), Error<E>>
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Reboot memory content,
CTRL_REG5
: BOOT
pub fn in_boot(&mut self) -> Result<bool, Error<E>>
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In boot,
CTRL_REG5
: BOOT
pub fn enable_fifo(&mut self, enable: bool) -> Result<(), Error<E>>
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FIFO enable,
CTRL_REG5
: FIFO_EN
pub fn enable_lir_int1(&mut self, latch: bool) -> Result<(), Error<E>>
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Latch interrupt request on INT1_SRC (31h),
with INT1_SRC (31h) register cleared by reading INT1_SRC (31h) itself,
CTRL_REG5
: LIR_INT1
pub fn enable_d4d_int1(&mut self, enable: bool) -> Result<(), Error<E>>
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4D enable: 4D detection is enabled on INT1 pin
when 6D bit on INT1_CFG (30h) is set to 1,
CTRL_REG5
: D4D_INT1
pub fn enable_lir_int2(&mut self, latch: bool) -> Result<(), Error<E>>
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Latch interrupt request on INT2_SRC (35h) register,
with INT2_SRC (35h) register cleared by reading INT2_SRC (35h) itself,
CTRL_REG5
: LIR_INT2
pub fn enable_d4d_int2(&mut self, enable: bool) -> Result<(), Error<E>>
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4D enable: 4D detection is enabled on INT2 pin
when 6D bit on INT2_CFG (34h) is set to 1,
CTRL_REG5
: D4D_INT2
pub fn enable_i2_click(&mut self, enable: bool) -> Result<(), Error<E>>
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CLICK
interrupt on INT2
pin,
CTRL_REG6
: I2_CLICK
pub fn enable_i2_ia1(&mut self, enable: bool) -> Result<(), Error<E>>
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IA1
interrupt on INT2
pin,
CTRL_REG6
: I2_IA1
pub fn enable_i2_ia2(&mut self, enable: bool) -> Result<(), Error<E>>
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IA2
interrupt on INT2
pin,
CTRL_REG6
: I2_IA2
pub fn enable_i2_boot(&mut self, enable: bool) -> Result<(), Error<E>>
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Boot interrupt on INT2
pin,
CTRL_REG6
: I2_BOOT
pub fn enable_i2_act(&mut self, enable: bool) -> Result<(), Error<E>>
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Activity interrupt on INT2
pin,
CTRL_REG6
: I2_ACT
pub fn set_int_polarity(&mut self, active_low: bool) -> Result<(), Error<E>>
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INT1/INT2 pin polarity,
CTRL_REG6
: INT_POLARITY
pub fn get_status(&mut self) -> Result<DataStatus, Error<E>>
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Data status,
STATUS_REG
: as
DataStatus {zyxor: ZYXOR
, xyzor: (XOR
, YOR
, ZOR
), zyxda: ZYXDA
, xyzda: (XDA
, YDA
, ZDA
)}
pub fn set_fm(&mut self, fm: FifoMode) -> Result<(), Error<E>>
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FIFO mode selection,
FIFO_CTRL_REG
: FM
pub fn set_fth(&mut self, fth: u8) -> Result<(), Error<E>>
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FIFO threshold,
FIFO_CTRL_REG
: FTH
pub fn disable_click(&mut self) -> Result<(), Error<E>>
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Disable click interrupt,
CLICK_CFG
clean all bits
pub fn enable_double_click(
&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
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&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
Enable interrupt double-click on X,Y,Z axis,
CLICK_CFG
: XD
, YD
, ZD
pub fn enable_single_click(
&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
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&mut self,
(x, y, z): (bool, bool, bool)
) -> Result<(), Error<E>>
Enable interrupt single-click on X,Y,Z axis,
CLICK_CFG
: XS
, YS
, ZS
pub fn get_click_src(
&mut self
) -> Result<Option<((bool, bool), bool, (bool, bool, bool))>, Error<E>>
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&mut self
) -> Result<Option<((bool, bool), bool, (bool, bool, bool))>, Error<E>>
Click source,
CLICK_SRC
decoded as ((DClick
, SClick
), Sign
, (X
, Y
, Z
))
pub fn enable_lir_click(&mut self, latch: bool) -> Result<(), Error<E>>
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If the LIR_Click bit is not set, the interrupt is kept high
for the duration of the latency window.
If the LIR_Click bit is set, the interrupt is kept high
until the CLICK_SRC (39h) register is read.
CLICK_THS
: LIR_Click
pub fn set_click_ths(&mut self, ths: u8) -> Result<(), Error<E>>
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Click threshold,
CLICK_THS
: Ths
pub fn set_click_thsf(&mut self, ths: f32) -> Result<(), Error<E>>
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Click threshold as f32,
CLICK_THS
: Ths
pub fn set_time_limit(&mut self, tli: u8) -> Result<(), Error<E>>
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Click time limit,
TIME_LIMIT
: TLI
pub fn set_time_latency(&mut self, tla: u8) -> Result<(), Error<E>>
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Click time latency,
TIME_LATENCY
: TLA
pub fn set_time_window(&mut self, tw: u8) -> Result<(), Error<E>>
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Click time window,
TIME_WINDOW
: TW
pub fn set_act_ths(&mut self, ths: u8) -> Result<(), Error<E>>
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Sleep-to-wake, return-to-sleep activation threshold in low-power mode,
ACT_THS
: Acth
pub fn set_act_thsf(&mut self, ths: f32) -> Result<(), Error<E>>
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Sleep-to-wake, return-to-sleep activation threshold as f32,
ACT_THS
: Acth
pub fn set_act_dur(&mut self, d: u8) -> Result<(), Error<E>>
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Sleep-to-wake, return-to-sleep duration,
ACT_DUR
: ActD
pub fn enable_temp(&mut self, enable: bool) -> Result<(), Error<E>>
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Temperature sensor enable,
TEMP_CFG_REG
: TEMP_EN
,
the BDU
bit in CTRL_REG4
is also set
pub fn get_temp_status(&mut self) -> Result<(bool, bool), Error<E>>
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Temperature data status,
STATUS_REG_AUX
: TOR
- Temperature data overrun,
TDA
- Temperature new data available
pub fn get_temp_out(&mut self) -> Result<(i8, u8), Error<E>>
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Temperature sensor data,
OUT_TEMP_H
, OUT_TEMP_L
pub fn get_temp_outf(&mut self) -> Result<f32, Error<E>>
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Temperature sensor data as float,
OUT_TEMP_H
, OUT_TEMP_L
converted to f32
pub fn set_ref(&mut self, reference: u8) -> Result<(), Error<E>>
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REFERENCE
register
pub fn get_ref(&mut self) -> Result<u8, Error<E>>
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REFERENCE
register
pub fn int1(&mut self) -> Int<Int1Regs, I2C>
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INT1
pub fn int2(&mut self) -> Int<Int2Regs, I2C>
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INT2
pub fn dump_regs<W>(&mut self, w: &mut W) -> Result<(), Error<E>> where
W: Write,
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W: Write,
Dump registers
Trait Implementations
impl<I2C, E> Accelerometer for Lis2dh12<I2C> where
I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
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I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
type Error = E
Error type
fn accel_norm(&mut self) -> Result<F32x3, Error<E>>
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Get normalized ±g reading from the accelerometer
fn sample_rate(&mut self) -> Result<f32, Error<Self::Error>>
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Get sample rate of accelerometer in Hz
impl<I2C, E> RawAccelerometer<I16x3> for Lis2dh12<I2C> where
I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
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I2C: WriteRead<Error = E> + Write<Error = E>,
E: Debug,
Auto Trait Implementations
impl<I2C> RefUnwindSafe for Lis2dh12<I2C> where
I2C: RefUnwindSafe,
I2C: RefUnwindSafe,
impl<I2C> Send for Lis2dh12<I2C> where
I2C: Send,
I2C: Send,
impl<I2C> Sync for Lis2dh12<I2C> where
I2C: Sync,
I2C: Sync,
impl<I2C> Unpin for Lis2dh12<I2C> where
I2C: Unpin,
I2C: Unpin,
impl<I2C> UnwindSafe for Lis2dh12<I2C> where
I2C: UnwindSafe,
I2C: UnwindSafe,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> Same<T> for T
type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,