Crate libreda_sta

== this crate is experimental and not stable for now ==

Incremental graph-based static timing analysis (STA) for the LibrEDA framework.

Timing analysis is performed on netlist data structures that implement the NetlistBase trait. This makes the STA algorithm easily portable.

The concept of timing, delays and constraints is abstracted by a set of traits. This architecture should allow to implement simple timing models such as the non-linear delay model (NDLM) and more complicated models (such as statistical models) in a consistent way.

Modules

• liberty_library
  Public modules Interface definitions for cell delay look-up as it is provided for example by Liberty libraries. Imports liberty data using the liberty-io crate.
• models
  Model implementations (cell delay and constraints, interconnect delays).
• traits
  Traits for abstracting timing models.

Structs

• ClockDefinition
  Definition of a clock source.
• ConstraintArcArg
  Public exports. Bundled arguments for specifying constraint arcs.
• DelayArcArg
  Public exports. Bundled arguments for specifying delay arcs.
• InputSignal
  Argument type for set_input_signal. This way of passing arguments allows to add other optional data without breaking API changes.
• SimpleSTA
  Simple static timing analysis engine.
• Timed
  Reference to STA engine in timed state.

Enums

• RiseFall
  Public exports. Type of a signal edge. Either rising (0->1), falling (1->0).
• SetupHold
  Public exports. Type of a timing constraint.
• SignalTransition
  Public exports. Type of a signal edge. Either rising (0->1), falling (1->0) or both of them.
• StaError
  Error during static timing analysis. This includes errors in the liberty library, mismatches between netlist and library or invalid netlists (drive conflicts, etc).
• StaMode
  Analysis mode.

Traits

• TimingLibrary
  Public exports. Query cell delays and setup/hold constraints.