Struct libreda_lefdef::lef_ast::RoutingLayer
source · pub struct RoutingLayer {Show 37 fields
pub name: String,
pub mask_num: Option<u32>,
pub direction: RoutingDirection,
pub pitch: (f64, f64),
pub diag_pitch: Option<(f64, f64)>,
pub width: f64,
pub offset: Option<(f64, f64)>,
pub diag_width: Option<f64>,
pub diag_spacing: Option<f64>,
pub diag_min_edge_length: Option<f64>,
pub min_area: Option<f64>,
pub min_size: Vec<(f64, f64)>,
pub min_step: (),
pub spacing: Vec<SpacingRules>,
pub spacing_table: Option<SpacingTable>,
pub wire_extension: Option<f64>,
pub minimum_cut: (),
pub max_width: Option<f64>,
pub min_width: Option<f64>,
pub min_enclosed_area: Vec<(f64, Option<f64>)>,
pub protrusion_width: (),
pub resistance: Option<f64>,
pub capacitance: Option<f64>,
pub height: Option<f64>,
pub thickness: Option<f64>,
pub shrinkage: Option<f64>,
pub cap_multiplier: u32,
pub edge_capacitance: Option<f64>,
pub minimum_density: Option<f64>,
pub maximum_density: Option<f64>,
pub density_check_window: Option<(f64, f64)>,
pub density_check_step: Option<f64>,
pub fill_active_spacing: Option<f64>,
pub antenna_rules: AntennaRules,
pub ac_current_density: Option<()>,
pub dc_current_density: Vec<(f64, f64)>,
pub properties: BTreeMap<String, PropertyValue>,
}Expand description
Design rules for a routing layer.
Fields§
§name: StringName of the routing layer.
mask_num: Option<u32>Number of masks used for double- or triple-patterning.
direction: RoutingDirectionPreferred routing direction.
pitch: (f64, f64)Routing pitch in x and y direction in microns.
diag_pitch: Option<(f64, f64)>Routing pitch for diagonal directions in microns.
width: f64Default wire width in microns.
offset: Option<(f64, f64)>§diag_width: Option<f64>Default width for diagonal wires in microns.
diag_spacing: Option<f64>Default spacing for diagonal wires in microns.
diag_min_edge_length: Option<f64>Minimum edge length for diagonal wires in microns.
min_area: Option<f64>Minimum area for shapes on this layer.
min_size: Vec<(f64, f64)>Minimal rectangles that must fit in each shape on this layer.
At least one needs to fit for each shape.
Tuples of (minimal width, minimal length).
min_step: ()Minimal edge length for shapes.
spacing: Vec<SpacingRules>Spacing rules.
spacing_table: Option<SpacingTable>Spacing tables for spacing between wires.
wire_extension: Option<f64>Length of extension of a wire over a via. The extension must be at least half of the wire width.
minimum_cut: ()Minimal number of cuts of a via depending on the width of the wire.
max_width: Option<f64>Maximum wire width in microns.
min_width: Option<f64>Minimum wire width in microns.
min_enclosed_area: Vec<(f64, Option<f64>)>Minimum area of holes in metal shapes.
(min area [um^2], width [um]) tuples.
If a width is specified the rule only applies if at least one of the wires around the hole
has a larger width.
protrusion_width: ()Width of a protrusion.
resistance: Option<f64>Sheet resistance [Ohm/square].
capacitance: Option<f64>Specify wire-to-ground capacitance per square unit in [pF/um^2].
height: Option<f64>Distance from top of ground plane to bottom of this interconnect layer.
thickness: Option<f64>Thickness of the layer in microns.
shrinkage: Option<f64>Amount of loss in width of wires caused by the etching process.
cap_multiplier: u32Account for increase in capacitance caused by close wires. Default is 1.
edge_capacitance: Option<f64>[pF/um].
minimum_density: Option<f64>Maximum allowed metal density in percent.
maximum_density: Option<f64>Minimum allowed metal density in percent.
density_check_window: Option<(f64, f64)>Length and width of the density check window.
density_check_step: Option<f64>Stepping distance for metal density checks.
fill_active_spacing: Option<f64>Spacing between metal fills and active geometries.
antenna_rules: AntennaRulesAntenna rule definitions.
ac_current_density: Option<()>AC current density information.
dc_current_density: Vec<(f64, f64)>Average DC current density information.
Stored as a (wire width, current density) table.
If only a default value is specified for all widths
it is stored as a single entry for wire width 0: (0, default_current_density).
Unit: [mA/um]
properties: BTreeMap<String, PropertyValue>Custom properties.
Trait Implementations§
source§impl Clone for RoutingLayer
impl Clone for RoutingLayer
source§fn clone(&self) -> RoutingLayer
fn clone(&self) -> RoutingLayer
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moresource§impl Debug for RoutingLayer
impl Debug for RoutingLayer
Auto Trait Implementations§
impl Freeze for RoutingLayer
impl RefUnwindSafe for RoutingLayer
impl Send for RoutingLayer
impl Sync for RoutingLayer
impl Unpin for RoutingLayer
impl UnwindSafe for RoutingLayer
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> IntoEither for T
impl<T> IntoEither for T
source§fn into_either(self, into_left: bool) -> Either<Self, Self>
fn into_either(self, into_left: bool) -> Either<Self, Self>
self into a Left variant of Either<Self, Self>
if into_left is true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read moresource§fn into_either_with<F>(self, into_left: F) -> Either<Self, Self>
fn into_either_with<F>(self, into_left: F) -> Either<Self, Self>
self into a Left variant of Either<Self, Self>
if into_left(&self) returns true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read more