Enum ClockDataOut 

#[repr(u8)]
pub enum ClockDataOut {
    MsbPos = 16,
    MsbNeg = 17,
    LsbPos = 24,
    LsbNeg = 25,
}

Modes for clocking data out of the FTDI device.

This is an argument to the clock_data_out method.

Variants

MsbPos = 16

Positive clock edge MSB first.

The data is sent MSB first.

The data will change to the next bit on the rising edge of the CLK pin.

MsbNeg = 17

Negative clock edge MSB first.

The data is sent MSB first.

The data will change to the next bit on the falling edge of the CLK pin.

LsbPos = 24

Positive clock edge LSB first.

The first bit in will be the LSB of the first byte and so on.

The data will change to the next bit on the rising edge of the CLK pin.

LsbNeg = 25

Negative clock edge LSB first.

The first bit in will be the LSB of the first byte and so on.

The data will change to the next bit on the falling edge of the CLK pin.

Trait Implementations

impl Clone for ClockDataOut

fn clone(&self) -> ClockDataOut

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ClockDataOut

impl Debug for ClockDataOut

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Eq for ClockDataOut

impl PartialEq for ClockDataOut

fn eq(&self, other: &ClockDataOut) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for ClockDataOut