Struct libafl_qemu::emu::CPUArchState
source · #[repr(C, align(16))]pub struct CPUArchState {Show 194 fields
pub regs: [u64; 16],
pub eip: u64,
pub eflags: u64,
pub cc_dst: u64,
pub cc_src: u64,
pub cc_src2: u64,
pub cc_op: u32,
pub df: i32,
pub hflags: u32,
pub hflags2: u32,
pub segs: [SegmentCache; 6],
pub ldt: SegmentCache,
pub tr: SegmentCache,
pub gdt: SegmentCache,
pub idt: SegmentCache,
pub cr: [u64; 5],
pub pdptrs_valid: bool,
pub pdptrs: [u64; 4],
pub a20_mask: i32,
pub bnd_regs: [BNDReg; 4],
pub bndcs_regs: BNDCSReg,
pub msr_bndcfgs: u64,
pub efer: u64,
pub start_init_save: CPUArchState__bindgen_ty_1,
pub fpstt: u32,
pub fpus: u16,
pub fpuc: u16,
pub fptags: [u8; 8],
pub fpregs: [FPReg; 8],
pub fpop: u16,
pub fpcs: u16,
pub fpds: u16,
pub fpip: u64,
pub fpdp: u64,
pub fp_status: float_status,
pub ft0: floatx80,
pub mmx_status: float_status,
pub sse_status: float_status,
pub mxcsr: u32,
pub __bindgen_padding_0: u64,
pub xmm_regs: [ZMMReg; 32],
pub xmm_t0: ZMMReg,
pub mmx_t0: MMXReg,
pub opmask_regs: [u64; 8],
pub xtilecfg: [u8; 64],
pub xtiledata: [u8; 8192],
pub sysenter_cs: u32,
pub sysenter_esp: u64,
pub sysenter_eip: u64,
pub star: u64,
pub vm_hsave: u64,
pub lstar: u64,
pub cstar: u64,
pub fmask: u64,
pub kernelgsbase: u64,
pub tsc_adjust: u64,
pub tsc_deadline: u64,
pub tsc_aux: u64,
pub xcr0: u64,
pub mcg_status: u64,
pub msr_ia32_misc_enable: u64,
pub msr_ia32_feature_control: u64,
pub msr_ia32_sgxlepubkeyhash: [u64; 4],
pub msr_fixed_ctr_ctrl: u64,
pub msr_global_ctrl: u64,
pub msr_global_status: u64,
pub msr_global_ovf_ctrl: u64,
pub msr_fixed_counters: [u64; 3],
pub msr_gp_counters: [u64; 18],
pub msr_gp_evtsel: [u64; 18],
pub pat: u64,
pub smbase: u32,
pub msr_smi_count: u64,
pub pkru: u32,
pub pkrs: u32,
pub tsx_ctrl: u32,
pub spec_ctrl: u64,
pub amd_tsc_scale_msr: u64,
pub virt_ssbd: u64,
pub end_init_save: CPUArchState__bindgen_ty_2,
pub system_time_msr: u64,
pub wall_clock_msr: u64,
pub steal_time_msr: u64,
pub async_pf_en_msr: u64,
pub async_pf_int_msr: u64,
pub pv_eoi_en_msr: u64,
pub poll_control_msr: u64,
pub msr_hv_hypercall: u64,
pub msr_hv_guest_os_id: u64,
pub msr_hv_tsc: u64,
pub msr_hv_syndbg_control: u64,
pub msr_hv_syndbg_status: u64,
pub msr_hv_syndbg_send_page: u64,
pub msr_hv_syndbg_recv_page: u64,
pub msr_hv_syndbg_pending_page: u64,
pub msr_hv_syndbg_options: u64,
pub msr_hv_vapic: u64,
pub msr_hv_crash_params: [u64; 5],
pub msr_hv_runtime: u64,
pub msr_hv_synic_control: u64,
pub msr_hv_synic_evt_page: u64,
pub msr_hv_synic_msg_page: u64,
pub msr_hv_synic_sint: [u64; 16],
pub msr_hv_stimer_config: [u64; 4],
pub msr_hv_stimer_count: [u64; 4],
pub msr_hv_reenlightenment_control: u64,
pub msr_hv_tsc_emulation_control: u64,
pub msr_hv_tsc_emulation_status: u64,
pub msr_rtit_ctrl: u64,
pub msr_rtit_status: u64,
pub msr_rtit_output_base: u64,
pub msr_rtit_output_mask: u64,
pub msr_rtit_cr3_match: u64,
pub msr_rtit_addrs: [u64; 8],
pub msr_xfd: u64,
pub msr_xfd_err: u64,
pub msr_lbr_ctl: u64,
pub msr_lbr_depth: u64,
pub lbr_records: [LBREntry; 32],
pub error_code: i32,
pub exception_is_int: i32,
pub exception_next_eip: u64,
pub dr: [u64; 8],
pub __bindgen_anon_1: CPUArchState__bindgen_ty_3,
pub old_exception: i32,
pub vm_vmcb: u64,
pub tsc_offset: u64,
pub intercept: u64,
pub intercept_cr_read: u16,
pub intercept_cr_write: u16,
pub intercept_dr_read: u16,
pub intercept_dr_write: u16,
pub intercept_exceptions: u32,
pub nested_cr3: u64,
pub nested_pg_mode: u32,
pub v_tpr: u8,
pub int_ctl: u32,
pub nmi_injected: u8,
pub nmi_pending: u8,
pub retaddr: usize,
pub end_reset_fields: CPUArchState__bindgen_ty_4,
pub cpuid_level_func7: u32,
pub cpuid_min_level_func7: u32,
pub cpuid_min_level: u32,
pub cpuid_min_xlevel: u32,
pub cpuid_min_xlevel2: u32,
pub cpuid_max_level: u32,
pub cpuid_max_xlevel: u32,
pub cpuid_max_xlevel2: u32,
pub cpuid_level: u32,
pub cpuid_xlevel: u32,
pub cpuid_xlevel2: u32,
pub cpuid_vendor1: u32,
pub cpuid_vendor2: u32,
pub cpuid_vendor3: u32,
pub cpuid_version: u32,
pub features: [u64; 36],
pub user_features: [u64; 36],
pub cpuid_model: [u32; 12],
pub cache_info_cpuid2: CPUCaches,
pub cache_info_cpuid4: CPUCaches,
pub cache_info_amd: CPUCaches,
pub mtrr_fixed: [u64; 11],
pub mtrr_deftype: u64,
pub mtrr_var: [MTRRVar; 8],
pub mp_state: u32,
pub exception_nr: i32,
pub interrupt_injected: i32,
pub soft_interrupt: u8,
pub exception_pending: u8,
pub exception_injected: u8,
pub has_error_code: u8,
pub exception_has_payload: u8,
pub exception_payload: u64,
pub triple_fault_pending: u8,
pub ins_len: u32,
pub sipi_vector: u32,
pub tsc_valid: bool,
pub tsc_khz: i64,
pub user_tsc_khz: i64,
pub apic_bus_freq: u64,
pub tsc: u64,
pub mcg_cap: u64,
pub mcg_ctl: u64,
pub mcg_ext_ctl: u64,
pub mce_banks: [u64; 40],
pub xstate_bv: u64,
pub fpus_vmstate: u16,
pub fptag_vmstate: u16,
pub fpregs_format_vmstate: u16,
pub xss: u64,
pub umwait: u32,
pub tpr_access_type: TPRAccess,
pub nr_dies: u32,
}
Fields§
§regs: [u64; 16]
§eip: u64
§eflags: u64
§cc_dst: u64
§cc_src: u64
§cc_src2: u64
§cc_op: u32
§df: i32
§hflags: u32
§hflags2: u32
§segs: [SegmentCache; 6]
§ldt: SegmentCache
§tr: SegmentCache
§gdt: SegmentCache
§idt: SegmentCache
§cr: [u64; 5]
§pdptrs_valid: bool
§pdptrs: [u64; 4]
§a20_mask: i32
§bnd_regs: [BNDReg; 4]
§bndcs_regs: BNDCSReg
§msr_bndcfgs: u64
§efer: u64
§start_init_save: CPUArchState__bindgen_ty_1
§fpstt: u32
§fpus: u16
§fpuc: u16
§fpregs: [FPReg; 8]
§fpop: u16
§fpcs: u16
§fpds: u16
§fpip: u64
§fpdp: u64
§fp_status: float_status
§ft0: floatx80
§mmx_status: float_status
§sse_status: float_status
§mxcsr: u32
§__bindgen_padding_0: u64
§xmm_regs: [ZMMReg; 32]
§xmm_t0: ZMMReg
§mmx_t0: MMXReg
§opmask_regs: [u64; 8]
§xtilecfg: [u8; 64]
§xtiledata: [u8; 8192]
§sysenter_cs: u32
§sysenter_esp: u64
§sysenter_eip: u64
§star: u64
§vm_hsave: u64
§lstar: u64
§cstar: u64
§fmask: u64
§kernelgsbase: u64
§tsc_adjust: u64
§tsc_deadline: u64
§tsc_aux: u64
§xcr0: u64
§mcg_status: u64
§msr_ia32_misc_enable: u64
§msr_ia32_feature_control: u64
§msr_ia32_sgxlepubkeyhash: [u64; 4]
§msr_fixed_ctr_ctrl: u64
§msr_global_ctrl: u64
§msr_global_status: u64
§msr_global_ovf_ctrl: u64
§msr_fixed_counters: [u64; 3]
§msr_gp_counters: [u64; 18]
§msr_gp_evtsel: [u64; 18]
§pat: u64
§smbase: u32
§msr_smi_count: u64
§pkru: u32
§pkrs: u32
§tsx_ctrl: u32
§spec_ctrl: u64
§amd_tsc_scale_msr: u64
§virt_ssbd: u64
§end_init_save: CPUArchState__bindgen_ty_2
§system_time_msr: u64
§wall_clock_msr: u64
§steal_time_msr: u64
§async_pf_en_msr: u64
§async_pf_int_msr: u64
§pv_eoi_en_msr: u64
§poll_control_msr: u64
§msr_hv_hypercall: u64
§msr_hv_guest_os_id: u64
§msr_hv_tsc: u64
§msr_hv_syndbg_control: u64
§msr_hv_syndbg_status: u64
§msr_hv_syndbg_send_page: u64
§msr_hv_syndbg_recv_page: u64
§msr_hv_syndbg_pending_page: u64
§msr_hv_syndbg_options: u64
§msr_hv_vapic: u64
§msr_hv_crash_params: [u64; 5]
§msr_hv_runtime: u64
§msr_hv_synic_control: u64
§msr_hv_synic_evt_page: u64
§msr_hv_synic_msg_page: u64
§msr_hv_synic_sint: [u64; 16]
§msr_hv_stimer_config: [u64; 4]
§msr_hv_stimer_count: [u64; 4]
§msr_hv_reenlightenment_control: u64
§msr_hv_tsc_emulation_control: u64
§msr_hv_tsc_emulation_status: u64
§msr_rtit_ctrl: u64
§msr_rtit_status: u64
§msr_rtit_output_base: u64
§msr_rtit_output_mask: u64
§msr_rtit_cr3_match: u64
§msr_rtit_addrs: [u64; 8]
§msr_xfd: u64
§msr_xfd_err: u64
§msr_lbr_ctl: u64
§msr_lbr_depth: u64
§lbr_records: [LBREntry; 32]
§error_code: i32
§exception_is_int: i32
§exception_next_eip: u64
§dr: [u64; 8]
§__bindgen_anon_1: CPUArchState__bindgen_ty_3
§old_exception: i32
§vm_vmcb: u64
§tsc_offset: u64
§intercept: u64
§intercept_cr_read: u16
§intercept_cr_write: u16
§intercept_dr_read: u16
§intercept_dr_write: u16
§intercept_exceptions: u32
§nested_cr3: u64
§nested_pg_mode: u32
§v_tpr: u8
§int_ctl: u32
§nmi_injected: u8
§nmi_pending: u8
§retaddr: usize
§end_reset_fields: CPUArchState__bindgen_ty_4
§cpuid_level_func7: u32
§cpuid_min_level_func7: u32
§cpuid_min_level: u32
§cpuid_min_xlevel: u32
§cpuid_min_xlevel2: u32
§cpuid_max_level: u32
§cpuid_max_xlevel: u32
§cpuid_max_xlevel2: u32
§cpuid_level: u32
§cpuid_xlevel: u32
§cpuid_xlevel2: u32
§cpuid_vendor1: u32
§cpuid_vendor2: u32
§cpuid_vendor3: u32
§cpuid_version: u32
§features: [u64; 36]
§user_features: [u64; 36]
§cpuid_model: [u32; 12]
§cache_info_cpuid2: CPUCaches
§cache_info_cpuid4: CPUCaches
§cache_info_amd: CPUCaches
§mtrr_fixed: [u64; 11]
§mtrr_deftype: u64
§mtrr_var: [MTRRVar; 8]
§mp_state: u32
§exception_nr: i32
§interrupt_injected: i32
§soft_interrupt: u8
§exception_pending: u8
§exception_injected: u8
§has_error_code: u8
§exception_has_payload: u8
§exception_payload: u64
§triple_fault_pending: u8
§ins_len: u32
§sipi_vector: u32
§tsc_valid: bool
§tsc_khz: i64
§user_tsc_khz: i64
§apic_bus_freq: u64
§tsc: u64
§mcg_cap: u64
§mcg_ctl: u64
§mcg_ext_ctl: u64
§mce_banks: [u64; 40]
§xstate_bv: u64
§fpus_vmstate: u16
§fptag_vmstate: u16
§fpregs_format_vmstate: u16
§xss: u64
§umwait: u32
§tpr_access_type: TPRAccess
§nr_dies: u32
Trait Implementations§
source§impl Clone for CPUArchState
impl Clone for CPUArchState
source§fn clone(&self) -> CPUArchState
fn clone(&self) -> CPUArchState
Returns a copy of the value. Read more
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from
source
. Read moresource§impl Debug for CPUArchState
impl Debug for CPUArchState
source§impl Default for CPUArchState
impl Default for CPUArchState
source§fn default() -> CPUArchState
fn default() -> CPUArchState
Returns the “default value” for a type. Read more
impl Copy for CPUArchState
Auto Trait Implementations§
impl RefUnwindSafe for CPUArchState
impl !Send for CPUArchState
impl !Sync for CPUArchState
impl Unpin for CPUArchState
impl UnwindSafe for CPUArchState
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§impl<Tail, T> Prepend<T> for Tail
impl<Tail, T> Prepend<T> for Tail
§type PreprendResult = Tail
type PreprendResult = Tail
The Resulting [
TupleList
], of an Prepend::prepend()
call,
including the prepended entry.source§fn prepend(self, value: T) -> (T, <Tail as Prepend<T>>::PreprendResult)
fn prepend(self, value: T) -> (T, <Tail as Prepend<T>>::PreprendResult)
Prepend a value to this tuple, returning a new tuple with prepended value.