pub enum AsmInstr {
Show 25 variants
ADD(Reg, Reg, ImmOrReg<5>),
AND(Reg, Reg, ImmOrReg<5>),
BR(CondCode, PCOffset<i16, 9>),
JMP(Reg),
JSR(PCOffset<i16, 11>),
JSRR(Reg),
LD(Reg, PCOffset<i16, 9>),
LDI(Reg, PCOffset<i16, 9>),
LDR(Reg, Reg, IOffset<6>),
LEA(Reg, PCOffset<i16, 9>),
NOT(Reg, Reg),
RET,
RTI,
ST(Reg, PCOffset<i16, 9>),
STI(Reg, PCOffset<i16, 9>),
STR(Reg, Reg, IOffset<6>),
TRAP(TrapVect8),
NOP(PCOffset<i16, 9>),
GETC,
OUT,
PUTC,
PUTS,
IN,
PUTSP,
HALT,
}Expand description
An enum representing all of the possible instructions in LC-3 assembly code.
The variants in this enum represent instructions before assembly passes.
For instructions that map to bytecode
(i.e., the hex representation of assembly instructions), refer to sim::SimInstr.
Variants§
ADD(Reg, Reg, ImmOrReg<5>)
An ADD instruction.
§Operation
Evaluates the two operands, adds them, and stores the result to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
ADD DR, SR1, SR2ADD DR, SR1, imm5
AND(Reg, Reg, ImmOrReg<5>)
An AND instruction.
§Operation
Evaluates the two operands, bitwise ANDs them, and stores the result to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
AND DR, SR1, SR2AND DR, SR1, imm5
BR(CondCode, PCOffset<i16, 9>)
A BR instruction.
§Operation
Checks the current condition code and branches to the given PCOffset9
if the condition code matches one of the provided condition codes of the instruction.
§Syntax
BR PCOffset9(equivalent toBRnzp),BRn PCOffset9BRz PCOffset9BRnz PCOffset9BRp PCOffset9BRnp PCOffset9BRzp PCOffset9BRnzp PCOffset9
JMP(Reg)
A JMP instruction.
§Operation
Unconditionally jumps to the location stored in the given register (BR).
§Syntax
JMP BR
JSR(PCOffset<i16, 11>)
A JSR instruction.
§Operation
Jumps to a given subroutine. This is done by storing the current PC into R7,
and then unconditionally jumping to the location of the given PCOffset11.
§Syntax
JSR PCOffset11
JSRR(Reg)
A JSRR instruction.
§Operation
Jumps to a given subroutine. This is done by storing the current PC into R7,
and then unconditionally jumping to the location stored in the given register (BR).
§Syntax
JSRR BR
LD(Reg, PCOffset<i16, 9>)
A LD instruction.
§Operation
Computes an effective address (PC + PCOffset9), accesses the memory at that address,
and stores it to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
LD DR, PCOffset9
LDI(Reg, PCOffset<i16, 9>)
A LDI instruction.
§Operation
Computes an effective address (mem[PC + PCOffset9]), accesses the memory at that address,
and stores it to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
LDI DR, PCOffset9
LDR(Reg, Reg, IOffset<6>)
A LDR instruction.
§Operation
Computes an effective address (mem[BR + offset6]), accesses the memory at that address,
and stores it to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
LDR DR, BR, offset6
LEA(Reg, PCOffset<i16, 9>)
A LEA instruction.
§Operation
Computes an effective address (PC + PCOffset9) and stores it to the destination register (DR).
§Syntax
LEA DR, PCOffset9
NOT(Reg, Reg)
A NOT instruction.
§Operation
Evaluates the operand, bitwise NOTs them, and stores the result to the destination register (DR).
This also sets the condition code for the LC-3 machine.
§Syntax
NOT DR, SR
RET
RTI
ST(Reg, PCOffset<i16, 9>)
A ST instruction.
§Operation
Computes an effective address (PC + PCOffset9), and writes the value from the source register (SR)
into the memory at that address,
§Syntax
ST SR, PCOffset9
STI(Reg, PCOffset<i16, 9>)
A STI instruction.
§Operation
Computes an effective address (mem[PC + PCOffset9]), and writes the value from the source register (SR)
into the memory at that address,
§Syntax
STI SR, PCOffset9
STR(Reg, Reg, IOffset<6>)
A STR instruction.
§Operation
Computes an effective address (mem[BR + offset6]), and writes the value from the source register (SR)
into the memory at that address,
§Syntax
STR SR, BR, offset6
TRAP(TrapVect8)
A TRAP instruction.
§Operation
Executes the trap with the given trap vector TrapVect8.
§Syntax
TRAP TrapVect8
NOP(PCOffset<i16, 9>)
A NOP instruction.
§Operation
Does nothing.
§Syntax
NOPNOP LABEL(label is computed, but not used)NOP #99
GETC
A GETC instruction.
§Operation
Gets a character from the keyboard, and store it into R0 (with the high 8 bits cleared).
This is an alias for TRAP x20.
§Syntax
GETC
OUT
An OUT instruction.
§Operation
Writes a character from R0[7:0] to the display. This is an alias for TRAP x21.
§Syntax
OUT
PUTC
A PUTC instruction.
§Operation
Writes a character from R0[7:0] to the display. This is an alias for TRAP x21.
§Syntax
PUTC
PUTS
A PUTS instruction.
§Operation
Prints characters in consecutive memory locations until a x00 character is read.
This starts with the memory location pointed to by the address in R0.
This is an alias for TRAP x22.
§Syntax
PUTS
IN
An IN instruction.
§Operation
Prompts the user for a character, stores the character into R0 (with the high 8 bits cleared).
Additionally, this prints the obtained character onto the display.
This is an alias for TRAP x23.
§Syntax
IN
PUTSP
A PUTSP instruction.
§Operation
Prints characters (two characters per memory location) until a x00 character is read.
This starts with the memory location pointed to by the address in R0.
This first prints the character in the low 8 bits, and then the character in the high 8 bits.
This is an alias for TRAP x24.
§Syntax
PUTSP