Enum ArchVariant 

pub enum ArchVariant {
    None,
    Riscv(RiscvIsa),
    Armv7(Armv7Variant),
    Aarch64(Aarch64Level),
    PowerPC64(PowerLevel),
    X86(X86CpuLevel),
}

The sub-architecture a target selected, for the families that have one.

Variants

None

The architecture has no sub-architecture axis, or the target named none.

Riscv(RiscvIsa)

Armv7(Armv7Variant)

Aarch64(Aarch64Level)

PowerPC64(PowerLevel)

X86(X86CpuLevel)

Implementations

impl ArchVariant

pub fn riscv(self) -> Option<RiscvIsa>

pub fn armv7(self) -> Option<Armv7Variant>

pub fn aarch64(self) -> Option<Aarch64Level>

pub fn x86(self) -> Option<X86CpuLevel>

pub fn refine(self, spec: ArchSpec) -> ArchSpec

The architecture’s spec as this variant refines it.

The single place a sub-architecture changes a property the architecture stated. A RISC-V ISA without d is the soft-float ABI, which takes a different ELF interpreter than the one the bare architecture names.

pub fn powerpc64(self) -> Option<PowerLevel>

Trait Implementations

impl Clone for ArchVariant

fn clone(&self) -> Self

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ArchVariant

impl Debug for ArchVariant

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for ArchVariant

fn default() -> Self

Returns the “default value” for a type.

impl Display for ArchVariant

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for ArchVariant

impl PartialEq for ArchVariant

fn eq(&self, other: &Self) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for ArchVariant