Struct kea_hal::spi::Spi

pub struct Spi<SPI, Disabled, Pins> { /* fields omitted */ }

Spi Peripheral Interface

Implementations

impl Spi<SPI0, Disabled, DefaultPins>

pub fn into_alt_pins(self) -> Spi<SPI0, Disabled, AltPins>

Change to alternate pins

pub fn enable_as_controller<T2, T3, T4, T5>(
    self,
    clock: PTB2<T2>,
    sdo: PTB3<T3>,
    sdi: PTB4<T4>,
    cs: Option<PTB5<T5>>,
    manage_cs: bool,
    mode: Mode
) -> Spi<SPI0, Controller, DefaultPins>

Enable SPI0 with default pins

pub fn enable_as_peripheral<T2, T3, T4, T5>(
    self,
    clock: PTB2<T2>,
    sdi: PTB3<T3>,
    sdo: PTB4<T4>,
    cs: PTB5<T5>,
    mode: Mode
) -> Spi<SPI0, Enabled<Peripheral>, DefaultPins>

Enable SPI0 in peripheral mode with Alternate Pins

impl Spi<SPI0, Disabled, AltPins>

pub fn enable_as_controller<T0, T1, T2, T3>(
    self,
    clock: PTE0<T0>,
    sdo: PTE1<T1>,
    sdi: PTE2<T2>,
    cs: Option<PTE3<T3>>,
    manage_cs: bool,
    mode: Mode
) -> Spi<SPI0, Controller, AltPins>

Enable SPI0 in controller mode with Alternate Pins

pub fn enable_as_peripheral<T0, T1, T2, T3>(
    self,
    clock: PTE0<T0>,
    sdi: PTE1<T1>,
    sdo: PTE2<T2>,
    cs: PTE3<T3>,
    mode: Mode
) -> Spi<SPI0, Enabled<Peripheral>, AltPins>

Enable SPI0 in peripheral mode with Alternate Pins

impl Spi<SPI1, Disabled, DefaultPins>

pub fn enable_as_controller<T0, T1, T2, T3>(
    self,
    clock: PTD0<T0>,
    sdo: PTD1<T1>,
    sdi: PTD2<T2>,
    cs: Option<PTD3<T3>>,
    manage_cs: bool,
    mode: Mode
) -> Spi<SPI1, Enabled<Controller>, DefaultPins>

Enable SPI1 as the controller with default pins

When manage_cs is set (and the cs pin has been provided) SPI1 will automatically drive the CS pin when doing SPI transfers. If manage_cs is not set, then this pin is used to detect if there is another Controller on the bus, which throws the Master Mode Fault flag

pub fn enable_as_peripheral<T0, T1, T2, T3>(
    self,
    clock: PTD0<T0>,
    sdi: PTD1<T1>,
    sdo: PTD2<T2>,
    cs: PTD3<T3>,
    mode: Mode
) -> Spi<SPI1, Enabled<Peripheral>, DefaultPins>

Enable SPI1 as peripheral with default pins

impl<Pins, Mode> Spi<SPI0, Enabled<Mode>, Pins>

pub fn set_baudrate(&self, baudrate: Hertz, bus_freq: Hertz)

Set the baud rate of transmission

This is only used when the MCU is the bus Controller. This relies on accurately inputting the bus frequency until a way to share the current bus frequency is worked out.

pub fn set_baudrate_divisor(&self, divisor: &BaudrateDivisor)

Set the baud rate by directly setting the divisor

pub fn baudrate_divisor(&self) -> BaudrateDivisor

Get the current baudrate divisor

pub fn mode_fault(&self) -> bool

Check if mode fault occured

impl<Mode, Pins> Spi<SPI0, Mode, Pins>

pub fn read_ready(&self) -> bool

Check if read buffer full (ready to read)

pub fn read_matches(&self) -> bool

Check if read matches value in match register

pub fn send_ready(&self) -> bool

Check if transmit buffer empty (ready to send)

pub fn set_hw_match(&self, value: u8)

Set the value for hardware read match

impl<Pins, Mode> Spi<SPI1, Enabled<Mode>, Pins>

pub fn set_baudrate(&self, baudrate: Hertz, bus_freq: Hertz)

Set the baud rate of transmission

This is only used when the MCU is the bus Controller. This relies on accurately inputting the bus frequency until a way to share the current bus frequency is worked out.

pub fn set_baudrate_divisor(&self, divisor: &BaudrateDivisor)

Set the baud rate by directly setting the divisor

pub fn baudrate_divisor(&self) -> BaudrateDivisor

Get the current baudrate divisor

pub fn mode_fault(&self) -> bool

Check if mode fault occured

impl<Mode, Pins> Spi<SPI1, Mode, Pins>

pub fn read_ready(&self) -> bool

Check if read buffer full (ready to read)

pub fn read_matches(&self) -> bool

Check if read matches value in match register

pub fn send_ready(&self) -> bool

Check if transmit buffer empty (ready to send)

pub fn set_hw_match(&self, value: u8)

Set the value for hardware read match

Trait Implementations

impl<Pins, Mode> FullDuplex<u8> for Spi<SPI0, Enabled<Mode>, Pins>

type Error = Infallible

An enumeration of SPI errors

fn read(&mut self) -> Result<u8, Self::Error>

Reads the word stored in the shift register

fn send(&mut self, word: u8) -> Result<(), Self::Error>

Sends a word to the slave

impl<Pins, Mode> FullDuplex<u8> for Spi<SPI1, Enabled<Mode>, Pins>

type Error = Infallible

An enumeration of SPI errors

fn read(&mut self) -> Result<u8, Self::Error>

Reads the word stored in the shift register

fn send(&mut self, word: u8) -> Result<(), Self::Error>

Sends a word to the slave