1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::SCGC6 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `FTF`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum FTFR {
48 #[doc = "Clock disabled"]
49 _0,
50 #[doc = "Clock enabled"]
51 _1,
52}
53impl FTFR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 FTFR::_0 => false,
69 FTFR::_1 => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> FTFR {
76 match value {
77 false => FTFR::_0,
78 true => FTFR::_1,
79 }
80 }
81 #[doc = "Checks if the value of the field is `_0`"]
82 #[inline]
83 pub fn is_0(&self) -> bool {
84 *self == FTFR::_0
85 }
86 #[doc = "Checks if the value of the field is `_1`"]
87 #[inline]
88 pub fn is_1(&self) -> bool {
89 *self == FTFR::_1
90 }
91}
92#[doc = "Possible values of the field `DMAMUX`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum DMAMUXR {
95 #[doc = "Clock disabled"]
96 _0,
97 #[doc = "Clock enabled"]
98 _1,
99}
100impl DMAMUXR {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 DMAMUXR::_0 => false,
116 DMAMUXR::_1 => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> DMAMUXR {
123 match value {
124 false => DMAMUXR::_0,
125 true => DMAMUXR::_1,
126 }
127 }
128 #[doc = "Checks if the value of the field is `_0`"]
129 #[inline]
130 pub fn is_0(&self) -> bool {
131 *self == DMAMUXR::_0
132 }
133 #[doc = "Checks if the value of the field is `_1`"]
134 #[inline]
135 pub fn is_1(&self) -> bool {
136 *self == DMAMUXR::_1
137 }
138}
139#[doc = "Possible values of the field `FLEXCAN0`"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum FLEXCAN0R {
142 #[doc = "Clock disabled"]
143 _0,
144 #[doc = "Clock enabled"]
145 _1,
146}
147impl FLEXCAN0R {
148 #[doc = r" Returns `true` if the bit is clear (0)"]
149 #[inline]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r" Returns `true` if the bit is set (1)"]
154 #[inline]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158 #[doc = r" Value of the field as raw bits"]
159 #[inline]
160 pub fn bit(&self) -> bool {
161 match *self {
162 FLEXCAN0R::_0 => false,
163 FLEXCAN0R::_1 => true,
164 }
165 }
166 #[allow(missing_docs)]
167 #[doc(hidden)]
168 #[inline]
169 pub fn _from(value: bool) -> FLEXCAN0R {
170 match value {
171 false => FLEXCAN0R::_0,
172 true => FLEXCAN0R::_1,
173 }
174 }
175 #[doc = "Checks if the value of the field is `_0`"]
176 #[inline]
177 pub fn is_0(&self) -> bool {
178 *self == FLEXCAN0R::_0
179 }
180 #[doc = "Checks if the value of the field is `_1`"]
181 #[inline]
182 pub fn is_1(&self) -> bool {
183 *self == FLEXCAN0R::_1
184 }
185}
186#[doc = r" Value of the field"]
187pub struct RNGAR {
188 bits: bool,
189}
190impl RNGAR {
191 #[doc = r" Value of the field as raw bits"]
192 #[inline]
193 pub fn bit(&self) -> bool {
194 self.bits
195 }
196 #[doc = r" Returns `true` if the bit is clear (0)"]
197 #[inline]
198 pub fn bit_is_clear(&self) -> bool {
199 !self.bit()
200 }
201 #[doc = r" Returns `true` if the bit is set (1)"]
202 #[inline]
203 pub fn bit_is_set(&self) -> bool {
204 self.bit()
205 }
206}
207#[doc = "Possible values of the field `SPI0`"]
208#[derive(Clone, Copy, Debug, PartialEq)]
209pub enum SPI0R {
210 #[doc = "Clock disabled"]
211 _0,
212 #[doc = "Clock enabled"]
213 _1,
214}
215impl SPI0R {
216 #[doc = r" Returns `true` if the bit is clear (0)"]
217 #[inline]
218 pub fn bit_is_clear(&self) -> bool {
219 !self.bit()
220 }
221 #[doc = r" Returns `true` if the bit is set (1)"]
222 #[inline]
223 pub fn bit_is_set(&self) -> bool {
224 self.bit()
225 }
226 #[doc = r" Value of the field as raw bits"]
227 #[inline]
228 pub fn bit(&self) -> bool {
229 match *self {
230 SPI0R::_0 => false,
231 SPI0R::_1 => true,
232 }
233 }
234 #[allow(missing_docs)]
235 #[doc(hidden)]
236 #[inline]
237 pub fn _from(value: bool) -> SPI0R {
238 match value {
239 false => SPI0R::_0,
240 true => SPI0R::_1,
241 }
242 }
243 #[doc = "Checks if the value of the field is `_0`"]
244 #[inline]
245 pub fn is_0(&self) -> bool {
246 *self == SPI0R::_0
247 }
248 #[doc = "Checks if the value of the field is `_1`"]
249 #[inline]
250 pub fn is_1(&self) -> bool {
251 *self == SPI0R::_1
252 }
253}
254#[doc = "Possible values of the field `SPI1`"]
255#[derive(Clone, Copy, Debug, PartialEq)]
256pub enum SPI1R {
257 #[doc = "Clock disabled"]
258 _0,
259 #[doc = "Clock enabled"]
260 _1,
261}
262impl SPI1R {
263 #[doc = r" Returns `true` if the bit is clear (0)"]
264 #[inline]
265 pub fn bit_is_clear(&self) -> bool {
266 !self.bit()
267 }
268 #[doc = r" Returns `true` if the bit is set (1)"]
269 #[inline]
270 pub fn bit_is_set(&self) -> bool {
271 self.bit()
272 }
273 #[doc = r" Value of the field as raw bits"]
274 #[inline]
275 pub fn bit(&self) -> bool {
276 match *self {
277 SPI1R::_0 => false,
278 SPI1R::_1 => true,
279 }
280 }
281 #[allow(missing_docs)]
282 #[doc(hidden)]
283 #[inline]
284 pub fn _from(value: bool) -> SPI1R {
285 match value {
286 false => SPI1R::_0,
287 true => SPI1R::_1,
288 }
289 }
290 #[doc = "Checks if the value of the field is `_0`"]
291 #[inline]
292 pub fn is_0(&self) -> bool {
293 *self == SPI1R::_0
294 }
295 #[doc = "Checks if the value of the field is `_1`"]
296 #[inline]
297 pub fn is_1(&self) -> bool {
298 *self == SPI1R::_1
299 }
300}
301#[doc = "Possible values of the field `I2S`"]
302#[derive(Clone, Copy, Debug, PartialEq)]
303pub enum I2SR {
304 #[doc = "Clock disabled"]
305 _0,
306 #[doc = "Clock enabled"]
307 _1,
308}
309impl I2SR {
310 #[doc = r" Returns `true` if the bit is clear (0)"]
311 #[inline]
312 pub fn bit_is_clear(&self) -> bool {
313 !self.bit()
314 }
315 #[doc = r" Returns `true` if the bit is set (1)"]
316 #[inline]
317 pub fn bit_is_set(&self) -> bool {
318 self.bit()
319 }
320 #[doc = r" Value of the field as raw bits"]
321 #[inline]
322 pub fn bit(&self) -> bool {
323 match *self {
324 I2SR::_0 => false,
325 I2SR::_1 => true,
326 }
327 }
328 #[allow(missing_docs)]
329 #[doc(hidden)]
330 #[inline]
331 pub fn _from(value: bool) -> I2SR {
332 match value {
333 false => I2SR::_0,
334 true => I2SR::_1,
335 }
336 }
337 #[doc = "Checks if the value of the field is `_0`"]
338 #[inline]
339 pub fn is_0(&self) -> bool {
340 *self == I2SR::_0
341 }
342 #[doc = "Checks if the value of the field is `_1`"]
343 #[inline]
344 pub fn is_1(&self) -> bool {
345 *self == I2SR::_1
346 }
347}
348#[doc = "Possible values of the field `CRC`"]
349#[derive(Clone, Copy, Debug, PartialEq)]
350pub enum CRCR {
351 #[doc = "Clock disabled"]
352 _0,
353 #[doc = "Clock enabled"]
354 _1,
355}
356impl CRCR {
357 #[doc = r" Returns `true` if the bit is clear (0)"]
358 #[inline]
359 pub fn bit_is_clear(&self) -> bool {
360 !self.bit()
361 }
362 #[doc = r" Returns `true` if the bit is set (1)"]
363 #[inline]
364 pub fn bit_is_set(&self) -> bool {
365 self.bit()
366 }
367 #[doc = r" Value of the field as raw bits"]
368 #[inline]
369 pub fn bit(&self) -> bool {
370 match *self {
371 CRCR::_0 => false,
372 CRCR::_1 => true,
373 }
374 }
375 #[allow(missing_docs)]
376 #[doc(hidden)]
377 #[inline]
378 pub fn _from(value: bool) -> CRCR {
379 match value {
380 false => CRCR::_0,
381 true => CRCR::_1,
382 }
383 }
384 #[doc = "Checks if the value of the field is `_0`"]
385 #[inline]
386 pub fn is_0(&self) -> bool {
387 *self == CRCR::_0
388 }
389 #[doc = "Checks if the value of the field is `_1`"]
390 #[inline]
391 pub fn is_1(&self) -> bool {
392 *self == CRCR::_1
393 }
394}
395#[doc = "Possible values of the field `USBDCD`"]
396#[derive(Clone, Copy, Debug, PartialEq)]
397pub enum USBDCDR {
398 #[doc = "Clock disabled"]
399 _0,
400 #[doc = "Clock enabled"]
401 _1,
402}
403impl USBDCDR {
404 #[doc = r" Returns `true` if the bit is clear (0)"]
405 #[inline]
406 pub fn bit_is_clear(&self) -> bool {
407 !self.bit()
408 }
409 #[doc = r" Returns `true` if the bit is set (1)"]
410 #[inline]
411 pub fn bit_is_set(&self) -> bool {
412 self.bit()
413 }
414 #[doc = r" Value of the field as raw bits"]
415 #[inline]
416 pub fn bit(&self) -> bool {
417 match *self {
418 USBDCDR::_0 => false,
419 USBDCDR::_1 => true,
420 }
421 }
422 #[allow(missing_docs)]
423 #[doc(hidden)]
424 #[inline]
425 pub fn _from(value: bool) -> USBDCDR {
426 match value {
427 false => USBDCDR::_0,
428 true => USBDCDR::_1,
429 }
430 }
431 #[doc = "Checks if the value of the field is `_0`"]
432 #[inline]
433 pub fn is_0(&self) -> bool {
434 *self == USBDCDR::_0
435 }
436 #[doc = "Checks if the value of the field is `_1`"]
437 #[inline]
438 pub fn is_1(&self) -> bool {
439 *self == USBDCDR::_1
440 }
441}
442#[doc = "Possible values of the field `PDB`"]
443#[derive(Clone, Copy, Debug, PartialEq)]
444pub enum PDBR {
445 #[doc = "Clock disabled"]
446 _0,
447 #[doc = "Clock enabled"]
448 _1,
449}
450impl PDBR {
451 #[doc = r" Returns `true` if the bit is clear (0)"]
452 #[inline]
453 pub fn bit_is_clear(&self) -> bool {
454 !self.bit()
455 }
456 #[doc = r" Returns `true` if the bit is set (1)"]
457 #[inline]
458 pub fn bit_is_set(&self) -> bool {
459 self.bit()
460 }
461 #[doc = r" Value of the field as raw bits"]
462 #[inline]
463 pub fn bit(&self) -> bool {
464 match *self {
465 PDBR::_0 => false,
466 PDBR::_1 => true,
467 }
468 }
469 #[allow(missing_docs)]
470 #[doc(hidden)]
471 #[inline]
472 pub fn _from(value: bool) -> PDBR {
473 match value {
474 false => PDBR::_0,
475 true => PDBR::_1,
476 }
477 }
478 #[doc = "Checks if the value of the field is `_0`"]
479 #[inline]
480 pub fn is_0(&self) -> bool {
481 *self == PDBR::_0
482 }
483 #[doc = "Checks if the value of the field is `_1`"]
484 #[inline]
485 pub fn is_1(&self) -> bool {
486 *self == PDBR::_1
487 }
488}
489#[doc = "Possible values of the field `PIT`"]
490#[derive(Clone, Copy, Debug, PartialEq)]
491pub enum PITR {
492 #[doc = "Clock disabled"]
493 _0,
494 #[doc = "Clock enabled"]
495 _1,
496}
497impl PITR {
498 #[doc = r" Returns `true` if the bit is clear (0)"]
499 #[inline]
500 pub fn bit_is_clear(&self) -> bool {
501 !self.bit()
502 }
503 #[doc = r" Returns `true` if the bit is set (1)"]
504 #[inline]
505 pub fn bit_is_set(&self) -> bool {
506 self.bit()
507 }
508 #[doc = r" Value of the field as raw bits"]
509 #[inline]
510 pub fn bit(&self) -> bool {
511 match *self {
512 PITR::_0 => false,
513 PITR::_1 => true,
514 }
515 }
516 #[allow(missing_docs)]
517 #[doc(hidden)]
518 #[inline]
519 pub fn _from(value: bool) -> PITR {
520 match value {
521 false => PITR::_0,
522 true => PITR::_1,
523 }
524 }
525 #[doc = "Checks if the value of the field is `_0`"]
526 #[inline]
527 pub fn is_0(&self) -> bool {
528 *self == PITR::_0
529 }
530 #[doc = "Checks if the value of the field is `_1`"]
531 #[inline]
532 pub fn is_1(&self) -> bool {
533 *self == PITR::_1
534 }
535}
536#[doc = "Possible values of the field `FTM0`"]
537#[derive(Clone, Copy, Debug, PartialEq)]
538pub enum FTM0R {
539 #[doc = "Clock disabled"]
540 _0,
541 #[doc = "Clock enabled"]
542 _1,
543}
544impl FTM0R {
545 #[doc = r" Returns `true` if the bit is clear (0)"]
546 #[inline]
547 pub fn bit_is_clear(&self) -> bool {
548 !self.bit()
549 }
550 #[doc = r" Returns `true` if the bit is set (1)"]
551 #[inline]
552 pub fn bit_is_set(&self) -> bool {
553 self.bit()
554 }
555 #[doc = r" Value of the field as raw bits"]
556 #[inline]
557 pub fn bit(&self) -> bool {
558 match *self {
559 FTM0R::_0 => false,
560 FTM0R::_1 => true,
561 }
562 }
563 #[allow(missing_docs)]
564 #[doc(hidden)]
565 #[inline]
566 pub fn _from(value: bool) -> FTM0R {
567 match value {
568 false => FTM0R::_0,
569 true => FTM0R::_1,
570 }
571 }
572 #[doc = "Checks if the value of the field is `_0`"]
573 #[inline]
574 pub fn is_0(&self) -> bool {
575 *self == FTM0R::_0
576 }
577 #[doc = "Checks if the value of the field is `_1`"]
578 #[inline]
579 pub fn is_1(&self) -> bool {
580 *self == FTM0R::_1
581 }
582}
583#[doc = "Possible values of the field `FTM1`"]
584#[derive(Clone, Copy, Debug, PartialEq)]
585pub enum FTM1R {
586 #[doc = "Clock disabled"]
587 _0,
588 #[doc = "Clock enabled"]
589 _1,
590}
591impl FTM1R {
592 #[doc = r" Returns `true` if the bit is clear (0)"]
593 #[inline]
594 pub fn bit_is_clear(&self) -> bool {
595 !self.bit()
596 }
597 #[doc = r" Returns `true` if the bit is set (1)"]
598 #[inline]
599 pub fn bit_is_set(&self) -> bool {
600 self.bit()
601 }
602 #[doc = r" Value of the field as raw bits"]
603 #[inline]
604 pub fn bit(&self) -> bool {
605 match *self {
606 FTM1R::_0 => false,
607 FTM1R::_1 => true,
608 }
609 }
610 #[allow(missing_docs)]
611 #[doc(hidden)]
612 #[inline]
613 pub fn _from(value: bool) -> FTM1R {
614 match value {
615 false => FTM1R::_0,
616 true => FTM1R::_1,
617 }
618 }
619 #[doc = "Checks if the value of the field is `_0`"]
620 #[inline]
621 pub fn is_0(&self) -> bool {
622 *self == FTM1R::_0
623 }
624 #[doc = "Checks if the value of the field is `_1`"]
625 #[inline]
626 pub fn is_1(&self) -> bool {
627 *self == FTM1R::_1
628 }
629}
630#[doc = "Possible values of the field `FTM2`"]
631#[derive(Clone, Copy, Debug, PartialEq)]
632pub enum FTM2R {
633 #[doc = "Clock disabled"]
634 _0,
635 #[doc = "Clock enabled"]
636 _1,
637}
638impl FTM2R {
639 #[doc = r" Returns `true` if the bit is clear (0)"]
640 #[inline]
641 pub fn bit_is_clear(&self) -> bool {
642 !self.bit()
643 }
644 #[doc = r" Returns `true` if the bit is set (1)"]
645 #[inline]
646 pub fn bit_is_set(&self) -> bool {
647 self.bit()
648 }
649 #[doc = r" Value of the field as raw bits"]
650 #[inline]
651 pub fn bit(&self) -> bool {
652 match *self {
653 FTM2R::_0 => false,
654 FTM2R::_1 => true,
655 }
656 }
657 #[allow(missing_docs)]
658 #[doc(hidden)]
659 #[inline]
660 pub fn _from(value: bool) -> FTM2R {
661 match value {
662 false => FTM2R::_0,
663 true => FTM2R::_1,
664 }
665 }
666 #[doc = "Checks if the value of the field is `_0`"]
667 #[inline]
668 pub fn is_0(&self) -> bool {
669 *self == FTM2R::_0
670 }
671 #[doc = "Checks if the value of the field is `_1`"]
672 #[inline]
673 pub fn is_1(&self) -> bool {
674 *self == FTM2R::_1
675 }
676}
677#[doc = "Possible values of the field `ADC0`"]
678#[derive(Clone, Copy, Debug, PartialEq)]
679pub enum ADC0R {
680 #[doc = "Clock disabled"]
681 _0,
682 #[doc = "Clock enabled"]
683 _1,
684}
685impl ADC0R {
686 #[doc = r" Returns `true` if the bit is clear (0)"]
687 #[inline]
688 pub fn bit_is_clear(&self) -> bool {
689 !self.bit()
690 }
691 #[doc = r" Returns `true` if the bit is set (1)"]
692 #[inline]
693 pub fn bit_is_set(&self) -> bool {
694 self.bit()
695 }
696 #[doc = r" Value of the field as raw bits"]
697 #[inline]
698 pub fn bit(&self) -> bool {
699 match *self {
700 ADC0R::_0 => false,
701 ADC0R::_1 => true,
702 }
703 }
704 #[allow(missing_docs)]
705 #[doc(hidden)]
706 #[inline]
707 pub fn _from(value: bool) -> ADC0R {
708 match value {
709 false => ADC0R::_0,
710 true => ADC0R::_1,
711 }
712 }
713 #[doc = "Checks if the value of the field is `_0`"]
714 #[inline]
715 pub fn is_0(&self) -> bool {
716 *self == ADC0R::_0
717 }
718 #[doc = "Checks if the value of the field is `_1`"]
719 #[inline]
720 pub fn is_1(&self) -> bool {
721 *self == ADC0R::_1
722 }
723}
724#[doc = "Possible values of the field `RTC`"]
725#[derive(Clone, Copy, Debug, PartialEq)]
726pub enum RTCR {
727 #[doc = "Access and interrupts disabled"]
728 _0,
729 #[doc = "Access and interrupts enabled"]
730 _1,
731}
732impl RTCR {
733 #[doc = r" Returns `true` if the bit is clear (0)"]
734 #[inline]
735 pub fn bit_is_clear(&self) -> bool {
736 !self.bit()
737 }
738 #[doc = r" Returns `true` if the bit is set (1)"]
739 #[inline]
740 pub fn bit_is_set(&self) -> bool {
741 self.bit()
742 }
743 #[doc = r" Value of the field as raw bits"]
744 #[inline]
745 pub fn bit(&self) -> bool {
746 match *self {
747 RTCR::_0 => false,
748 RTCR::_1 => true,
749 }
750 }
751 #[allow(missing_docs)]
752 #[doc(hidden)]
753 #[inline]
754 pub fn _from(value: bool) -> RTCR {
755 match value {
756 false => RTCR::_0,
757 true => RTCR::_1,
758 }
759 }
760 #[doc = "Checks if the value of the field is `_0`"]
761 #[inline]
762 pub fn is_0(&self) -> bool {
763 *self == RTCR::_0
764 }
765 #[doc = "Checks if the value of the field is `_1`"]
766 #[inline]
767 pub fn is_1(&self) -> bool {
768 *self == RTCR::_1
769 }
770}
771#[doc = "Possible values of the field `DAC0`"]
772#[derive(Clone, Copy, Debug, PartialEq)]
773pub enum DAC0R {
774 #[doc = "Clock disabled"]
775 _0,
776 #[doc = "Clock enabled"]
777 _1,
778}
779impl DAC0R {
780 #[doc = r" Returns `true` if the bit is clear (0)"]
781 #[inline]
782 pub fn bit_is_clear(&self) -> bool {
783 !self.bit()
784 }
785 #[doc = r" Returns `true` if the bit is set (1)"]
786 #[inline]
787 pub fn bit_is_set(&self) -> bool {
788 self.bit()
789 }
790 #[doc = r" Value of the field as raw bits"]
791 #[inline]
792 pub fn bit(&self) -> bool {
793 match *self {
794 DAC0R::_0 => false,
795 DAC0R::_1 => true,
796 }
797 }
798 #[allow(missing_docs)]
799 #[doc(hidden)]
800 #[inline]
801 pub fn _from(value: bool) -> DAC0R {
802 match value {
803 false => DAC0R::_0,
804 true => DAC0R::_1,
805 }
806 }
807 #[doc = "Checks if the value of the field is `_0`"]
808 #[inline]
809 pub fn is_0(&self) -> bool {
810 *self == DAC0R::_0
811 }
812 #[doc = "Checks if the value of the field is `_1`"]
813 #[inline]
814 pub fn is_1(&self) -> bool {
815 *self == DAC0R::_1
816 }
817}
818#[doc = "Values that can be written to the field `FTF`"]
819pub enum FTFW {
820 #[doc = "Clock disabled"]
821 _0,
822 #[doc = "Clock enabled"]
823 _1,
824}
825impl FTFW {
826 #[allow(missing_docs)]
827 #[doc(hidden)]
828 #[inline]
829 pub fn _bits(&self) -> bool {
830 match *self {
831 FTFW::_0 => false,
832 FTFW::_1 => true,
833 }
834 }
835}
836#[doc = r" Proxy"]
837pub struct _FTFW<'a> {
838 w: &'a mut W,
839}
840impl<'a> _FTFW<'a> {
841 #[doc = r" Writes `variant` to the field"]
842 #[inline]
843 pub fn variant(self, variant: FTFW) -> &'a mut W {
844 {
845 self.bit(variant._bits())
846 }
847 }
848 #[doc = "Clock disabled"]
849 #[inline]
850 pub fn _0(self) -> &'a mut W {
851 self.variant(FTFW::_0)
852 }
853 #[doc = "Clock enabled"]
854 #[inline]
855 pub fn _1(self) -> &'a mut W {
856 self.variant(FTFW::_1)
857 }
858 #[doc = r" Sets the field bit"]
859 pub fn set_bit(self) -> &'a mut W {
860 self.bit(true)
861 }
862 #[doc = r" Clears the field bit"]
863 pub fn clear_bit(self) -> &'a mut W {
864 self.bit(false)
865 }
866 #[doc = r" Writes raw bits to the field"]
867 #[inline]
868 pub fn bit(self, value: bool) -> &'a mut W {
869 const MASK: bool = true;
870 const OFFSET: u8 = 0;
871 self.w.bits &= !((MASK as u32) << OFFSET);
872 self.w.bits |= ((value & MASK) as u32) << OFFSET;
873 self.w
874 }
875}
876#[doc = "Values that can be written to the field `DMAMUX`"]
877pub enum DMAMUXW {
878 #[doc = "Clock disabled"]
879 _0,
880 #[doc = "Clock enabled"]
881 _1,
882}
883impl DMAMUXW {
884 #[allow(missing_docs)]
885 #[doc(hidden)]
886 #[inline]
887 pub fn _bits(&self) -> bool {
888 match *self {
889 DMAMUXW::_0 => false,
890 DMAMUXW::_1 => true,
891 }
892 }
893}
894#[doc = r" Proxy"]
895pub struct _DMAMUXW<'a> {
896 w: &'a mut W,
897}
898impl<'a> _DMAMUXW<'a> {
899 #[doc = r" Writes `variant` to the field"]
900 #[inline]
901 pub fn variant(self, variant: DMAMUXW) -> &'a mut W {
902 {
903 self.bit(variant._bits())
904 }
905 }
906 #[doc = "Clock disabled"]
907 #[inline]
908 pub fn _0(self) -> &'a mut W {
909 self.variant(DMAMUXW::_0)
910 }
911 #[doc = "Clock enabled"]
912 #[inline]
913 pub fn _1(self) -> &'a mut W {
914 self.variant(DMAMUXW::_1)
915 }
916 #[doc = r" Sets the field bit"]
917 pub fn set_bit(self) -> &'a mut W {
918 self.bit(true)
919 }
920 #[doc = r" Clears the field bit"]
921 pub fn clear_bit(self) -> &'a mut W {
922 self.bit(false)
923 }
924 #[doc = r" Writes raw bits to the field"]
925 #[inline]
926 pub fn bit(self, value: bool) -> &'a mut W {
927 const MASK: bool = true;
928 const OFFSET: u8 = 1;
929 self.w.bits &= !((MASK as u32) << OFFSET);
930 self.w.bits |= ((value & MASK) as u32) << OFFSET;
931 self.w
932 }
933}
934#[doc = "Values that can be written to the field `FLEXCAN0`"]
935pub enum FLEXCAN0W {
936 #[doc = "Clock disabled"]
937 _0,
938 #[doc = "Clock enabled"]
939 _1,
940}
941impl FLEXCAN0W {
942 #[allow(missing_docs)]
943 #[doc(hidden)]
944 #[inline]
945 pub fn _bits(&self) -> bool {
946 match *self {
947 FLEXCAN0W::_0 => false,
948 FLEXCAN0W::_1 => true,
949 }
950 }
951}
952#[doc = r" Proxy"]
953pub struct _FLEXCAN0W<'a> {
954 w: &'a mut W,
955}
956impl<'a> _FLEXCAN0W<'a> {
957 #[doc = r" Writes `variant` to the field"]
958 #[inline]
959 pub fn variant(self, variant: FLEXCAN0W) -> &'a mut W {
960 {
961 self.bit(variant._bits())
962 }
963 }
964 #[doc = "Clock disabled"]
965 #[inline]
966 pub fn _0(self) -> &'a mut W {
967 self.variant(FLEXCAN0W::_0)
968 }
969 #[doc = "Clock enabled"]
970 #[inline]
971 pub fn _1(self) -> &'a mut W {
972 self.variant(FLEXCAN0W::_1)
973 }
974 #[doc = r" Sets the field bit"]
975 pub fn set_bit(self) -> &'a mut W {
976 self.bit(true)
977 }
978 #[doc = r" Clears the field bit"]
979 pub fn clear_bit(self) -> &'a mut W {
980 self.bit(false)
981 }
982 #[doc = r" Writes raw bits to the field"]
983 #[inline]
984 pub fn bit(self, value: bool) -> &'a mut W {
985 const MASK: bool = true;
986 const OFFSET: u8 = 4;
987 self.w.bits &= !((MASK as u32) << OFFSET);
988 self.w.bits |= ((value & MASK) as u32) << OFFSET;
989 self.w
990 }
991}
992#[doc = r" Proxy"]
993pub struct _RNGAW<'a> {
994 w: &'a mut W,
995}
996impl<'a> _RNGAW<'a> {
997 #[doc = r" Sets the field bit"]
998 pub fn set_bit(self) -> &'a mut W {
999 self.bit(true)
1000 }
1001 #[doc = r" Clears the field bit"]
1002 pub fn clear_bit(self) -> &'a mut W {
1003 self.bit(false)
1004 }
1005 #[doc = r" Writes raw bits to the field"]
1006 #[inline]
1007 pub fn bit(self, value: bool) -> &'a mut W {
1008 const MASK: bool = true;
1009 const OFFSET: u8 = 9;
1010 self.w.bits &= !((MASK as u32) << OFFSET);
1011 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1012 self.w
1013 }
1014}
1015#[doc = "Values that can be written to the field `SPI0`"]
1016pub enum SPI0W {
1017 #[doc = "Clock disabled"]
1018 _0,
1019 #[doc = "Clock enabled"]
1020 _1,
1021}
1022impl SPI0W {
1023 #[allow(missing_docs)]
1024 #[doc(hidden)]
1025 #[inline]
1026 pub fn _bits(&self) -> bool {
1027 match *self {
1028 SPI0W::_0 => false,
1029 SPI0W::_1 => true,
1030 }
1031 }
1032}
1033#[doc = r" Proxy"]
1034pub struct _SPI0W<'a> {
1035 w: &'a mut W,
1036}
1037impl<'a> _SPI0W<'a> {
1038 #[doc = r" Writes `variant` to the field"]
1039 #[inline]
1040 pub fn variant(self, variant: SPI0W) -> &'a mut W {
1041 {
1042 self.bit(variant._bits())
1043 }
1044 }
1045 #[doc = "Clock disabled"]
1046 #[inline]
1047 pub fn _0(self) -> &'a mut W {
1048 self.variant(SPI0W::_0)
1049 }
1050 #[doc = "Clock enabled"]
1051 #[inline]
1052 pub fn _1(self) -> &'a mut W {
1053 self.variant(SPI0W::_1)
1054 }
1055 #[doc = r" Sets the field bit"]
1056 pub fn set_bit(self) -> &'a mut W {
1057 self.bit(true)
1058 }
1059 #[doc = r" Clears the field bit"]
1060 pub fn clear_bit(self) -> &'a mut W {
1061 self.bit(false)
1062 }
1063 #[doc = r" Writes raw bits to the field"]
1064 #[inline]
1065 pub fn bit(self, value: bool) -> &'a mut W {
1066 const MASK: bool = true;
1067 const OFFSET: u8 = 12;
1068 self.w.bits &= !((MASK as u32) << OFFSET);
1069 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1070 self.w
1071 }
1072}
1073#[doc = "Values that can be written to the field `SPI1`"]
1074pub enum SPI1W {
1075 #[doc = "Clock disabled"]
1076 _0,
1077 #[doc = "Clock enabled"]
1078 _1,
1079}
1080impl SPI1W {
1081 #[allow(missing_docs)]
1082 #[doc(hidden)]
1083 #[inline]
1084 pub fn _bits(&self) -> bool {
1085 match *self {
1086 SPI1W::_0 => false,
1087 SPI1W::_1 => true,
1088 }
1089 }
1090}
1091#[doc = r" Proxy"]
1092pub struct _SPI1W<'a> {
1093 w: &'a mut W,
1094}
1095impl<'a> _SPI1W<'a> {
1096 #[doc = r" Writes `variant` to the field"]
1097 #[inline]
1098 pub fn variant(self, variant: SPI1W) -> &'a mut W {
1099 {
1100 self.bit(variant._bits())
1101 }
1102 }
1103 #[doc = "Clock disabled"]
1104 #[inline]
1105 pub fn _0(self) -> &'a mut W {
1106 self.variant(SPI1W::_0)
1107 }
1108 #[doc = "Clock enabled"]
1109 #[inline]
1110 pub fn _1(self) -> &'a mut W {
1111 self.variant(SPI1W::_1)
1112 }
1113 #[doc = r" Sets the field bit"]
1114 pub fn set_bit(self) -> &'a mut W {
1115 self.bit(true)
1116 }
1117 #[doc = r" Clears the field bit"]
1118 pub fn clear_bit(self) -> &'a mut W {
1119 self.bit(false)
1120 }
1121 #[doc = r" Writes raw bits to the field"]
1122 #[inline]
1123 pub fn bit(self, value: bool) -> &'a mut W {
1124 const MASK: bool = true;
1125 const OFFSET: u8 = 13;
1126 self.w.bits &= !((MASK as u32) << OFFSET);
1127 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1128 self.w
1129 }
1130}
1131#[doc = "Values that can be written to the field `I2S`"]
1132pub enum I2SW {
1133 #[doc = "Clock disabled"]
1134 _0,
1135 #[doc = "Clock enabled"]
1136 _1,
1137}
1138impl I2SW {
1139 #[allow(missing_docs)]
1140 #[doc(hidden)]
1141 #[inline]
1142 pub fn _bits(&self) -> bool {
1143 match *self {
1144 I2SW::_0 => false,
1145 I2SW::_1 => true,
1146 }
1147 }
1148}
1149#[doc = r" Proxy"]
1150pub struct _I2SW<'a> {
1151 w: &'a mut W,
1152}
1153impl<'a> _I2SW<'a> {
1154 #[doc = r" Writes `variant` to the field"]
1155 #[inline]
1156 pub fn variant(self, variant: I2SW) -> &'a mut W {
1157 {
1158 self.bit(variant._bits())
1159 }
1160 }
1161 #[doc = "Clock disabled"]
1162 #[inline]
1163 pub fn _0(self) -> &'a mut W {
1164 self.variant(I2SW::_0)
1165 }
1166 #[doc = "Clock enabled"]
1167 #[inline]
1168 pub fn _1(self) -> &'a mut W {
1169 self.variant(I2SW::_1)
1170 }
1171 #[doc = r" Sets the field bit"]
1172 pub fn set_bit(self) -> &'a mut W {
1173 self.bit(true)
1174 }
1175 #[doc = r" Clears the field bit"]
1176 pub fn clear_bit(self) -> &'a mut W {
1177 self.bit(false)
1178 }
1179 #[doc = r" Writes raw bits to the field"]
1180 #[inline]
1181 pub fn bit(self, value: bool) -> &'a mut W {
1182 const MASK: bool = true;
1183 const OFFSET: u8 = 15;
1184 self.w.bits &= !((MASK as u32) << OFFSET);
1185 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1186 self.w
1187 }
1188}
1189#[doc = "Values that can be written to the field `CRC`"]
1190pub enum CRCW {
1191 #[doc = "Clock disabled"]
1192 _0,
1193 #[doc = "Clock enabled"]
1194 _1,
1195}
1196impl CRCW {
1197 #[allow(missing_docs)]
1198 #[doc(hidden)]
1199 #[inline]
1200 pub fn _bits(&self) -> bool {
1201 match *self {
1202 CRCW::_0 => false,
1203 CRCW::_1 => true,
1204 }
1205 }
1206}
1207#[doc = r" Proxy"]
1208pub struct _CRCW<'a> {
1209 w: &'a mut W,
1210}
1211impl<'a> _CRCW<'a> {
1212 #[doc = r" Writes `variant` to the field"]
1213 #[inline]
1214 pub fn variant(self, variant: CRCW) -> &'a mut W {
1215 {
1216 self.bit(variant._bits())
1217 }
1218 }
1219 #[doc = "Clock disabled"]
1220 #[inline]
1221 pub fn _0(self) -> &'a mut W {
1222 self.variant(CRCW::_0)
1223 }
1224 #[doc = "Clock enabled"]
1225 #[inline]
1226 pub fn _1(self) -> &'a mut W {
1227 self.variant(CRCW::_1)
1228 }
1229 #[doc = r" Sets the field bit"]
1230 pub fn set_bit(self) -> &'a mut W {
1231 self.bit(true)
1232 }
1233 #[doc = r" Clears the field bit"]
1234 pub fn clear_bit(self) -> &'a mut W {
1235 self.bit(false)
1236 }
1237 #[doc = r" Writes raw bits to the field"]
1238 #[inline]
1239 pub fn bit(self, value: bool) -> &'a mut W {
1240 const MASK: bool = true;
1241 const OFFSET: u8 = 18;
1242 self.w.bits &= !((MASK as u32) << OFFSET);
1243 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1244 self.w
1245 }
1246}
1247#[doc = "Values that can be written to the field `USBDCD`"]
1248pub enum USBDCDW {
1249 #[doc = "Clock disabled"]
1250 _0,
1251 #[doc = "Clock enabled"]
1252 _1,
1253}
1254impl USBDCDW {
1255 #[allow(missing_docs)]
1256 #[doc(hidden)]
1257 #[inline]
1258 pub fn _bits(&self) -> bool {
1259 match *self {
1260 USBDCDW::_0 => false,
1261 USBDCDW::_1 => true,
1262 }
1263 }
1264}
1265#[doc = r" Proxy"]
1266pub struct _USBDCDW<'a> {
1267 w: &'a mut W,
1268}
1269impl<'a> _USBDCDW<'a> {
1270 #[doc = r" Writes `variant` to the field"]
1271 #[inline]
1272 pub fn variant(self, variant: USBDCDW) -> &'a mut W {
1273 {
1274 self.bit(variant._bits())
1275 }
1276 }
1277 #[doc = "Clock disabled"]
1278 #[inline]
1279 pub fn _0(self) -> &'a mut W {
1280 self.variant(USBDCDW::_0)
1281 }
1282 #[doc = "Clock enabled"]
1283 #[inline]
1284 pub fn _1(self) -> &'a mut W {
1285 self.variant(USBDCDW::_1)
1286 }
1287 #[doc = r" Sets the field bit"]
1288 pub fn set_bit(self) -> &'a mut W {
1289 self.bit(true)
1290 }
1291 #[doc = r" Clears the field bit"]
1292 pub fn clear_bit(self) -> &'a mut W {
1293 self.bit(false)
1294 }
1295 #[doc = r" Writes raw bits to the field"]
1296 #[inline]
1297 pub fn bit(self, value: bool) -> &'a mut W {
1298 const MASK: bool = true;
1299 const OFFSET: u8 = 21;
1300 self.w.bits &= !((MASK as u32) << OFFSET);
1301 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1302 self.w
1303 }
1304}
1305#[doc = "Values that can be written to the field `PDB`"]
1306pub enum PDBW {
1307 #[doc = "Clock disabled"]
1308 _0,
1309 #[doc = "Clock enabled"]
1310 _1,
1311}
1312impl PDBW {
1313 #[allow(missing_docs)]
1314 #[doc(hidden)]
1315 #[inline]
1316 pub fn _bits(&self) -> bool {
1317 match *self {
1318 PDBW::_0 => false,
1319 PDBW::_1 => true,
1320 }
1321 }
1322}
1323#[doc = r" Proxy"]
1324pub struct _PDBW<'a> {
1325 w: &'a mut W,
1326}
1327impl<'a> _PDBW<'a> {
1328 #[doc = r" Writes `variant` to the field"]
1329 #[inline]
1330 pub fn variant(self, variant: PDBW) -> &'a mut W {
1331 {
1332 self.bit(variant._bits())
1333 }
1334 }
1335 #[doc = "Clock disabled"]
1336 #[inline]
1337 pub fn _0(self) -> &'a mut W {
1338 self.variant(PDBW::_0)
1339 }
1340 #[doc = "Clock enabled"]
1341 #[inline]
1342 pub fn _1(self) -> &'a mut W {
1343 self.variant(PDBW::_1)
1344 }
1345 #[doc = r" Sets the field bit"]
1346 pub fn set_bit(self) -> &'a mut W {
1347 self.bit(true)
1348 }
1349 #[doc = r" Clears the field bit"]
1350 pub fn clear_bit(self) -> &'a mut W {
1351 self.bit(false)
1352 }
1353 #[doc = r" Writes raw bits to the field"]
1354 #[inline]
1355 pub fn bit(self, value: bool) -> &'a mut W {
1356 const MASK: bool = true;
1357 const OFFSET: u8 = 22;
1358 self.w.bits &= !((MASK as u32) << OFFSET);
1359 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1360 self.w
1361 }
1362}
1363#[doc = "Values that can be written to the field `PIT`"]
1364pub enum PITW {
1365 #[doc = "Clock disabled"]
1366 _0,
1367 #[doc = "Clock enabled"]
1368 _1,
1369}
1370impl PITW {
1371 #[allow(missing_docs)]
1372 #[doc(hidden)]
1373 #[inline]
1374 pub fn _bits(&self) -> bool {
1375 match *self {
1376 PITW::_0 => false,
1377 PITW::_1 => true,
1378 }
1379 }
1380}
1381#[doc = r" Proxy"]
1382pub struct _PITW<'a> {
1383 w: &'a mut W,
1384}
1385impl<'a> _PITW<'a> {
1386 #[doc = r" Writes `variant` to the field"]
1387 #[inline]
1388 pub fn variant(self, variant: PITW) -> &'a mut W {
1389 {
1390 self.bit(variant._bits())
1391 }
1392 }
1393 #[doc = "Clock disabled"]
1394 #[inline]
1395 pub fn _0(self) -> &'a mut W {
1396 self.variant(PITW::_0)
1397 }
1398 #[doc = "Clock enabled"]
1399 #[inline]
1400 pub fn _1(self) -> &'a mut W {
1401 self.variant(PITW::_1)
1402 }
1403 #[doc = r" Sets the field bit"]
1404 pub fn set_bit(self) -> &'a mut W {
1405 self.bit(true)
1406 }
1407 #[doc = r" Clears the field bit"]
1408 pub fn clear_bit(self) -> &'a mut W {
1409 self.bit(false)
1410 }
1411 #[doc = r" Writes raw bits to the field"]
1412 #[inline]
1413 pub fn bit(self, value: bool) -> &'a mut W {
1414 const MASK: bool = true;
1415 const OFFSET: u8 = 23;
1416 self.w.bits &= !((MASK as u32) << OFFSET);
1417 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1418 self.w
1419 }
1420}
1421#[doc = "Values that can be written to the field `FTM0`"]
1422pub enum FTM0W {
1423 #[doc = "Clock disabled"]
1424 _0,
1425 #[doc = "Clock enabled"]
1426 _1,
1427}
1428impl FTM0W {
1429 #[allow(missing_docs)]
1430 #[doc(hidden)]
1431 #[inline]
1432 pub fn _bits(&self) -> bool {
1433 match *self {
1434 FTM0W::_0 => false,
1435 FTM0W::_1 => true,
1436 }
1437 }
1438}
1439#[doc = r" Proxy"]
1440pub struct _FTM0W<'a> {
1441 w: &'a mut W,
1442}
1443impl<'a> _FTM0W<'a> {
1444 #[doc = r" Writes `variant` to the field"]
1445 #[inline]
1446 pub fn variant(self, variant: FTM0W) -> &'a mut W {
1447 {
1448 self.bit(variant._bits())
1449 }
1450 }
1451 #[doc = "Clock disabled"]
1452 #[inline]
1453 pub fn _0(self) -> &'a mut W {
1454 self.variant(FTM0W::_0)
1455 }
1456 #[doc = "Clock enabled"]
1457 #[inline]
1458 pub fn _1(self) -> &'a mut W {
1459 self.variant(FTM0W::_1)
1460 }
1461 #[doc = r" Sets the field bit"]
1462 pub fn set_bit(self) -> &'a mut W {
1463 self.bit(true)
1464 }
1465 #[doc = r" Clears the field bit"]
1466 pub fn clear_bit(self) -> &'a mut W {
1467 self.bit(false)
1468 }
1469 #[doc = r" Writes raw bits to the field"]
1470 #[inline]
1471 pub fn bit(self, value: bool) -> &'a mut W {
1472 const MASK: bool = true;
1473 const OFFSET: u8 = 24;
1474 self.w.bits &= !((MASK as u32) << OFFSET);
1475 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1476 self.w
1477 }
1478}
1479#[doc = "Values that can be written to the field `FTM1`"]
1480pub enum FTM1W {
1481 #[doc = "Clock disabled"]
1482 _0,
1483 #[doc = "Clock enabled"]
1484 _1,
1485}
1486impl FTM1W {
1487 #[allow(missing_docs)]
1488 #[doc(hidden)]
1489 #[inline]
1490 pub fn _bits(&self) -> bool {
1491 match *self {
1492 FTM1W::_0 => false,
1493 FTM1W::_1 => true,
1494 }
1495 }
1496}
1497#[doc = r" Proxy"]
1498pub struct _FTM1W<'a> {
1499 w: &'a mut W,
1500}
1501impl<'a> _FTM1W<'a> {
1502 #[doc = r" Writes `variant` to the field"]
1503 #[inline]
1504 pub fn variant(self, variant: FTM1W) -> &'a mut W {
1505 {
1506 self.bit(variant._bits())
1507 }
1508 }
1509 #[doc = "Clock disabled"]
1510 #[inline]
1511 pub fn _0(self) -> &'a mut W {
1512 self.variant(FTM1W::_0)
1513 }
1514 #[doc = "Clock enabled"]
1515 #[inline]
1516 pub fn _1(self) -> &'a mut W {
1517 self.variant(FTM1W::_1)
1518 }
1519 #[doc = r" Sets the field bit"]
1520 pub fn set_bit(self) -> &'a mut W {
1521 self.bit(true)
1522 }
1523 #[doc = r" Clears the field bit"]
1524 pub fn clear_bit(self) -> &'a mut W {
1525 self.bit(false)
1526 }
1527 #[doc = r" Writes raw bits to the field"]
1528 #[inline]
1529 pub fn bit(self, value: bool) -> &'a mut W {
1530 const MASK: bool = true;
1531 const OFFSET: u8 = 25;
1532 self.w.bits &= !((MASK as u32) << OFFSET);
1533 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1534 self.w
1535 }
1536}
1537#[doc = "Values that can be written to the field `FTM2`"]
1538pub enum FTM2W {
1539 #[doc = "Clock disabled"]
1540 _0,
1541 #[doc = "Clock enabled"]
1542 _1,
1543}
1544impl FTM2W {
1545 #[allow(missing_docs)]
1546 #[doc(hidden)]
1547 #[inline]
1548 pub fn _bits(&self) -> bool {
1549 match *self {
1550 FTM2W::_0 => false,
1551 FTM2W::_1 => true,
1552 }
1553 }
1554}
1555#[doc = r" Proxy"]
1556pub struct _FTM2W<'a> {
1557 w: &'a mut W,
1558}
1559impl<'a> _FTM2W<'a> {
1560 #[doc = r" Writes `variant` to the field"]
1561 #[inline]
1562 pub fn variant(self, variant: FTM2W) -> &'a mut W {
1563 {
1564 self.bit(variant._bits())
1565 }
1566 }
1567 #[doc = "Clock disabled"]
1568 #[inline]
1569 pub fn _0(self) -> &'a mut W {
1570 self.variant(FTM2W::_0)
1571 }
1572 #[doc = "Clock enabled"]
1573 #[inline]
1574 pub fn _1(self) -> &'a mut W {
1575 self.variant(FTM2W::_1)
1576 }
1577 #[doc = r" Sets the field bit"]
1578 pub fn set_bit(self) -> &'a mut W {
1579 self.bit(true)
1580 }
1581 #[doc = r" Clears the field bit"]
1582 pub fn clear_bit(self) -> &'a mut W {
1583 self.bit(false)
1584 }
1585 #[doc = r" Writes raw bits to the field"]
1586 #[inline]
1587 pub fn bit(self, value: bool) -> &'a mut W {
1588 const MASK: bool = true;
1589 const OFFSET: u8 = 26;
1590 self.w.bits &= !((MASK as u32) << OFFSET);
1591 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1592 self.w
1593 }
1594}
1595#[doc = "Values that can be written to the field `ADC0`"]
1596pub enum ADC0W {
1597 #[doc = "Clock disabled"]
1598 _0,
1599 #[doc = "Clock enabled"]
1600 _1,
1601}
1602impl ADC0W {
1603 #[allow(missing_docs)]
1604 #[doc(hidden)]
1605 #[inline]
1606 pub fn _bits(&self) -> bool {
1607 match *self {
1608 ADC0W::_0 => false,
1609 ADC0W::_1 => true,
1610 }
1611 }
1612}
1613#[doc = r" Proxy"]
1614pub struct _ADC0W<'a> {
1615 w: &'a mut W,
1616}
1617impl<'a> _ADC0W<'a> {
1618 #[doc = r" Writes `variant` to the field"]
1619 #[inline]
1620 pub fn variant(self, variant: ADC0W) -> &'a mut W {
1621 {
1622 self.bit(variant._bits())
1623 }
1624 }
1625 #[doc = "Clock disabled"]
1626 #[inline]
1627 pub fn _0(self) -> &'a mut W {
1628 self.variant(ADC0W::_0)
1629 }
1630 #[doc = "Clock enabled"]
1631 #[inline]
1632 pub fn _1(self) -> &'a mut W {
1633 self.variant(ADC0W::_1)
1634 }
1635 #[doc = r" Sets the field bit"]
1636 pub fn set_bit(self) -> &'a mut W {
1637 self.bit(true)
1638 }
1639 #[doc = r" Clears the field bit"]
1640 pub fn clear_bit(self) -> &'a mut W {
1641 self.bit(false)
1642 }
1643 #[doc = r" Writes raw bits to the field"]
1644 #[inline]
1645 pub fn bit(self, value: bool) -> &'a mut W {
1646 const MASK: bool = true;
1647 const OFFSET: u8 = 27;
1648 self.w.bits &= !((MASK as u32) << OFFSET);
1649 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1650 self.w
1651 }
1652}
1653#[doc = "Values that can be written to the field `RTC`"]
1654pub enum RTCW {
1655 #[doc = "Access and interrupts disabled"]
1656 _0,
1657 #[doc = "Access and interrupts enabled"]
1658 _1,
1659}
1660impl RTCW {
1661 #[allow(missing_docs)]
1662 #[doc(hidden)]
1663 #[inline]
1664 pub fn _bits(&self) -> bool {
1665 match *self {
1666 RTCW::_0 => false,
1667 RTCW::_1 => true,
1668 }
1669 }
1670}
1671#[doc = r" Proxy"]
1672pub struct _RTCW<'a> {
1673 w: &'a mut W,
1674}
1675impl<'a> _RTCW<'a> {
1676 #[doc = r" Writes `variant` to the field"]
1677 #[inline]
1678 pub fn variant(self, variant: RTCW) -> &'a mut W {
1679 {
1680 self.bit(variant._bits())
1681 }
1682 }
1683 #[doc = "Access and interrupts disabled"]
1684 #[inline]
1685 pub fn _0(self) -> &'a mut W {
1686 self.variant(RTCW::_0)
1687 }
1688 #[doc = "Access and interrupts enabled"]
1689 #[inline]
1690 pub fn _1(self) -> &'a mut W {
1691 self.variant(RTCW::_1)
1692 }
1693 #[doc = r" Sets the field bit"]
1694 pub fn set_bit(self) -> &'a mut W {
1695 self.bit(true)
1696 }
1697 #[doc = r" Clears the field bit"]
1698 pub fn clear_bit(self) -> &'a mut W {
1699 self.bit(false)
1700 }
1701 #[doc = r" Writes raw bits to the field"]
1702 #[inline]
1703 pub fn bit(self, value: bool) -> &'a mut W {
1704 const MASK: bool = true;
1705 const OFFSET: u8 = 29;
1706 self.w.bits &= !((MASK as u32) << OFFSET);
1707 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1708 self.w
1709 }
1710}
1711#[doc = "Values that can be written to the field `DAC0`"]
1712pub enum DAC0W {
1713 #[doc = "Clock disabled"]
1714 _0,
1715 #[doc = "Clock enabled"]
1716 _1,
1717}
1718impl DAC0W {
1719 #[allow(missing_docs)]
1720 #[doc(hidden)]
1721 #[inline]
1722 pub fn _bits(&self) -> bool {
1723 match *self {
1724 DAC0W::_0 => false,
1725 DAC0W::_1 => true,
1726 }
1727 }
1728}
1729#[doc = r" Proxy"]
1730pub struct _DAC0W<'a> {
1731 w: &'a mut W,
1732}
1733impl<'a> _DAC0W<'a> {
1734 #[doc = r" Writes `variant` to the field"]
1735 #[inline]
1736 pub fn variant(self, variant: DAC0W) -> &'a mut W {
1737 {
1738 self.bit(variant._bits())
1739 }
1740 }
1741 #[doc = "Clock disabled"]
1742 #[inline]
1743 pub fn _0(self) -> &'a mut W {
1744 self.variant(DAC0W::_0)
1745 }
1746 #[doc = "Clock enabled"]
1747 #[inline]
1748 pub fn _1(self) -> &'a mut W {
1749 self.variant(DAC0W::_1)
1750 }
1751 #[doc = r" Sets the field bit"]
1752 pub fn set_bit(self) -> &'a mut W {
1753 self.bit(true)
1754 }
1755 #[doc = r" Clears the field bit"]
1756 pub fn clear_bit(self) -> &'a mut W {
1757 self.bit(false)
1758 }
1759 #[doc = r" Writes raw bits to the field"]
1760 #[inline]
1761 pub fn bit(self, value: bool) -> &'a mut W {
1762 const MASK: bool = true;
1763 const OFFSET: u8 = 31;
1764 self.w.bits &= !((MASK as u32) << OFFSET);
1765 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1766 self.w
1767 }
1768}
1769impl R {
1770 #[doc = r" Value of the register as raw bits"]
1771 #[inline]
1772 pub fn bits(&self) -> u32 {
1773 self.bits
1774 }
1775 #[doc = "Bit 0 - Flash Memory Clock Gate Control"]
1776 #[inline]
1777 pub fn ftf(&self) -> FTFR {
1778 FTFR::_from({
1779 const MASK: bool = true;
1780 const OFFSET: u8 = 0;
1781 ((self.bits >> OFFSET) & MASK as u32) != 0
1782 })
1783 }
1784 #[doc = "Bit 1 - DMA Mux Clock Gate Control"]
1785 #[inline]
1786 pub fn dmamux(&self) -> DMAMUXR {
1787 DMAMUXR::_from({
1788 const MASK: bool = true;
1789 const OFFSET: u8 = 1;
1790 ((self.bits >> OFFSET) & MASK as u32) != 0
1791 })
1792 }
1793 #[doc = "Bit 4 - FlexCAN0 Clock Gate Control"]
1794 #[inline]
1795 pub fn flexcan0(&self) -> FLEXCAN0R {
1796 FLEXCAN0R::_from({
1797 const MASK: bool = true;
1798 const OFFSET: u8 = 4;
1799 ((self.bits >> OFFSET) & MASK as u32) != 0
1800 })
1801 }
1802 #[doc = "Bit 9 - RNGA Clock Gate Control"]
1803 #[inline]
1804 pub fn rnga(&self) -> RNGAR {
1805 let bits = {
1806 const MASK: bool = true;
1807 const OFFSET: u8 = 9;
1808 ((self.bits >> OFFSET) & MASK as u32) != 0
1809 };
1810 RNGAR { bits }
1811 }
1812 #[doc = "Bit 12 - SPI0 Clock Gate Control"]
1813 #[inline]
1814 pub fn spi0(&self) -> SPI0R {
1815 SPI0R::_from({
1816 const MASK: bool = true;
1817 const OFFSET: u8 = 12;
1818 ((self.bits >> OFFSET) & MASK as u32) != 0
1819 })
1820 }
1821 #[doc = "Bit 13 - SPI1 Clock Gate Control"]
1822 #[inline]
1823 pub fn spi1(&self) -> SPI1R {
1824 SPI1R::_from({
1825 const MASK: bool = true;
1826 const OFFSET: u8 = 13;
1827 ((self.bits >> OFFSET) & MASK as u32) != 0
1828 })
1829 }
1830 #[doc = "Bit 15 - I2S Clock Gate Control"]
1831 #[inline]
1832 pub fn i2s(&self) -> I2SR {
1833 I2SR::_from({
1834 const MASK: bool = true;
1835 const OFFSET: u8 = 15;
1836 ((self.bits >> OFFSET) & MASK as u32) != 0
1837 })
1838 }
1839 #[doc = "Bit 18 - CRC Clock Gate Control"]
1840 #[inline]
1841 pub fn crc(&self) -> CRCR {
1842 CRCR::_from({
1843 const MASK: bool = true;
1844 const OFFSET: u8 = 18;
1845 ((self.bits >> OFFSET) & MASK as u32) != 0
1846 })
1847 }
1848 #[doc = "Bit 21 - USB DCD Clock Gate Control"]
1849 #[inline]
1850 pub fn usbdcd(&self) -> USBDCDR {
1851 USBDCDR::_from({
1852 const MASK: bool = true;
1853 const OFFSET: u8 = 21;
1854 ((self.bits >> OFFSET) & MASK as u32) != 0
1855 })
1856 }
1857 #[doc = "Bit 22 - PDB Clock Gate Control"]
1858 #[inline]
1859 pub fn pdb(&self) -> PDBR {
1860 PDBR::_from({
1861 const MASK: bool = true;
1862 const OFFSET: u8 = 22;
1863 ((self.bits >> OFFSET) & MASK as u32) != 0
1864 })
1865 }
1866 #[doc = "Bit 23 - PIT Clock Gate Control"]
1867 #[inline]
1868 pub fn pit(&self) -> PITR {
1869 PITR::_from({
1870 const MASK: bool = true;
1871 const OFFSET: u8 = 23;
1872 ((self.bits >> OFFSET) & MASK as u32) != 0
1873 })
1874 }
1875 #[doc = "Bit 24 - FTM0 Clock Gate Control"]
1876 #[inline]
1877 pub fn ftm0(&self) -> FTM0R {
1878 FTM0R::_from({
1879 const MASK: bool = true;
1880 const OFFSET: u8 = 24;
1881 ((self.bits >> OFFSET) & MASK as u32) != 0
1882 })
1883 }
1884 #[doc = "Bit 25 - FTM1 Clock Gate Control"]
1885 #[inline]
1886 pub fn ftm1(&self) -> FTM1R {
1887 FTM1R::_from({
1888 const MASK: bool = true;
1889 const OFFSET: u8 = 25;
1890 ((self.bits >> OFFSET) & MASK as u32) != 0
1891 })
1892 }
1893 #[doc = "Bit 26 - FTM2 Clock Gate Control"]
1894 #[inline]
1895 pub fn ftm2(&self) -> FTM2R {
1896 FTM2R::_from({
1897 const MASK: bool = true;
1898 const OFFSET: u8 = 26;
1899 ((self.bits >> OFFSET) & MASK as u32) != 0
1900 })
1901 }
1902 #[doc = "Bit 27 - ADC0 Clock Gate Control"]
1903 #[inline]
1904 pub fn adc0(&self) -> ADC0R {
1905 ADC0R::_from({
1906 const MASK: bool = true;
1907 const OFFSET: u8 = 27;
1908 ((self.bits >> OFFSET) & MASK as u32) != 0
1909 })
1910 }
1911 #[doc = "Bit 29 - RTC Access Control"]
1912 #[inline]
1913 pub fn rtc(&self) -> RTCR {
1914 RTCR::_from({
1915 const MASK: bool = true;
1916 const OFFSET: u8 = 29;
1917 ((self.bits >> OFFSET) & MASK as u32) != 0
1918 })
1919 }
1920 #[doc = "Bit 31 - DAC0 Clock Gate Control"]
1921 #[inline]
1922 pub fn dac0(&self) -> DAC0R {
1923 DAC0R::_from({
1924 const MASK: bool = true;
1925 const OFFSET: u8 = 31;
1926 ((self.bits >> OFFSET) & MASK as u32) != 0
1927 })
1928 }
1929}
1930impl W {
1931 #[doc = r" Reset value of the register"]
1932 #[inline]
1933 pub fn reset_value() -> W {
1934 W { bits: 1073741825 }
1935 }
1936 #[doc = r" Writes raw bits to the register"]
1937 #[inline]
1938 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1939 self.bits = bits;
1940 self
1941 }
1942 #[doc = "Bit 0 - Flash Memory Clock Gate Control"]
1943 #[inline]
1944 pub fn ftf(&mut self) -> _FTFW {
1945 _FTFW { w: self }
1946 }
1947 #[doc = "Bit 1 - DMA Mux Clock Gate Control"]
1948 #[inline]
1949 pub fn dmamux(&mut self) -> _DMAMUXW {
1950 _DMAMUXW { w: self }
1951 }
1952 #[doc = "Bit 4 - FlexCAN0 Clock Gate Control"]
1953 #[inline]
1954 pub fn flexcan0(&mut self) -> _FLEXCAN0W {
1955 _FLEXCAN0W { w: self }
1956 }
1957 #[doc = "Bit 9 - RNGA Clock Gate Control"]
1958 #[inline]
1959 pub fn rnga(&mut self) -> _RNGAW {
1960 _RNGAW { w: self }
1961 }
1962 #[doc = "Bit 12 - SPI0 Clock Gate Control"]
1963 #[inline]
1964 pub fn spi0(&mut self) -> _SPI0W {
1965 _SPI0W { w: self }
1966 }
1967 #[doc = "Bit 13 - SPI1 Clock Gate Control"]
1968 #[inline]
1969 pub fn spi1(&mut self) -> _SPI1W {
1970 _SPI1W { w: self }
1971 }
1972 #[doc = "Bit 15 - I2S Clock Gate Control"]
1973 #[inline]
1974 pub fn i2s(&mut self) -> _I2SW {
1975 _I2SW { w: self }
1976 }
1977 #[doc = "Bit 18 - CRC Clock Gate Control"]
1978 #[inline]
1979 pub fn crc(&mut self) -> _CRCW {
1980 _CRCW { w: self }
1981 }
1982 #[doc = "Bit 21 - USB DCD Clock Gate Control"]
1983 #[inline]
1984 pub fn usbdcd(&mut self) -> _USBDCDW {
1985 _USBDCDW { w: self }
1986 }
1987 #[doc = "Bit 22 - PDB Clock Gate Control"]
1988 #[inline]
1989 pub fn pdb(&mut self) -> _PDBW {
1990 _PDBW { w: self }
1991 }
1992 #[doc = "Bit 23 - PIT Clock Gate Control"]
1993 #[inline]
1994 pub fn pit(&mut self) -> _PITW {
1995 _PITW { w: self }
1996 }
1997 #[doc = "Bit 24 - FTM0 Clock Gate Control"]
1998 #[inline]
1999 pub fn ftm0(&mut self) -> _FTM0W {
2000 _FTM0W { w: self }
2001 }
2002 #[doc = "Bit 25 - FTM1 Clock Gate Control"]
2003 #[inline]
2004 pub fn ftm1(&mut self) -> _FTM1W {
2005 _FTM1W { w: self }
2006 }
2007 #[doc = "Bit 26 - FTM2 Clock Gate Control"]
2008 #[inline]
2009 pub fn ftm2(&mut self) -> _FTM2W {
2010 _FTM2W { w: self }
2011 }
2012 #[doc = "Bit 27 - ADC0 Clock Gate Control"]
2013 #[inline]
2014 pub fn adc0(&mut self) -> _ADC0W {
2015 _ADC0W { w: self }
2016 }
2017 #[doc = "Bit 29 - RTC Access Control"]
2018 #[inline]
2019 pub fn rtc(&mut self) -> _RTCW {
2020 _RTCW { w: self }
2021 }
2022 #[doc = "Bit 31 - DAC0 Clock Gate Control"]
2023 #[inline]
2024 pub fn dac0(&mut self) -> _DAC0W {
2025 _DAC0W { w: self }
2026 }
2027}