#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::SCGC6 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `FTF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FTFR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FTFR::_0 => false,
FTFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FTFR {
match value {
false => FTFR::_0,
true => FTFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FTFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FTFR::_1
}
}
#[doc = "Possible values of the field `DMAMUX`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMAMUXR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DMAMUXR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DMAMUXR::_0 => false,
DMAMUXR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DMAMUXR {
match value {
false => DMAMUXR::_0,
true => DMAMUXR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DMAMUXR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DMAMUXR::_1
}
}
#[doc = "Possible values of the field `FLEXCAN0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLEXCAN0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FLEXCAN0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLEXCAN0R::_0 => false,
FLEXCAN0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLEXCAN0R {
match value {
false => FLEXCAN0R::_0,
true => FLEXCAN0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FLEXCAN0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FLEXCAN0R::_1
}
}
#[doc = r" Value of the field"]
pub struct RNGAR {
bits: bool,
}
impl RNGAR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = "Possible values of the field `SPI0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl SPI0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SPI0R::_0 => false,
SPI0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SPI0R {
match value {
false => SPI0R::_0,
true => SPI0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == SPI0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == SPI0R::_1
}
}
#[doc = "Possible values of the field `SPI1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI1R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl SPI1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SPI1R::_0 => false,
SPI1R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SPI1R {
match value {
false => SPI1R::_0,
true => SPI1R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == SPI1R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == SPI1R::_1
}
}
#[doc = "Possible values of the field `I2S`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum I2SR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2SR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
I2SR::_0 => false,
I2SR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> I2SR {
match value {
false => I2SR::_0,
true => I2SR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == I2SR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == I2SR::_1
}
}
#[doc = "Possible values of the field `CRC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CRCR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl CRCR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
CRCR::_0 => false,
CRCR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> CRCR {
match value {
false => CRCR::_0,
true => CRCR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == CRCR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == CRCR::_1
}
}
#[doc = "Possible values of the field `USBDCD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USBDCDR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl USBDCDR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
USBDCDR::_0 => false,
USBDCDR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> USBDCDR {
match value {
false => USBDCDR::_0,
true => USBDCDR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == USBDCDR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == USBDCDR::_1
}
}
#[doc = "Possible values of the field `PDB`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PDBR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PDBR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
PDBR::_0 => false,
PDBR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> PDBR {
match value {
false => PDBR::_0,
true => PDBR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == PDBR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == PDBR::_1
}
}
#[doc = "Possible values of the field `PIT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PITR {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PITR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
PITR::_0 => false,
PITR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> PITR {
match value {
false => PITR::_0,
true => PITR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == PITR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == PITR::_1
}
}
#[doc = "Possible values of the field `FTM0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FTM0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FTM0R::_0 => false,
FTM0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FTM0R {
match value {
false => FTM0R::_0,
true => FTM0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FTM0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FTM0R::_1
}
}
#[doc = "Possible values of the field `FTM1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FTM1R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FTM1R::_0 => false,
FTM1R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FTM1R {
match value {
false => FTM1R::_0,
true => FTM1R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FTM1R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FTM1R::_1
}
}
#[doc = "Possible values of the field `FTM2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FTM2R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FTM2R::_0 => false,
FTM2R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FTM2R {
match value {
false => FTM2R::_0,
true => FTM2R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FTM2R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FTM2R::_1
}
}
#[doc = "Possible values of the field `ADC0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADC0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl ADC0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ADC0R::_0 => false,
ADC0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ADC0R {
match value {
false => ADC0R::_0,
true => ADC0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == ADC0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == ADC0R::_1
}
}
#[doc = "Possible values of the field `RTC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTCR {
#[doc = "Access and interrupts disabled"]
_0,
#[doc = "Access and interrupts enabled"]
_1,
}
impl RTCR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTCR::_0 => false,
RTCR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTCR {
match value {
false => RTCR::_0,
true => RTCR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTCR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTCR::_1
}
}
#[doc = "Possible values of the field `DAC0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DAC0R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DAC0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DAC0R::_0 => false,
DAC0R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DAC0R {
match value {
false => DAC0R::_0,
true => DAC0R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DAC0R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DAC0R::_1
}
}
#[doc = "Values that can be written to the field `FTF`"]
pub enum FTFW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FTFW::_0 => false,
FTFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FTFW<'a> {
w: &'a mut W,
}
impl<'a> _FTFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FTFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FTFW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FTFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DMAMUX`"]
pub enum DMAMUXW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DMAMUXW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DMAMUXW::_0 => false,
DMAMUXW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DMAMUXW<'a> {
w: &'a mut W,
}
impl<'a> _DMAMUXW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DMAMUXW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DMAMUXW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DMAMUXW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLEXCAN0`"]
pub enum FLEXCAN0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FLEXCAN0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLEXCAN0W::_0 => false,
FLEXCAN0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLEXCAN0W<'a> {
w: &'a mut W,
}
impl<'a> _FLEXCAN0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLEXCAN0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FLEXCAN0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FLEXCAN0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RNGAW<'a> {
w: &'a mut W,
}
impl<'a> _RNGAW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SPI0`"]
pub enum SPI0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl SPI0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SPI0W::_0 => false,
SPI0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SPI0W<'a> {
w: &'a mut W,
}
impl<'a> _SPI0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SPI0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(SPI0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(SPI0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SPI1`"]
pub enum SPI1W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl SPI1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SPI1W::_0 => false,
SPI1W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SPI1W<'a> {
w: &'a mut W,
}
impl<'a> _SPI1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SPI1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(SPI1W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(SPI1W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 13;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `I2S`"]
pub enum I2SW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2SW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
I2SW::_0 => false,
I2SW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _I2SW<'a> {
w: &'a mut W,
}
impl<'a> _I2SW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: I2SW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(I2SW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(I2SW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 15;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `CRC`"]
pub enum CRCW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl CRCW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
CRCW::_0 => false,
CRCW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _CRCW<'a> {
w: &'a mut W,
}
impl<'a> _CRCW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: CRCW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(CRCW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(CRCW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 18;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `USBDCD`"]
pub enum USBDCDW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl USBDCDW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
USBDCDW::_0 => false,
USBDCDW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _USBDCDW<'a> {
w: &'a mut W,
}
impl<'a> _USBDCDW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: USBDCDW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(USBDCDW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(USBDCDW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 21;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PDB`"]
pub enum PDBW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PDBW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
PDBW::_0 => false,
PDBW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _PDBW<'a> {
w: &'a mut W,
}
impl<'a> _PDBW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PDBW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(PDBW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(PDBW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 22;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PIT`"]
pub enum PITW {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl PITW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
PITW::_0 => false,
PITW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _PITW<'a> {
w: &'a mut W,
}
impl<'a> _PITW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PITW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(PITW::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(PITW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 23;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FTM0`"]
pub enum FTM0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FTM0W::_0 => false,
FTM0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FTM0W<'a> {
w: &'a mut W,
}
impl<'a> _FTM0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FTM0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FTM0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FTM0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FTM1`"]
pub enum FTM1W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FTM1W::_0 => false,
FTM1W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FTM1W<'a> {
w: &'a mut W,
}
impl<'a> _FTM1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FTM1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FTM1W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FTM1W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 25;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FTM2`"]
pub enum FTM2W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl FTM2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FTM2W::_0 => false,
FTM2W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FTM2W<'a> {
w: &'a mut W,
}
impl<'a> _FTM2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FTM2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FTM2W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FTM2W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 26;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ADC0`"]
pub enum ADC0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl ADC0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ADC0W::_0 => false,
ADC0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ADC0W<'a> {
w: &'a mut W,
}
impl<'a> _ADC0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ADC0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(ADC0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(ADC0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 27;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTC`"]
pub enum RTCW {
#[doc = "Access and interrupts disabled"]
_0,
#[doc = "Access and interrupts enabled"]
_1,
}
impl RTCW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTCW::_0 => false,
RTCW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RTCW<'a> {
w: &'a mut W,
}
impl<'a> _RTCW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTCW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Access and interrupts disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RTCW::_0)
}
#[doc = "Access and interrupts enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RTCW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DAC0`"]
pub enum DAC0W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl DAC0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DAC0W::_0 => false,
DAC0W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DAC0W<'a> {
w: &'a mut W,
}
impl<'a> _DAC0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DAC0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DAC0W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DAC0W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Flash Memory Clock Gate Control"]
#[inline]
pub fn ftf(&self) -> FTFR {
FTFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - DMA Mux Clock Gate Control"]
#[inline]
pub fn dmamux(&self) -> DMAMUXR {
DMAMUXR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 4 - FlexCAN0 Clock Gate Control"]
#[inline]
pub fn flexcan0(&self) -> FLEXCAN0R {
FLEXCAN0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 9 - RNGA Clock Gate Control"]
#[inline]
pub fn rnga(&self) -> RNGAR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 9;
((self.bits >> OFFSET) & MASK as u32) != 0
};
RNGAR { bits }
}
#[doc = "Bit 12 - SPI0 Clock Gate Control"]
#[inline]
pub fn spi0(&self) -> SPI0R {
SPI0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 13 - SPI1 Clock Gate Control"]
#[inline]
pub fn spi1(&self) -> SPI1R {
SPI1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 15 - I2S Clock Gate Control"]
#[inline]
pub fn i2s(&self) -> I2SR {
I2SR::_from({
const MASK: bool = true;
const OFFSET: u8 = 15;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 18 - CRC Clock Gate Control"]
#[inline]
pub fn crc(&self) -> CRCR {
CRCR::_from({
const MASK: bool = true;
const OFFSET: u8 = 18;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - USB DCD Clock Gate Control"]
#[inline]
pub fn usbdcd(&self) -> USBDCDR {
USBDCDR::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - PDB Clock Gate Control"]
#[inline]
pub fn pdb(&self) -> PDBR {
PDBR::_from({
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 23 - PIT Clock Gate Control"]
#[inline]
pub fn pit(&self) -> PITR {
PITR::_from({
const MASK: bool = true;
const OFFSET: u8 = 23;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 24 - FTM0 Clock Gate Control"]
#[inline]
pub fn ftm0(&self) -> FTM0R {
FTM0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 25 - FTM1 Clock Gate Control"]
#[inline]
pub fn ftm1(&self) -> FTM1R {
FTM1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 25;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 26 - FTM2 Clock Gate Control"]
#[inline]
pub fn ftm2(&self) -> FTM2R {
FTM2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 26;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 27 - ADC0 Clock Gate Control"]
#[inline]
pub fn adc0(&self) -> ADC0R {
ADC0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 27;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 29 - RTC Access Control"]
#[inline]
pub fn rtc(&self) -> RTCR {
RTCR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 31 - DAC0 Clock Gate Control"]
#[inline]
pub fn dac0(&self) -> DAC0R {
DAC0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 1073741825 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Flash Memory Clock Gate Control"]
#[inline]
pub fn ftf(&mut self) -> _FTFW {
_FTFW { w: self }
}
#[doc = "Bit 1 - DMA Mux Clock Gate Control"]
#[inline]
pub fn dmamux(&mut self) -> _DMAMUXW {
_DMAMUXW { w: self }
}
#[doc = "Bit 4 - FlexCAN0 Clock Gate Control"]
#[inline]
pub fn flexcan0(&mut self) -> _FLEXCAN0W {
_FLEXCAN0W { w: self }
}
#[doc = "Bit 9 - RNGA Clock Gate Control"]
#[inline]
pub fn rnga(&mut self) -> _RNGAW {
_RNGAW { w: self }
}
#[doc = "Bit 12 - SPI0 Clock Gate Control"]
#[inline]
pub fn spi0(&mut self) -> _SPI0W {
_SPI0W { w: self }
}
#[doc = "Bit 13 - SPI1 Clock Gate Control"]
#[inline]
pub fn spi1(&mut self) -> _SPI1W {
_SPI1W { w: self }
}
#[doc = "Bit 15 - I2S Clock Gate Control"]
#[inline]
pub fn i2s(&mut self) -> _I2SW {
_I2SW { w: self }
}
#[doc = "Bit 18 - CRC Clock Gate Control"]
#[inline]
pub fn crc(&mut self) -> _CRCW {
_CRCW { w: self }
}
#[doc = "Bit 21 - USB DCD Clock Gate Control"]
#[inline]
pub fn usbdcd(&mut self) -> _USBDCDW {
_USBDCDW { w: self }
}
#[doc = "Bit 22 - PDB Clock Gate Control"]
#[inline]
pub fn pdb(&mut self) -> _PDBW {
_PDBW { w: self }
}
#[doc = "Bit 23 - PIT Clock Gate Control"]
#[inline]
pub fn pit(&mut self) -> _PITW {
_PITW { w: self }
}
#[doc = "Bit 24 - FTM0 Clock Gate Control"]
#[inline]
pub fn ftm0(&mut self) -> _FTM0W {
_FTM0W { w: self }
}
#[doc = "Bit 25 - FTM1 Clock Gate Control"]
#[inline]
pub fn ftm1(&mut self) -> _FTM1W {
_FTM1W { w: self }
}
#[doc = "Bit 26 - FTM2 Clock Gate Control"]
#[inline]
pub fn ftm2(&mut self) -> _FTM2W {
_FTM2W { w: self }
}
#[doc = "Bit 27 - ADC0 Clock Gate Control"]
#[inline]
pub fn adc0(&mut self) -> _ADC0W {
_ADC0W { w: self }
}
#[doc = "Bit 29 - RTC Access Control"]
#[inline]
pub fn rtc(&mut self) -> _RTCW {
_RTCW { w: self }
}
#[doc = "Bit 31 - DAC0 Clock Gate Control"]
#[inline]
pub fn dac0(&mut self) -> _DAC0W {
_DAC0W { w: self }
}
}