Struct Cpu8080State 

pub struct Cpu8080State {

    pub registers: Registers,
    pub pc: u16,
    pub sp: u16,
    pub flags: Flags,
    pub memory: Memory64K,
    pub interrupt_request_pending: bool,
    pub interrupt_enable: bool,
    pub interrupt_enable_pending: bool,
    pub halted: bool,
    pub cycle_count: u64,
    pub interrupt_vector_byte: Option<u8>,
    pub tact_phase: Option<u8>,
    pub last_completed_tact_phase: Option<u8>,
    pub last_fetched_opcode: u8,
    pub last_data_bus_byte: u8,
    pub last_address_bus: u16,
    /* private fields */
}

Fields

registers: Registers

pc: u16

sp: u16

flags: Flags

memory: Memory64K

interrupt_request_pending: bool

interrupt_enable: bool

interrupt_enable_pending: bool

halted: bool

cycle_count: u64

interrupt_vector_byte: Option<u8>

tact_phase: Option<u8>

last_completed_tact_phase: Option<u8>

Last executed T-phase of the current/just-finished instruction. tact_phase resets to None at boundaries; this field holds total - 1 at completion so the UI freezes on the final T. None only on cold start / Reset.

last_fetched_opcode: u8

Mirror of the chip’s IR: holds the last opcode fetched on M1 until the next M1. After HLT a memory.read(pc) look-ahead would show NOP from blank RAM; the IR still reads 0x76.

last_data_bus_byte: u8

Mirror of the chip’s data bus latch (D7-D0). After HLT it must show 0x76, not the byte at the new PC.

last_address_bus: u16

Mirror of the chip’s address bus latch (A0-A15). PC, HL, SP, and 16-bit immediates take turns on it. After HLT PC=halt+1 but the latch still shows the HLT address.

Implementations

impl Cpu8080State

pub const RESET_SP: u16 = 0xFFFF

8080 leaves SP indeterminate on reset; the reference uses 0xFFFF so a stray PUSH lands in the high stack region.

pub fn reset_cpu(&mut self)

pub fn reset_ram(&mut self)

pub fn request_interrupt(&mut self, vector_byte: u8)

pub fn set_register(&mut self, register: RegisterName, value: u8)

pub fn get_register(&self, register: RegisterName) -> u8

pub fn set_memory(&mut self, address: u16, value: u8)

pub fn set_memory_block( &mut self, start: u16, values: &[u8], ) -> Result<(), ValidationError>

pub fn peek(&self, address: u16) -> u8

Side-effect-free read for UI/disassembler; executors go through bus_read* / bus_write* / fetch_opcode.

pub fn step_instruction<B: PortBus>( &mut self, bus: &mut B, ) -> Result<InstructionOutcome, CoreError>

pub fn timing_opcode(&self) -> u8

pub fn timing_branch_taken(&self, layout: MachineCycleLayout, phase: u8) -> bool

pub fn tact_walk_active(&self) -> bool

pub fn run_for_t_states<B: PortBus>( &mut self, bus: &mut B, t_states: u64, ) -> Result<(), CoreError>

pub fn run_until_halt<B: PortBus>( &mut self, bus: &mut B, max_instructions: u64, ) -> Result<u64, CoreError>

impl Cpu8080State

pub fn step_tact<B: PortBus>( &mut self, bus: &mut B, ) -> Result<TactOutcome, CoreError>

Trait Implementations

impl Clone for Cpu8080State

fn clone(&self) -> Cpu8080State

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Cpu8080State

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Cpu8080State

#[derive(Default)] would yield sp: 0; reference uses 0xFFFF.

fn default() -> Self

Returns the “default value” for a type.

impl Eq for Cpu8080State

impl PartialEq for Cpu8080State

fn eq(&self, other: &Cpu8080State) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for Cpu8080State