[−][src]Type Definition k210_pac::sysctl::CLK_SEL1
type CLK_SEL1 = Reg<u32, _CLK_SEL1>;
Clock select controller 1
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see clk_sel1 module
Trait Implementations
impl Readable for CLK_SEL1
[src]
read()
method returns clk_sel1::R reader structure
impl Writable for CLK_SEL1
[src]
write(|w| ..)
method takes clk_sel1::W writer structure
impl ResetValue for CLK_SEL1
[src]
Register clk_sel1 reset()
's with value 0