[−][src]Struct k1921vk01t_pac::nt_common_reg::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub gpiopctla: GPIOPCTLA,
    pub gpiopctlb: GPIOPCTLB,
    pub gpiopctlc: GPIOPCTLC,
    pub gpiopctld: GPIOPCTLD,
    pub gpiopctle: GPIOPCTLE,
    pub gpiopctlf: GPIOPCTLF,
    pub gpiopctlg: GPIOPCTLG,
    pub gpiopctlh: GPIOPCTLH,
    pub pll_ctrl: PLL_CTRL,
    pub pll_od: PLL_OD,
    pub pll_nr: PLL_NR,
    pub pll_nf: PLL_NF,
    pub ext_mem_cfg: EXT_MEM_CFG,
    pub adc_ctrl0: ADC_CTRL0,
    pub adc_ctrl1: ADC_CTRL1,
    pub pwm_sync: PWM_SYNC,
    pub pwm_ctrl: PWM_CTRL,
    pub sys_clk: SYS_CLK,
    pub apb_clk: APB_CLK,
    pub uart_clk: UART_CLK,
    pub spi_clk: SPI_CLK,
    pub per_rst0: PER_RST0,
    pub per_rst1: PER_RST1,
    pub gpiose0: GPIOSE0,
    pub gpiose1: GPIOSE1,
    pub gpiose2: GPIOSE2,
    pub gpiose3: GPIOSE3,
    pub gpioqe0: GPIOQE0,
    pub gpioqe1: GPIOQE1,
    pub gpioqe2: GPIOQE2,
    pub gpioqe3: GPIOQE3,
    pub gpioqm0: GPIOQM0,
    pub gpioqm1: GPIOQM1,
    pub gpioqm2: GPIOQM2,
    pub gpioqm3: GPIOQM3,
    pub gpioqpad: GPIOQPAD,
    pub gpioqpeh: GPIOQPEH,
    pub usb_ctrl: USB_CTRL,
    pub uart_spi_clk_sel: UART_SPI_CLK_SEL,
    pub adc_ctrl2: ADC_CTRL2,
    pub flash_full_erase: FLASH_FULL_ERASE,
    // some fields omitted
}

Register block

Fields

gpiopctla: GPIOPCTLA

0x18 - Port A alternative function selection register

gpiopctlb: GPIOPCTLB

0x1c - Port B alternative function selection register

gpiopctlc: GPIOPCTLC

0x20 - Port C alternative function selection register

gpiopctld: GPIOPCTLD

0x24 - Port D alternative function selection register

gpiopctle: GPIOPCTLE

0x28 - Port E alternative function selection register

gpiopctlf: GPIOPCTLF

0x2c - Port F alternative function selection register

gpiopctlg: GPIOPCTLG

0x30 - Port G alternative function selection register

gpiopctlh: GPIOPCTLH

0x34 - Port H alternative function selection register

pll_ctrl: PLL_CTRL

0x94 - PLL control register

pll_od: PLL_OD

0x98 - PLL output divider register

pll_nr: PLL_NR

0x9c - PLL reference divider register

pll_nf: PLL_NF

0xa0 - PLL feedback divider register

ext_mem_cfg: EXT_MEM_CFG

0xa4 - External memory configuration register

adc_ctrl0: ADC_CTRL0

0xa8 - ADC 0-3 clock control register

adc_ctrl1: ADC_CTRL1

0xac - ADC 4-7 clock control register

pwm_sync: PWM_SYNC

0xb0 - PWM prescalers sync register

pwm_ctrl: PWM_CTRL

0xb4 - PWM sync control register

sys_clk: SYS_CLK

0xb8 - System clock control register

apb_clk: APB_CLK

0xbc - Peripheral clock control register

uart_clk: UART_CLK

0xc0 - UART clock control register

spi_clk: SPI_CLK

0xc4 - SPI clock control register

per_rst0: PER_RST0

0xc8 - Peripheral reset register 0

per_rst1: PER_RST1

0xcc - Peripheral reset register 1

gpiose0: GPIOSE0

0xd0 - Control register resynchronization input ports A, B

gpiose1: GPIOSE1

0xd4 - Control register resynchronization input ports C, D

gpiose2: GPIOSE2

0xd8 - Control register resynchronization input ports E, F

gpiose3: GPIOSE3

0xdc - Control register resynchronization input ports G, H

gpioqe0: GPIOQE0

0xf0 - Register filter settings input ports A, B

gpioqe1: GPIOQE1

0xf4 - Register filter settings input ports C, D

gpioqe2: GPIOQE2

0xf8 - Register filter settings input ports E, F

gpioqe3: GPIOQE3

0xfc - Register filter settings input ports G, H

gpioqm0: GPIOQM0

0x100 - Register filter settings input ports A, B

gpioqm1: GPIOQM1

0x104 - Register filter settings input ports C, D

gpioqm2: GPIOQM2

0x108 - Register filter settings input ports E, F

gpioqm3: GPIOQM3

0x10c - Register filter settings input ports G, H

gpioqpad: GPIOQPAD

0x110 - Register filter settings input ports A, B, C, D

gpioqpeh: GPIOQPEH

0x114 - Register filter settings input ports E, F, G, H

usb_ctrl: USB_CTRL

0x130 - Customize the USB PHY

uart_spi_clk_sel: UART_SPI_CLK_SEL

0x138 - Select source clk UART and SSP register

adc_ctrl2: ADC_CTRL2

0x13c - ADC control register 2

flash_full_erase: FLASH_FULL_ERASE

0x164 - Full erase flash (user and boot) register

Methods

`impl RegisterBlock`[src]

`pub fn gpiodena(&self) -> &GPIODENA`[src]

0x00 - Port A digital enable register

`pub fn gpiodena_mut(&self) -> &mut GPIODENA`[src]

0x00 - Port A digital enable register

`pub fn gpioden0(&self) -> &GPIODEN0`[src]

0x00 - Port A,B digital enable register

`pub fn gpioden0_mut(&self) -> &mut GPIODEN0`[src]

0x00 - Port A,B digital enable register

`pub fn gpiodenb(&self) -> &GPIODENB`[src]

0x02 - Port B digital enable register

`pub fn gpiodenb_mut(&self) -> &mut GPIODENB`[src]

0x02 - Port B digital enable register

`pub fn gpiodenc(&self) -> &GPIODENC`[src]

0x04 - Port C digital enable register

`pub fn gpiodenc_mut(&self) -> &mut GPIODENC`[src]

0x04 - Port C digital enable register

`pub fn gpioden1(&self) -> &GPIODEN1`[src]

0x04 - Port C,D digital enable register

`pub fn gpioden1_mut(&self) -> &mut GPIODEN1`[src]

0x04 - Port C,D digital enable register

`pub fn gpiodend(&self) -> &GPIODEND`[src]

0x06 - Port D digital enable register

`pub fn gpiodend_mut(&self) -> &mut GPIODEND`[src]

0x06 - Port D digital enable register

`pub fn gpiodene(&self) -> &GPIODENE`[src]

0x08 - Port E digital enable register

`pub fn gpiodene_mut(&self) -> &mut GPIODENE`[src]

0x08 - Port E digital enable register

`pub fn gpioden2(&self) -> &GPIODEN2`[src]

0x08 - Port E,F digital enable register

`pub fn gpioden2_mut(&self) -> &mut GPIODEN2`[src]

0x08 - Port E,F digital enable register

`pub fn gpiodenf(&self) -> &GPIODENF`[src]

0x0a - Port F digital enable register

`pub fn gpiodenf_mut(&self) -> &mut GPIODENF`[src]

0x0a - Port F digital enable register

`pub fn gpiodeng(&self) -> &GPIODENG`[src]

0x0c - Port G digital enable register

`pub fn gpiodeng_mut(&self) -> &mut GPIODENG`[src]

0x0c - Port G digital enable register

`pub fn gpioden3(&self) -> &GPIODEN3`[src]

0x0c - Port G,H digital enable register

`pub fn gpioden3_mut(&self) -> &mut GPIODEN3`[src]

0x0c - Port G,H digital enable register

`pub fn gpiodenh(&self) -> &GPIODENH`[src]

0x0e - Port H digital enable register

`pub fn gpiodenh_mut(&self) -> &mut GPIODENH`[src]

0x0e - Port H digital enable register

`pub fn gpioodctla(&self) -> &GPIOODCTLA`[src]

0x48 - Port A open-drain enable register

`pub fn gpioodctla_mut(&self) -> &mut GPIOODCTLA`[src]

0x48 - Port A open-drain enable register

`pub fn gpioodctl0(&self) -> &GPIOODCTL0`[src]

0x48 - Port A,B open-drain enable register

`pub fn gpioodctl0_mut(&self) -> &mut GPIOODCTL0`[src]

0x48 - Port A,B open-drain enable register

`pub fn gpioodctlb(&self) -> &GPIOODCTLB`[src]

0x4a - Port B open-drain enable register

`pub fn gpioodctlb_mut(&self) -> &mut GPIOODCTLB`[src]

0x4a - Port B open-drain enable register

`pub fn gpioodctlc(&self) -> &GPIOODCTLC`[src]

0x4c - Port C open-drain enable register

`pub fn gpioodctlc_mut(&self) -> &mut GPIOODCTLC`[src]

0x4c - Port C open-drain enable register

`pub fn gpioodctl1(&self) -> &GPIOODCTL1`[src]

0x4c - Port C,D open-drain enable register

`pub fn gpioodctl1_mut(&self) -> &mut GPIOODCTL1`[src]

0x4c - Port C,D open-drain enable register

`pub fn gpioodctld(&self) -> &GPIOODCTLD`[src]

0x4e - Port D open-drain enable register

`pub fn gpioodctld_mut(&self) -> &mut GPIOODCTLD`[src]

0x4e - Port D open-drain enable register

`pub fn gpioodctle(&self) -> &GPIOODCTLE`[src]

0x50 - Port E open-drain enable register

`pub fn gpioodctle_mut(&self) -> &mut GPIOODCTLE`[src]

0x50 - Port E open-drain enable register

`pub fn gpioodctl2(&self) -> &GPIOODCTL2`[src]

0x50 - Port E,F open-drain enable register

`pub fn gpioodctl2_mut(&self) -> &mut GPIOODCTL2`[src]

0x50 - Port E,F open-drain enable register

`pub fn gpioodctlf(&self) -> &GPIOODCTLF`[src]

0x52 - Port F open-drain enable register

`pub fn gpioodctlf_mut(&self) -> &mut GPIOODCTLF`[src]

0x52 - Port F open-drain enable register

`pub fn gpioodctlg(&self) -> &GPIOODCTLG`[src]

0x54 - Port G open-drain enable register

`pub fn gpioodctlg_mut(&self) -> &mut GPIOODCTLG`[src]

0x54 - Port G open-drain enable register

`pub fn gpioodctl3(&self) -> &GPIOODCTL3`[src]

0x54 - Port G,H open-drain enable register

`pub fn gpioodctl3_mut(&self) -> &mut GPIOODCTL3`[src]

0x54 - Port G,H open-drain enable register

`pub fn gpioodctlh(&self) -> &GPIOODCTLH`[src]

0x56 - Port H open-drain enable register

`pub fn gpioodctlh_mut(&self) -> &mut GPIOODCTLH`[src]

0x56 - Port H open-drain enable register

`pub fn gpiodsctla(&self) -> &GPIODSCTLA`[src]

0x60 - Port A strength control register

`pub fn gpiodsctla_mut(&self) -> &mut GPIODSCTLA`[src]

0x60 - Port A strength control register

`pub fn gpiodsctl0(&self) -> &GPIODSCTL0`[src]

0x60 - Port A,B strength control register

`pub fn gpiodsctl0_mut(&self) -> &mut GPIODSCTL0`[src]

0x60 - Port A,B strength control register

`pub fn gpiodsctlb(&self) -> &GPIODSCTLB`[src]

0x62 - Port B strength control register

`pub fn gpiodsctlb_mut(&self) -> &mut GPIODSCTLB`[src]

0x62 - Port B strength control register

`pub fn gpiodsctlc(&self) -> &GPIODSCTLC`[src]

0x64 - Port C strength control register

`pub fn gpiodsctlc_mut(&self) -> &mut GPIODSCTLC`[src]

0x64 - Port C strength control register

`pub fn gpiodsctl1(&self) -> &GPIODSCTL1`[src]

0x64 - Port C,D strength control register

`pub fn gpiodsctl1_mut(&self) -> &mut GPIODSCTL1`[src]

0x64 - Port C,D strength control register

`pub fn gpiodsctld(&self) -> &GPIODSCTLD`[src]

0x66 - Port D strength control register

`pub fn gpiodsctld_mut(&self) -> &mut GPIODSCTLD`[src]

0x66 - Port D strength control register

`pub fn gpiodsctle(&self) -> &GPIODSCTLE`[src]

0x68 - Port E strength control register

`pub fn gpiodsctle_mut(&self) -> &mut GPIODSCTLE`[src]

0x68 - Port E strength control register

`pub fn gpiodsctl2(&self) -> &GPIODSCTL2`[src]

0x68 - Port E,F strength control register

`pub fn gpiodsctl2_mut(&self) -> &mut GPIODSCTL2`[src]

0x68 - Port E,F strength control register

`pub fn gpiodsctlf(&self) -> &GPIODSCTLF`[src]

0x6a - Port F strength control register

`pub fn gpiodsctlf_mut(&self) -> &mut GPIODSCTLF`[src]

0x6a - Port F strength control register

`pub fn gpiodsctlg(&self) -> &GPIODSCTLG`[src]

0x6c - Port G strength control register

`pub fn gpiodsctlg_mut(&self) -> &mut GPIODSCTLG`[src]

0x6c - Port G strength control register

`pub fn gpiodsctl3(&self) -> &GPIODSCTL3`[src]

0x6c - Port G,H strength control register

`pub fn gpiodsctl3_mut(&self) -> &mut GPIODSCTL3`[src]

0x6c - Port G,H strength control register

`pub fn gpiodsctlh(&self) -> &GPIODSCTLH`[src]

0x6e - Port H strength control register

`pub fn gpiodsctlh_mut(&self) -> &mut GPIODSCTLH`[src]

0x6e - Port H strength control register

`pub fn gpiopuctla(&self) -> &GPIOPUCTLA`[src]

0x78 - Port A pull-up enable register

`pub fn gpiopuctla_mut(&self) -> &mut GPIOPUCTLA`[src]

0x78 - Port A pull-up enable register

`pub fn gpiopuctl0(&self) -> &GPIOPUCTL0`[src]

0x78 - Port A,B pull-up enable register

`pub fn gpiopuctl0_mut(&self) -> &mut GPIOPUCTL0`[src]

0x78 - Port A,B pull-up enable register

`pub fn gpiopuctlb(&self) -> &GPIOPUCTLB`[src]

0x7a - Port B pull-up enable register

`pub fn gpiopuctlb_mut(&self) -> &mut GPIOPUCTLB`[src]

0x7a - Port B pull-up enable register

`pub fn gpiopuctlc(&self) -> &GPIOPUCTLC`[src]

0x7c - Port C pull-up enable register

`pub fn gpiopuctlc_mut(&self) -> &mut GPIOPUCTLC`[src]

0x7c - Port C pull-up enable register

`pub fn gpiopuctl1(&self) -> &GPIOPUCTL1`[src]

0x7c - Port C,D pull-up enable register

`pub fn gpiopuctl1_mut(&self) -> &mut GPIOPUCTL1`[src]

0x7c - Port C,D pull-up enable register

`pub fn gpiopuctld(&self) -> &GPIOPUCTLD`[src]

0x7e - Port D pull-up enable register

`pub fn gpiopuctld_mut(&self) -> &mut GPIOPUCTLD`[src]

0x7e - Port D pull-up enable register

`pub fn gpiopuctle(&self) -> &GPIOPUCTLE`[src]

0x80 - Port E pull-up enable register

`pub fn gpiopuctle_mut(&self) -> &mut GPIOPUCTLE`[src]

0x80 - Port E pull-up enable register

`pub fn gpiopuctl2(&self) -> &GPIOPUCTL2`[src]

0x80 - Port E,F pull-up enable register

`pub fn gpiopuctl2_mut(&self) -> &mut GPIOPUCTL2`[src]

0x80 - Port E,F pull-up enable register

`pub fn gpiopuctlf(&self) -> &GPIOPUCTLF`[src]

0x82 - Port F pull-up enable register

`pub fn gpiopuctlf_mut(&self) -> &mut GPIOPUCTLF`[src]

0x82 - Port F pull-up enable register

`pub fn gpiopuctlg(&self) -> &GPIOPUCTLG`[src]

0x84 - Port G pull-up enable register

`pub fn gpiopuctlg_mut(&self) -> &mut GPIOPUCTLG`[src]

0x84 - Port G pull-up enable register

`pub fn gpiopuctl3(&self) -> &GPIOPUCTL3`[src]

0x84 - Port G,H pull-up enable register

`pub fn gpiopuctl3_mut(&self) -> &mut GPIOPUCTL3`[src]

0x84 - Port G,H pull-up enable register

`pub fn gpiopuctlh(&self) -> &GPIOPUCTLH`[src]

0x86 - Port H pull-up enable register

`pub fn gpiopuctlh_mut(&self) -> &mut GPIOPUCTLH`[src]

0x86 - Port H pull-up enable register

Auto Trait Implementations

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

Should always be Self

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = !`

The type returned in the event of a conversion error.

`fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

[−][src]Struct k1921vk01t_pac::nt_common_reg::RegisterBlock

Fields

Methods

impl RegisterBlock[src]

pub fn gpiodena(&self) -> &GPIODENA[src]

pub fn gpiodena_mut(&self) -> &mut GPIODENA[src]

pub fn gpioden0(&self) -> &GPIODEN0[src]

pub fn gpioden0_mut(&self) -> &mut GPIODEN0[src]

pub fn gpiodenb(&self) -> &GPIODENB[src]

pub fn gpiodenb_mut(&self) -> &mut GPIODENB[src]

pub fn gpiodenc(&self) -> &GPIODENC[src]

pub fn gpiodenc_mut(&self) -> &mut GPIODENC[src]

pub fn gpioden1(&self) -> &GPIODEN1[src]

pub fn gpioden1_mut(&self) -> &mut GPIODEN1[src]

pub fn gpiodend(&self) -> &GPIODEND[src]

pub fn gpiodend_mut(&self) -> &mut GPIODEND[src]

pub fn gpiodene(&self) -> &GPIODENE[src]

pub fn gpiodene_mut(&self) -> &mut GPIODENE[src]

pub fn gpioden2(&self) -> &GPIODEN2[src]

pub fn gpioden2_mut(&self) -> &mut GPIODEN2[src]

pub fn gpiodenf(&self) -> &GPIODENF[src]

pub fn gpiodenf_mut(&self) -> &mut GPIODENF[src]

pub fn gpiodeng(&self) -> &GPIODENG[src]

pub fn gpiodeng_mut(&self) -> &mut GPIODENG[src]

pub fn gpioden3(&self) -> &GPIODEN3[src]

pub fn gpioden3_mut(&self) -> &mut GPIODEN3[src]

pub fn gpiodenh(&self) -> &GPIODENH[src]

pub fn gpiodenh_mut(&self) -> &mut GPIODENH[src]

pub fn gpioodctla(&self) -> &GPIOODCTLA[src]

pub fn gpioodctla_mut(&self) -> &mut GPIOODCTLA[src]

pub fn gpioodctl0(&self) -> &GPIOODCTL0[src]

pub fn gpioodctl0_mut(&self) -> &mut GPIOODCTL0[src]

pub fn gpioodctlb(&self) -> &GPIOODCTLB[src]

pub fn gpioodctlb_mut(&self) -> &mut GPIOODCTLB[src]

pub fn gpioodctlc(&self) -> &GPIOODCTLC[src]

pub fn gpioodctlc_mut(&self) -> &mut GPIOODCTLC[src]

pub fn gpioodctl1(&self) -> &GPIOODCTL1[src]

pub fn gpioodctl1_mut(&self) -> &mut GPIOODCTL1[src]

pub fn gpioodctld(&self) -> &GPIOODCTLD[src]

pub fn gpioodctld_mut(&self) -> &mut GPIOODCTLD[src]

pub fn gpioodctle(&self) -> &GPIOODCTLE[src]

pub fn gpioodctle_mut(&self) -> &mut GPIOODCTLE[src]

pub fn gpioodctl2(&self) -> &GPIOODCTL2[src]

pub fn gpioodctl2_mut(&self) -> &mut GPIOODCTL2[src]

pub fn gpioodctlf(&self) -> &GPIOODCTLF[src]

pub fn gpioodctlf_mut(&self) -> &mut GPIOODCTLF[src]

pub fn gpioodctlg(&self) -> &GPIOODCTLG[src]

pub fn gpioodctlg_mut(&self) -> &mut GPIOODCTLG[src]

pub fn gpioodctl3(&self) -> &GPIOODCTL3[src]

pub fn gpioodctl3_mut(&self) -> &mut GPIOODCTL3[src]

pub fn gpioodctlh(&self) -> &GPIOODCTLH[src]

pub fn gpioodctlh_mut(&self) -> &mut GPIOODCTLH[src]

pub fn gpiodsctla(&self) -> &GPIODSCTLA[src]

pub fn gpiodsctla_mut(&self) -> &mut GPIODSCTLA[src]

pub fn gpiodsctl0(&self) -> &GPIODSCTL0[src]

pub fn gpiodsctl0_mut(&self) -> &mut GPIODSCTL0[src]

pub fn gpiodsctlb(&self) -> &GPIODSCTLB[src]

pub fn gpiodsctlb_mut(&self) -> &mut GPIODSCTLB[src]

pub fn gpiodsctlc(&self) -> &GPIODSCTLC[src]

pub fn gpiodsctlc_mut(&self) -> &mut GPIODSCTLC[src]

pub fn gpiodsctl1(&self) -> &GPIODSCTL1[src]

pub fn gpiodsctl1_mut(&self) -> &mut GPIODSCTL1[src]

pub fn gpiodsctld(&self) -> &GPIODSCTLD[src]

pub fn gpiodsctld_mut(&self) -> &mut GPIODSCTLD[src]

pub fn gpiodsctle(&self) -> &GPIODSCTLE[src]

pub fn gpiodsctle_mut(&self) -> &mut GPIODSCTLE[src]

pub fn gpiodsctl2(&self) -> &GPIODSCTL2[src]

pub fn gpiodsctl2_mut(&self) -> &mut GPIODSCTL2[src]

pub fn gpiodsctlf(&self) -> &GPIODSCTLF[src]

pub fn gpiodsctlf_mut(&self) -> &mut GPIODSCTLF[src]

pub fn gpiodsctlg(&self) -> &GPIODSCTLG[src]

pub fn gpiodsctlg_mut(&self) -> &mut GPIODSCTLG[src]

pub fn gpiodsctl3(&self) -> &GPIODSCTL3[src]

pub fn gpiodsctl3_mut(&self) -> &mut GPIODSCTL3[src]

pub fn gpiodsctlh(&self) -> &GPIODSCTLH[src]

pub fn gpiodsctlh_mut(&self) -> &mut GPIODSCTLH[src]

pub fn gpiopuctla(&self) -> &GPIOPUCTLA[src]

pub fn gpiopuctla_mut(&self) -> &mut GPIOPUCTLA[src]

pub fn gpiopuctl0(&self) -> &GPIOPUCTL0[src]

pub fn gpiopuctl0_mut(&self) -> &mut GPIOPUCTL0[src]