[−][src]Type Definition imxrt1062_pmu::misc1_set::W
type W = W<u32, MISC1_SET>;
Writer for register MISC1_SET
Methods
impl W
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pub fn lvds1_clk_sel(&mut self) -> LVDS1_CLK_SEL_W
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Bits 0:4 - This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
pub fn lvds2_clk_sel(&mut self) -> LVDS2_CLK_SEL_W
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Bits 5:9 - This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
pub fn lvdsclk1_oben(&mut self) -> LVDSCLK1_OBEN_W
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Bit 10 - This enables the LVDS output buffer for anaclk1/1b
pub fn lvdsclk2_oben(&mut self) -> LVDSCLK2_OBEN_W
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Bit 11 - This enables the LVDS output buffer for anaclk2/2b
pub fn lvdsclk1_iben(&mut self) -> LVDSCLK1_IBEN_W
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Bit 12 - This enables the LVDS input buffer for anaclk1/1b
pub fn lvdsclk2_iben(&mut self) -> LVDSCLK2_IBEN_W
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Bit 13 - This enables the LVDS input buffer for anaclk2/2b
pub fn pfd_480_autogate_en(&mut self) -> PFD_480_AUTOGATE_EN_W
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Bit 16 - This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
pub fn pfd_528_autogate_en(&mut self) -> PFD_528_AUTOGATE_EN_W
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Bit 17 - This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off
pub fn irq_temppanic(&mut self) -> IRQ_TEMPPANIC_W
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Bit 27 - This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
pub fn irq_templow(&mut self) -> IRQ_TEMPLOW_W
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Bit 28 - This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
pub fn irq_temphigh(&mut self) -> IRQ_TEMPHIGH_W
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Bit 29 - This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
pub fn irq_ana_bo(&mut self) -> IRQ_ANA_BO_W
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Bit 30 - This status bit is set to one when when any of the analog regulator brownout interrupts assert
pub fn irq_dig_bo(&mut self) -> IRQ_DIG_BO_W
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Bit 31 - This status bit is set to one when when any of the digital regulator brownout interrupts assert