[−][src]Type Definition imxrt1062_lcdif::vdctrl3::W
type W = W<u32, VDCTRL3>;
Writer for register VDCTRL3
Methods
impl W
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pub fn vertical_wait_cnt(&mut self) -> VERTICAL_WAIT_CNT_W
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Bits 0:15 - In the VSYNC interface mode, wait for this number of DISPLAY CLOCK (pix_clk) cycles from the falling VSYNC edge (or rising if VSYNC_POL is 1) before starting LCD transactions and is applicable only if WAIT_FOR_VSYNC_EDGE is set
pub fn horizontal_wait_cnt(&mut self) -> HORIZONTAL_WAIT_CNT_W
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Bits 16:27 - In the DOTCLK mode, wait for this number of clocks from falling edge (or rising if HSYNC_POL is 1) of HSYNC signal to account for horizontal back porch plus the number of DOTCLKs before the moving picture information begins
pub fn vsync_only(&mut self) -> VSYNC_ONLY_W
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Bit 28 - This bit must be set to 1 in the VSYNC mode of operation, and 0 in the DOTCLK mode of operation.
pub fn mux_sync_signals(&mut self) -> MUX_SYNC_SIGNALS_W
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Bit 29 - When this bit is set, the LCDIF block will internally mux HSYNC with LCD_D14, DOTCLK with LCD_D13 and ENABLE with LCD_D12, otherwise these signals will go out on separate pins