[][src]Type Definition imxrt1062_ccm::ccgr6::R

type R = R<u32, CCGR6>;

Reader of register CCGR6

Methods

impl R[src]

pub fn cg0(&self) -> CG0_R[src]

Bits 0:1 - usboh3 clock (usboh3_clk_enable)

pub fn cg1(&self) -> CG1_R[src]

Bits 2:3 - usdhc1 clocks (usdhc1_clk_enable)

pub fn cg2(&self) -> CG2_R[src]

Bits 4:5 - usdhc2 clocks (usdhc2_clk_enable)

pub fn cg3(&self) -> CG3_R[src]

Bits 6:7 - dcdc clocks (dcdc_clk_enable)

pub fn cg4(&self) -> CG4_R[src]

Bits 8:9 - ipmux4 clock (ipmux4_clk_enable)

pub fn cg5(&self) -> CG5_R[src]

Bits 10:11 - flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared

pub fn cg6(&self) -> CG6_R[src]

Bits 12:13 - trng clock (trng_clk_enable)

pub fn cg7(&self) -> CG7_R[src]

Bits 14:15 - lpuart8 clocks (lpuart8_clk_enable)

pub fn cg8(&self) -> CG8_R[src]

Bits 16:17 - timer4 clocks (timer4_clk_enable)

pub fn cg9(&self) -> CG9_R[src]

Bits 18:19 - aips_tz3 clock (aips_tz3_clk_enable)

pub fn cg10(&self) -> CG10_R[src]

Bits 20:21 - sim_axbs_p_clk_enable

pub fn cg11(&self) -> CG11_R[src]

Bits 22:23 - anadig clocks (anadig_clk_enable)

pub fn cg12(&self) -> CG12_R[src]

Bits 24:25 - lpi2c4 serial clock (lpi2c4_serial_clk_enable)

pub fn cg13(&self) -> CG13_R[src]

Bits 26:27 - timer1 clocks (timer1_clk_enable)

pub fn cg14(&self) -> CG14_R[src]

Bits 28:29 - timer2 clocks (timer2_clk_enable)

pub fn cg15(&self) -> CG15_R[src]

Bits 30:31 - timer3 clocks (timer3_clk_enable)