[−][src]Struct imxrt1062_ccm::R
Register/field reader
Result of the read
method of a register.
Also it can be used in the modify
method
Methods
impl<U, T> R<U, T> where
U: Copy,
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U: Copy,
impl<FI> R<bool, FI>
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pub fn bit(&self) -> bool
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Value of the field as raw bits
pub fn bit_is_clear(&self) -> bool
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Returns true
if the bit is clear (0)
pub fn bit_is_set(&self) -> bool
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Returns true
if the bit is set (1)
impl R<bool, COSC_EN_A>
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pub fn variant(&self) -> COSC_EN_A
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Get enumerated values variant
pub fn is_cosc_en_0(&self) -> bool
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Checks if the value of the field is COSC_EN_0
pub fn is_cosc_en_1(&self) -> bool
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Checks if the value of the field is COSC_EN_1
impl R<u8, REG_BYPASS_COUNT_A>
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pub fn variant(&self) -> Variant<u8, REG_BYPASS_COUNT_A>
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Get enumerated values variant
pub fn is_reg_bypass_count_0(&self) -> bool
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Checks if the value of the field is REG_BYPASS_COUNT_0
pub fn is_reg_bypass_count_1(&self) -> bool
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Checks if the value of the field is REG_BYPASS_COUNT_1
pub fn is_reg_bypass_count_63(&self) -> bool
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Checks if the value of the field is REG_BYPASS_COUNT_63
impl R<bool, RBC_EN_A>
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pub fn variant(&self) -> RBC_EN_A
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Get enumerated values variant
pub fn is_rbc_en_0(&self) -> bool
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Checks if the value of the field is RBC_EN_0
pub fn is_rbc_en_1(&self) -> bool
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Checks if the value of the field is RBC_EN_1
impl R<u32, Reg<u32, _CCR>>
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pub fn oscnt(&self) -> OSCNT_R
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Bits 0:7 - Oscillator ready counter value. These bits define value of 32KHz counter, that serve as counter for oscillator lock time (count to n+1 ckil's). This is used for oscillator lock time. Current estimation is ~5ms. This counter will be used in ignition sequence and in wake from stop sequence if sbyos bit was defined, to notify that on chip oscillator output is ready for the dpll_ip to use and only then the gate in dpll_ip can be opened.
pub fn cosc_en(&self) -> COSC_EN_R
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Bit 12 - On chip oscillator enable bit - this bit value is reflected on the output cosc_en
pub fn reg_bypass_count(&self) -> REG_BYPASS_COUNT_R
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Bits 21:26 - Counter for analog_reg_bypass signal assertion after standby voltage request by PMIC_STBY_REQ
pub fn rbc_en(&self) -> RBC_EN_R
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Bit 27 - Enable for REG_BYPASS_COUNTER
impl R<bool, REF_EN_B_A>
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pub fn variant(&self) -> REF_EN_B_A
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Get enumerated values variant
pub fn is_ref_en_b_0(&self) -> bool
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Checks if the value of the field is REF_EN_B_0
pub fn is_ref_en_b_1(&self) -> bool
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Checks if the value of the field is REF_EN_B_1
impl R<bool, CAMP2_READY_A>
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pub fn variant(&self) -> CAMP2_READY_A
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Get enumerated values variant
pub fn is_camp2_ready_0(&self) -> bool
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Checks if the value of the field is CAMP2_READY_0
pub fn is_camp2_ready_1(&self) -> bool
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Checks if the value of the field is CAMP2_READY_1
impl R<bool, COSC_READY_A>
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pub fn variant(&self) -> COSC_READY_A
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Get enumerated values variant
pub fn is_cosc_ready_0(&self) -> bool
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Checks if the value of the field is COSC_READY_0
pub fn is_cosc_ready_1(&self) -> bool
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Checks if the value of the field is COSC_READY_1
impl R<u32, Reg<u32, _CSR>>
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pub fn ref_en_b(&self) -> REF_EN_B_R
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Bit 0 - Status of the value of CCM_REF_EN_B output of ccm
pub fn camp2_ready(&self) -> CAMP2_READY_R
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Bit 3 - Status indication of CAMP2.
pub fn cosc_ready(&self) -> COSC_READY_R
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Bit 5 - Status indication of on board oscillator
impl R<bool, PLL3_SW_CLK_SEL_A>
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pub fn variant(&self) -> PLL3_SW_CLK_SEL_A
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Get enumerated values variant
pub fn is_pll3_sw_clk_sel_0(&self) -> bool
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Checks if the value of the field is PLL3_SW_CLK_SEL_0
pub fn is_pll3_sw_clk_sel_1(&self) -> bool
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Checks if the value of the field is PLL3_SW_CLK_SEL_1
impl R<u32, Reg<u32, _CCSR>>
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pub fn pll3_sw_clk_sel(&self) -> PLL3_SW_CLK_SEL_R
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Bit 0 - Selects source to generate pll3_sw_clk. This bit should only be used for testing purposes.
impl R<u8, ARM_PODF_A>
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pub fn variant(&self) -> ARM_PODF_A
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Get enumerated values variant
pub fn is_arm_podf_0(&self) -> bool
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Checks if the value of the field is ARM_PODF_0
pub fn is_arm_podf_1(&self) -> bool
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Checks if the value of the field is ARM_PODF_1
pub fn is_arm_podf_2(&self) -> bool
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Checks if the value of the field is ARM_PODF_2
pub fn is_arm_podf_3(&self) -> bool
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Checks if the value of the field is ARM_PODF_3
pub fn is_arm_podf_4(&self) -> bool
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Checks if the value of the field is ARM_PODF_4
pub fn is_arm_podf_5(&self) -> bool
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Checks if the value of the field is ARM_PODF_5
pub fn is_arm_podf_6(&self) -> bool
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Checks if the value of the field is ARM_PODF_6
pub fn is_arm_podf_7(&self) -> bool
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Checks if the value of the field is ARM_PODF_7
impl R<u32, Reg<u32, _CACRR>>
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pub fn arm_podf(&self) -> ARM_PODF_R
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Bits 0:2 - Divider for ARM clock root
impl R<bool, SEMC_CLK_SEL_A>
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pub fn variant(&self) -> SEMC_CLK_SEL_A
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Get enumerated values variant
pub fn is_semc_clk_sel_0(&self) -> bool
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Checks if the value of the field is SEMC_CLK_SEL_0
pub fn is_semc_clk_sel_1(&self) -> bool
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Checks if the value of the field is SEMC_CLK_SEL_1
impl R<bool, SEMC_ALT_CLK_SEL_A>
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pub fn variant(&self) -> SEMC_ALT_CLK_SEL_A
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Get enumerated values variant
pub fn is_semc_alt_clk_sel_0(&self) -> bool
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Checks if the value of the field is SEMC_ALT_CLK_SEL_0
pub fn is_semc_alt_clk_sel_1(&self) -> bool
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Checks if the value of the field is SEMC_ALT_CLK_SEL_1
impl R<u8, IPG_PODF_A>
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pub fn variant(&self) -> IPG_PODF_A
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Get enumerated values variant
pub fn is_ipg_podf_0(&self) -> bool
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Checks if the value of the field is IPG_PODF_0
pub fn is_ipg_podf_1(&self) -> bool
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Checks if the value of the field is IPG_PODF_1
pub fn is_ipg_podf_2(&self) -> bool
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Checks if the value of the field is IPG_PODF_2
pub fn is_ipg_podf_3(&self) -> bool
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Checks if the value of the field is IPG_PODF_3
impl R<u8, AHB_PODF_A>
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pub fn variant(&self) -> AHB_PODF_A
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Get enumerated values variant
pub fn is_ahb_podf_0(&self) -> bool
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Checks if the value of the field is AHB_PODF_0
pub fn is_ahb_podf_1(&self) -> bool
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Checks if the value of the field is AHB_PODF_1
pub fn is_ahb_podf_2(&self) -> bool
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Checks if the value of the field is AHB_PODF_2
pub fn is_ahb_podf_3(&self) -> bool
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Checks if the value of the field is AHB_PODF_3
pub fn is_ahb_podf_4(&self) -> bool
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Checks if the value of the field is AHB_PODF_4
pub fn is_ahb_podf_5(&self) -> bool
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Checks if the value of the field is AHB_PODF_5
pub fn is_ahb_podf_6(&self) -> bool
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Checks if the value of the field is AHB_PODF_6
pub fn is_ahb_podf_7(&self) -> bool
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Checks if the value of the field is AHB_PODF_7
impl R<u8, SEMC_PODF_A>
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pub fn variant(&self) -> SEMC_PODF_A
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Get enumerated values variant
pub fn is_semc_podf_0(&self) -> bool
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Checks if the value of the field is SEMC_PODF_0
pub fn is_semc_podf_1(&self) -> bool
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Checks if the value of the field is SEMC_PODF_1
pub fn is_semc_podf_2(&self) -> bool
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Checks if the value of the field is SEMC_PODF_2
pub fn is_semc_podf_3(&self) -> bool
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Checks if the value of the field is SEMC_PODF_3
pub fn is_semc_podf_4(&self) -> bool
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Checks if the value of the field is SEMC_PODF_4
pub fn is_semc_podf_5(&self) -> bool
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Checks if the value of the field is SEMC_PODF_5
pub fn is_semc_podf_6(&self) -> bool
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Checks if the value of the field is SEMC_PODF_6
pub fn is_semc_podf_7(&self) -> bool
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Checks if the value of the field is SEMC_PODF_7
impl R<bool, PERIPH_CLK_SEL_A>
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pub fn variant(&self) -> PERIPH_CLK_SEL_A
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Get enumerated values variant
pub fn is_periph_clk_sel_0(&self) -> bool
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Checks if the value of the field is PERIPH_CLK_SEL_0
pub fn is_periph_clk_sel_1(&self) -> bool
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Checks if the value of the field is PERIPH_CLK_SEL_1
impl R<u8, PERIPH_CLK2_PODF_A>
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pub fn variant(&self) -> PERIPH_CLK2_PODF_A
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Get enumerated values variant
pub fn is_periph_clk2_podf_0(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_0
pub fn is_periph_clk2_podf_1(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_1
pub fn is_periph_clk2_podf_2(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_2
pub fn is_periph_clk2_podf_3(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_3
pub fn is_periph_clk2_podf_4(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_4
pub fn is_periph_clk2_podf_5(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_5
pub fn is_periph_clk2_podf_6(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_6
pub fn is_periph_clk2_podf_7(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_PODF_7
impl R<u32, Reg<u32, _CBCDR>>
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pub fn semc_clk_sel(&self) -> SEMC_CLK_SEL_R
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Bit 6 - SEMC clock source select
pub fn semc_alt_clk_sel(&self) -> SEMC_ALT_CLK_SEL_R
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Bit 7 - SEMC alternative clock select
pub fn ipg_podf(&self) -> IPG_PODF_R
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Bits 8:9 - Divider for ipg podf.
pub fn ahb_podf(&self) -> AHB_PODF_R
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Bits 10:12 - Divider for AHB PODF
pub fn semc_podf(&self) -> SEMC_PODF_R
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Bits 16:18 - Post divider for SEMC clock
pub fn periph_clk_sel(&self) -> PERIPH_CLK_SEL_R
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Bit 25 - Selector for peripheral main clock
pub fn periph_clk2_podf(&self) -> PERIPH_CLK2_PODF_R
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Bits 27:29 - Divider for periph_clk2_podf.
impl R<u8, LPSPI_CLK_SEL_A>
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pub fn variant(&self) -> LPSPI_CLK_SEL_A
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Get enumerated values variant
pub fn is_lpspi_clk_sel_0(&self) -> bool
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Checks if the value of the field is LPSPI_CLK_SEL_0
pub fn is_lpspi_clk_sel_1(&self) -> bool
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Checks if the value of the field is LPSPI_CLK_SEL_1
pub fn is_lpspi_clk_sel_2(&self) -> bool
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Checks if the value of the field is LPSPI_CLK_SEL_2
pub fn is_lpspi_clk_sel_3(&self) -> bool
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Checks if the value of the field is LPSPI_CLK_SEL_3
impl R<u8, FLEXSPI2_CLK_SEL_A>
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pub fn variant(&self) -> FLEXSPI2_CLK_SEL_A
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Get enumerated values variant
pub fn is_flexspi2_clk_sel_0(&self) -> bool
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Checks if the value of the field is FLEXSPI2_CLK_SEL_0
pub fn is_flexspi2_clk_sel_1(&self) -> bool
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Checks if the value of the field is FLEXSPI2_CLK_SEL_1
pub fn is_flexspi2_clk_sel_2(&self) -> bool
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Checks if the value of the field is FLEXSPI2_CLK_SEL_2
pub fn is_flexspi2_clk_sel_3(&self) -> bool
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Checks if the value of the field is FLEXSPI2_CLK_SEL_3
impl R<u8, PERIPH_CLK2_SEL_A>
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pub fn variant(&self) -> Variant<u8, PERIPH_CLK2_SEL_A>
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Get enumerated values variant
pub fn is_periph_clk2_sel_0(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_SEL_0
pub fn is_periph_clk2_sel_1(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_SEL_1
pub fn is_periph_clk2_sel_2(&self) -> bool
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Checks if the value of the field is PERIPH_CLK2_SEL_2
impl R<u8, TRACE_CLK_SEL_A>
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pub fn variant(&self) -> TRACE_CLK_SEL_A
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Get enumerated values variant
pub fn is_trace_clk_sel_0(&self) -> bool
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Checks if the value of the field is TRACE_CLK_SEL_0
pub fn is_trace_clk_sel_1(&self) -> bool
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Checks if the value of the field is TRACE_CLK_SEL_1
pub fn is_trace_clk_sel_2(&self) -> bool
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Checks if the value of the field is TRACE_CLK_SEL_2
pub fn is_trace_clk_sel_3(&self) -> bool
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Checks if the value of the field is TRACE_CLK_SEL_3
impl R<u8, PRE_PERIPH_CLK_SEL_A>
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pub fn variant(&self) -> PRE_PERIPH_CLK_SEL_A
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Get enumerated values variant
pub fn is_pre_periph_clk_sel_0(&self) -> bool
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Checks if the value of the field is PRE_PERIPH_CLK_SEL_0
pub fn is_pre_periph_clk_sel_1(&self) -> bool
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Checks if the value of the field is PRE_PERIPH_CLK_SEL_1
pub fn is_pre_periph_clk_sel_2(&self) -> bool
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Checks if the value of the field is PRE_PERIPH_CLK_SEL_2
pub fn is_pre_periph_clk_sel_3(&self) -> bool
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Checks if the value of the field is PRE_PERIPH_CLK_SEL_3
impl R<u8, LCDIF_PODF_A>
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pub fn variant(&self) -> LCDIF_PODF_A
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Get enumerated values variant
pub fn is_lcdif_podf_0(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_0
pub fn is_lcdif_podf_1(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_1
pub fn is_lcdif_podf_2(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_2
pub fn is_lcdif_podf_3(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_3
pub fn is_lcdif_podf_4(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_4
pub fn is_lcdif_podf_5(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_5
pub fn is_lcdif_podf_6(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_6
pub fn is_lcdif_podf_7(&self) -> bool
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Checks if the value of the field is LCDIF_PODF_7
impl R<u8, LPSPI_PODF_A>
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pub fn variant(&self) -> LPSPI_PODF_A
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Get enumerated values variant
pub fn is_lpspi_podf_0(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_0
pub fn is_lpspi_podf_1(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_1
pub fn is_lpspi_podf_2(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_2
pub fn is_lpspi_podf_3(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_3
pub fn is_lpspi_podf_4(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_4
pub fn is_lpspi_podf_5(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_5
pub fn is_lpspi_podf_6(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_6
pub fn is_lpspi_podf_7(&self) -> bool
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Checks if the value of the field is LPSPI_PODF_7
impl R<u8, FLEXSPI2_PODF_A>
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pub fn variant(&self) -> FLEXSPI2_PODF_A
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Get enumerated values variant
pub fn is_flexspi2_podf_0(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_0
pub fn is_flexspi2_podf_1(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_1
pub fn is_flexspi2_podf_2(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_2
pub fn is_flexspi2_podf_3(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_3
pub fn is_flexspi2_podf_4(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_4
pub fn is_flexspi2_podf_5(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_5
pub fn is_flexspi2_podf_6(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_6
pub fn is_flexspi2_podf_7(&self) -> bool
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Checks if the value of the field is FLEXSPI2_PODF_7
impl R<u32, Reg<u32, _CBCMR>>
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pub fn lpspi_clk_sel(&self) -> LPSPI_CLK_SEL_R
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Bits 4:5 - Selector for lpspi clock multiplexer
pub fn flexspi2_clk_sel(&self) -> FLEXSPI2_CLK_SEL_R
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Bits 8:9 - Selector for flexspi2 clock multiplexer
pub fn periph_clk2_sel(&self) -> PERIPH_CLK2_SEL_R
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Bits 12:13 - Selector for peripheral clk2 clock multiplexer
pub fn trace_clk_sel(&self) -> TRACE_CLK_SEL_R
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Bits 14:15 - Selector for Trace clock multiplexer
pub fn pre_periph_clk_sel(&self) -> PRE_PERIPH_CLK_SEL_R
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Bits 18:19 - Selector for pre_periph clock multiplexer
pub fn lcdif_podf(&self) -> LCDIF_PODF_R
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Bits 23:25 - Post-divider for LCDIF clock.
pub fn lpspi_podf(&self) -> LPSPI_PODF_R
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Bits 26:28 - Divider for LPSPI. Divider should be updated when output clock is gated.
pub fn flexspi2_podf(&self) -> FLEXSPI2_PODF_R
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Bits 29:31 - Divider for flexspi2 clock root.
impl R<u8, PERCLK_PODF_A>
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pub fn variant(&self) -> PERCLK_PODF_A
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Get enumerated values variant
pub fn is_divide_1(&self) -> bool
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Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
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Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
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Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
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Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
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Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
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Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
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Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
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Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
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Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
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Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
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Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
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Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
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Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
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Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
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Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
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Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
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Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
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Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
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Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
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Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
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Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
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Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
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Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
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Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
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Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
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Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
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Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
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Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
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Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
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Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
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Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
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Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<bool, PERCLK_CLK_SEL_A>
[src]
pub fn variant(&self) -> PERCLK_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_perclk_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is PERCLK_CLK_SEL_0
pub fn is_perclk_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is PERCLK_CLK_SEL_1
impl R<u8, SAI1_CLK_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, SAI1_CLK_SEL_A>
[src]
Get enumerated values variant
pub fn is_sai1_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_SEL_0
pub fn is_sai1_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_SEL_1
pub fn is_sai1_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_SEL_2
impl R<u8, SAI2_CLK_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, SAI2_CLK_SEL_A>
[src]
Get enumerated values variant
pub fn is_sai2_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_SEL_0
pub fn is_sai2_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_SEL_1
pub fn is_sai2_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_SEL_2
impl R<u8, SAI3_CLK_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, SAI3_CLK_SEL_A>
[src]
Get enumerated values variant
pub fn is_sai3_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_SEL_0
pub fn is_sai3_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_SEL_1
pub fn is_sai3_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_SEL_2
impl R<bool, USDHC1_CLK_SEL_A>
[src]
pub fn variant(&self) -> USDHC1_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_usdhc1_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is USDHC1_CLK_SEL_0
pub fn is_usdhc1_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is USDHC1_CLK_SEL_1
impl R<bool, USDHC2_CLK_SEL_A>
[src]
pub fn variant(&self) -> USDHC2_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_usdhc2_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is USDHC2_CLK_SEL_0
pub fn is_usdhc2_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is USDHC2_CLK_SEL_1
impl R<u8, FLEXSPI_PODF_A>
[src]
pub fn variant(&self) -> FLEXSPI_PODF_A
[src]
Get enumerated values variant
pub fn is_flexspi_podf_0(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_0
pub fn is_flexspi_podf_1(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_1
pub fn is_flexspi_podf_2(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_2
pub fn is_flexspi_podf_3(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_3
pub fn is_flexspi_podf_4(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_4
pub fn is_flexspi_podf_5(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_5
pub fn is_flexspi_podf_6(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_6
pub fn is_flexspi_podf_7(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_PODF_7
impl R<u8, FLEXSPI_CLK_SEL_A>
[src]
pub fn variant(&self) -> FLEXSPI_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_flexspi_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_CLK_SEL_0
pub fn is_flexspi_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_CLK_SEL_1
pub fn is_flexspi_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_CLK_SEL_2
pub fn is_flexspi_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is FLEXSPI_CLK_SEL_3
impl R<u32, Reg<u32, _CSCMR1>>
[src]
pub fn perclk_podf(&self) -> PERCLK_PODF_R
[src]
Bits 0:5 - Divider for perclk podf.
pub fn perclk_clk_sel(&self) -> PERCLK_CLK_SEL_R
[src]
Bit 6 - Selector for the perclk clock multiplexor
pub fn sai1_clk_sel(&self) -> SAI1_CLK_SEL_R
[src]
Bits 10:11 - Selector for sai1 clock multiplexer
pub fn sai2_clk_sel(&self) -> SAI2_CLK_SEL_R
[src]
Bits 12:13 - Selector for sai2 clock multiplexer
pub fn sai3_clk_sel(&self) -> SAI3_CLK_SEL_R
[src]
Bits 14:15 - Selector for sai3/adc1/adc2 clock multiplexer
pub fn usdhc1_clk_sel(&self) -> USDHC1_CLK_SEL_R
[src]
Bit 16 - Selector for usdhc1 clock multiplexer
pub fn usdhc2_clk_sel(&self) -> USDHC2_CLK_SEL_R
[src]
Bit 17 - Selector for usdhc2 clock multiplexer
pub fn flexspi_podf(&self) -> FLEXSPI_PODF_R
[src]
Bits 23:25 - Divider for flexspi clock root.
pub fn flexspi_clk_sel(&self) -> FLEXSPI_CLK_SEL_R
[src]
Bits 29:30 - Selector for flexspi clock multiplexer
impl R<u8, CAN_CLK_PODF_A>
[src]
pub fn variant(&self) -> CAN_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<u8, CAN_CLK_SEL_A>
[src]
pub fn variant(&self) -> CAN_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_can_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is CAN_CLK_SEL_0
pub fn is_can_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is CAN_CLK_SEL_1
pub fn is_can_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is CAN_CLK_SEL_2
pub fn is_can_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is CAN_CLK_SEL_3
impl R<u8, FLEXIO2_CLK_SEL_A>
[src]
pub fn variant(&self) -> FLEXIO2_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_flexio2_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_SEL_0
pub fn is_flexio2_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_SEL_1
pub fn is_flexio2_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_SEL_2
pub fn is_flexio2_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_SEL_3
impl R<u32, Reg<u32, _CSCMR2>>
[src]
pub fn can_clk_podf(&self) -> CAN_CLK_PODF_R
[src]
Bits 2:7 - Divider for CAN/CANFD clock podf.
pub fn can_clk_sel(&self) -> CAN_CLK_SEL_R
[src]
Bits 8:9 - Selector for CAN/CANFD clock multiplexer
pub fn flexio2_clk_sel(&self) -> FLEXIO2_CLK_SEL_R
[src]
Bits 19:20 - Selector for flexio2/flexio3 clock multiplexer
impl R<u8, UART_CLK_PODF_A>
[src]
pub fn variant(&self) -> UART_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<bool, UART_CLK_SEL_A>
[src]
pub fn variant(&self) -> UART_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_uart_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is UART_CLK_SEL_0
pub fn is_uart_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is UART_CLK_SEL_1
impl R<u8, USDHC1_PODF_A>
[src]
pub fn variant(&self) -> USDHC1_PODF_A
[src]
Get enumerated values variant
pub fn is_usdhc1_podf_0(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_0
pub fn is_usdhc1_podf_1(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_1
pub fn is_usdhc1_podf_2(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_2
pub fn is_usdhc1_podf_3(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_3
pub fn is_usdhc1_podf_4(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_4
pub fn is_usdhc1_podf_5(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_5
pub fn is_usdhc1_podf_6(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_6
pub fn is_usdhc1_podf_7(&self) -> bool
[src]
Checks if the value of the field is USDHC1_PODF_7
impl R<u8, USDHC2_PODF_A>
[src]
pub fn variant(&self) -> USDHC2_PODF_A
[src]
Get enumerated values variant
pub fn is_usdhc2_podf_0(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_0
pub fn is_usdhc2_podf_1(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_1
pub fn is_usdhc2_podf_2(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_2
pub fn is_usdhc2_podf_3(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_3
pub fn is_usdhc2_podf_4(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_4
pub fn is_usdhc2_podf_5(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_5
pub fn is_usdhc2_podf_6(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_6
pub fn is_usdhc2_podf_7(&self) -> bool
[src]
Checks if the value of the field is USDHC2_PODF_7
impl R<u8, TRACE_PODF_A>
[src]
pub fn variant(&self) -> TRACE_PODF_A
[src]
Get enumerated values variant
pub fn is_trace_podf_0(&self) -> bool
[src]
Checks if the value of the field is TRACE_PODF_0
pub fn is_trace_podf_1(&self) -> bool
[src]
Checks if the value of the field is TRACE_PODF_1
pub fn is_trace_podf_2(&self) -> bool
[src]
Checks if the value of the field is TRACE_PODF_2
pub fn is_trace_podf_3(&self) -> bool
[src]
Checks if the value of the field is TRACE_PODF_3
impl R<u32, Reg<u32, _CSCDR1>>
[src]
pub fn uart_clk_podf(&self) -> UART_CLK_PODF_R
[src]
Bits 0:5 - Divider for uart clock podf.
pub fn uart_clk_sel(&self) -> UART_CLK_SEL_R
[src]
Bit 6 - Selector for the UART clock multiplexor
pub fn usdhc1_podf(&self) -> USDHC1_PODF_R
[src]
Bits 11:13 - Divider for usdhc1 clock podf. Divider should be updated when output clock is gated.
pub fn usdhc2_podf(&self) -> USDHC2_PODF_R
[src]
Bits 16:18 - Divider for usdhc2 clock. Divider should be updated when output clock is gated.
pub fn trace_podf(&self) -> TRACE_PODF_R
[src]
Bits 25:26 - Divider for trace clock. Divider should be updated when output clock is gated.
impl R<u8, SAI1_CLK_PODF_A>
[src]
pub fn variant(&self) -> SAI1_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<u8, SAI1_CLK_PRED_A>
[src]
pub fn variant(&self) -> SAI1_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_sai1_clk_pred_0(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_0
pub fn is_sai1_clk_pred_1(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_1
pub fn is_sai1_clk_pred_2(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_2
pub fn is_sai1_clk_pred_3(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_3
pub fn is_sai1_clk_pred_4(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_4
pub fn is_sai1_clk_pred_5(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_5
pub fn is_sai1_clk_pred_6(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_6
pub fn is_sai1_clk_pred_7(&self) -> bool
[src]
Checks if the value of the field is SAI1_CLK_PRED_7
impl R<u8, FLEXIO2_CLK_PRED_A>
[src]
pub fn variant(&self) -> FLEXIO2_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_flexio2_clk_pred_0(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_0
pub fn is_flexio2_clk_pred_1(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_1
pub fn is_flexio2_clk_pred_2(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_2
pub fn is_flexio2_clk_pred_3(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_3
pub fn is_flexio2_clk_pred_4(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_4
pub fn is_flexio2_clk_pred_5(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_5
pub fn is_flexio2_clk_pred_6(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_6
pub fn is_flexio2_clk_pred_7(&self) -> bool
[src]
Checks if the value of the field is FLEXIO2_CLK_PRED_7
impl R<u8, SAI3_CLK_PODF_A>
[src]
pub fn variant(&self) -> SAI3_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<u8, SAI3_CLK_PRED_A>
[src]
pub fn variant(&self) -> SAI3_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_sai3_clk_pred_0(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_0
pub fn is_sai3_clk_pred_1(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_1
pub fn is_sai3_clk_pred_2(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_2
pub fn is_sai3_clk_pred_3(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_3
pub fn is_sai3_clk_pred_4(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_4
pub fn is_sai3_clk_pred_5(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_5
pub fn is_sai3_clk_pred_6(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_6
pub fn is_sai3_clk_pred_7(&self) -> bool
[src]
Checks if the value of the field is SAI3_CLK_PRED_7
impl R<u8, FLEXIO2_CLK_PODF_A>
[src]
pub fn variant(&self) -> FLEXIO2_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
impl R<u32, Reg<u32, _CS1CDR>>
[src]
pub fn sai1_clk_podf(&self) -> SAI1_CLK_PODF_R
[src]
Bits 0:5 - Divider for sai1 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
pub fn sai1_clk_pred(&self) -> SAI1_CLK_PRED_R
[src]
Bits 6:8 - Divider for sai1 clock pred.
pub fn flexio2_clk_pred(&self) -> FLEXIO2_CLK_PRED_R
[src]
Bits 9:11 - Divider for flexio2/flexio3 clock.
pub fn sai3_clk_podf(&self) -> SAI3_CLK_PODF_R
[src]
Bits 16:21 - Divider for sai3 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
pub fn sai3_clk_pred(&self) -> SAI3_CLK_PRED_R
[src]
Bits 22:24 - Divider for sai3/adc1/adc2 clock pred.
pub fn flexio2_clk_podf(&self) -> FLEXIO2_CLK_PODF_R
[src]
Bits 25:27 - Divider for flexio2/flexio3 clock. Divider should be updated when output clock is gated.
impl R<u8, SAI2_CLK_PODF_A>
[src]
pub fn variant(&self) -> SAI2_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<u8, SAI2_CLK_PRED_A>
[src]
pub fn variant(&self) -> SAI2_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_sai2_clk_pred_0(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_0
pub fn is_sai2_clk_pred_1(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_1
pub fn is_sai2_clk_pred_2(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_2
pub fn is_sai2_clk_pred_3(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_3
pub fn is_sai2_clk_pred_4(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_4
pub fn is_sai2_clk_pred_5(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_5
pub fn is_sai2_clk_pred_6(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_6
pub fn is_sai2_clk_pred_7(&self) -> bool
[src]
Checks if the value of the field is SAI2_CLK_PRED_7
impl R<u32, Reg<u32, _CS2CDR>>
[src]
pub fn sai2_clk_podf(&self) -> SAI2_CLK_PODF_R
[src]
Bits 0:5 - Divider for sai2 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
pub fn sai2_clk_pred(&self) -> SAI2_CLK_PRED_R
[src]
Bits 6:8 - Divider for sai2 clock pred.Divider should be updated when output clock is gated.
impl R<u8, FLEXIO1_CLK_SEL_A>
[src]
pub fn variant(&self) -> FLEXIO1_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_flexio1_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is FLEXIO1_CLK_SEL_0
pub fn is_flexio1_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is FLEXIO1_CLK_SEL_1
pub fn is_flexio1_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is FLEXIO1_CLK_SEL_2
pub fn is_flexio1_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is FLEXIO1_CLK_SEL_3
impl R<u8, FLEXIO1_CLK_PODF_A>
[src]
pub fn variant(&self) -> FLEXIO1_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
impl R<u8, FLEXIO1_CLK_PRED_A>
[src]
pub fn variant(&self) -> FLEXIO1_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
impl R<u8, SPDIF0_CLK_SEL_A>
[src]
pub fn variant(&self) -> SPDIF0_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_spdif0_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is SPDIF0_CLK_SEL_0
pub fn is_spdif0_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is SPDIF0_CLK_SEL_1
pub fn is_spdif0_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is SPDIF0_CLK_SEL_2
pub fn is_spdif0_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is SPDIF0_CLK_SEL_3
impl R<u8, SPDIF0_CLK_PODF_A>
[src]
pub fn variant(&self) -> SPDIF0_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
impl R<u8, SPDIF0_CLK_PRED_A>
[src]
pub fn variant(&self) -> SPDIF0_CLK_PRED_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
impl R<u32, Reg<u32, _CDCDR>>
[src]
pub fn flexio1_clk_sel(&self) -> FLEXIO1_CLK_SEL_R
[src]
Bits 7:8 - Selector for flexio1 clock multiplexer
pub fn flexio1_clk_podf(&self) -> FLEXIO1_CLK_PODF_R
[src]
Bits 9:11 - Divider for flexio1 clock podf. Divider should be updated when output clock is gated.
pub fn flexio1_clk_pred(&self) -> FLEXIO1_CLK_PRED_R
[src]
Bits 12:14 - Divider for flexio1 clock pred. Divider should be updated when output clock is gated.
pub fn spdif0_clk_sel(&self) -> SPDIF0_CLK_SEL_R
[src]
Bits 20:21 - Selector for spdif0 clock multiplexer
pub fn spdif0_clk_podf(&self) -> SPDIF0_CLK_PODF_R
[src]
Bits 22:24 - Divider for spdif0 clock podf. Divider should be updated when output clock is gated.
pub fn spdif0_clk_pred(&self) -> SPDIF0_CLK_PRED_R
[src]
Bits 25:27 - Divider for spdif0 clock pred. Divider should be updated when output clock is gated.
impl R<u8, LCDIF_PRED_A>
[src]
pub fn variant(&self) -> LCDIF_PRED_A
[src]
Get enumerated values variant
pub fn is_lcdif_pred_0(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_0
pub fn is_lcdif_pred_1(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_1
pub fn is_lcdif_pred_2(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_2
pub fn is_lcdif_pred_3(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_3
pub fn is_lcdif_pred_4(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_4
pub fn is_lcdif_pred_5(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_5
pub fn is_lcdif_pred_6(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_6
pub fn is_lcdif_pred_7(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRED_7
impl R<u8, LCDIF_PRE_CLK_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, LCDIF_PRE_CLK_SEL_A>
[src]
Get enumerated values variant
pub fn is_lcdif_pre_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_0
pub fn is_lcdif_pre_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_1
pub fn is_lcdif_pre_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_2
pub fn is_lcdif_pre_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_3
pub fn is_lcdif_pre_clk_sel_4(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_4
pub fn is_lcdif_pre_clk_sel_5(&self) -> bool
[src]
Checks if the value of the field is LCDIF_PRE_CLK_SEL_5
impl R<bool, LPI2C_CLK_SEL_A>
[src]
pub fn variant(&self) -> LPI2C_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_lpi2c_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is LPI2C_CLK_SEL_0
pub fn is_lpi2c_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is LPI2C_CLK_SEL_1
impl R<u8, LPI2C_CLK_PODF_A>
[src]
pub fn variant(&self) -> LPI2C_CLK_PODF_A
[src]
Get enumerated values variant
pub fn is_divide_1(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_1
pub fn is_divide_2(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_2
pub fn is_divide_3(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_3
pub fn is_divide_4(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_4
pub fn is_divide_5(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_5
pub fn is_divide_6(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_6
pub fn is_divide_7(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_7
pub fn is_divide_8(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_8
pub fn is_divide_9(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_9
pub fn is_divide_10(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_10
pub fn is_divide_11(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_11
pub fn is_divide_12(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_12
pub fn is_divide_13(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_13
pub fn is_divide_14(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_14
pub fn is_divide_15(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_15
pub fn is_divide_16(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_16
pub fn is_divide_17(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_17
pub fn is_divide_18(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_18
pub fn is_divide_19(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_19
pub fn is_divide_20(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_20
pub fn is_divide_21(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_21
pub fn is_divide_22(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_22
pub fn is_divide_23(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_23
pub fn is_divide_24(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_24
pub fn is_divide_25(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_25
pub fn is_divide_26(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_26
pub fn is_divide_27(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_27
pub fn is_divide_28(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_28
pub fn is_divide_29(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_29
pub fn is_divide_30(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_30
pub fn is_divide_31(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_31
pub fn is_divide_32(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_32
pub fn is_divide_33(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_33
pub fn is_divide_34(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_34
pub fn is_divide_35(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_35
pub fn is_divide_36(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_36
pub fn is_divide_37(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_37
pub fn is_divide_38(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_38
pub fn is_divide_39(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_39
pub fn is_divide_40(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_40
pub fn is_divide_41(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_41
pub fn is_divide_42(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_42
pub fn is_divide_43(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_43
pub fn is_divide_44(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_44
pub fn is_divide_45(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_45
pub fn is_divide_46(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_46
pub fn is_divide_47(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_47
pub fn is_divide_48(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_48
pub fn is_divide_49(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_49
pub fn is_divide_50(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_50
pub fn is_divide_51(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_51
pub fn is_divide_52(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_52
pub fn is_divide_53(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_53
pub fn is_divide_54(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_54
pub fn is_divide_55(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_55
pub fn is_divide_56(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_56
pub fn is_divide_57(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_57
pub fn is_divide_58(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_58
pub fn is_divide_59(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_59
pub fn is_divide_60(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_60
pub fn is_divide_61(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_61
pub fn is_divide_62(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_62
pub fn is_divide_63(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_63
pub fn is_divide_64(&self) -> bool
[src]
Checks if the value of the field is DIVIDE_64
impl R<u32, Reg<u32, _CSCDR2>>
[src]
pub fn lcdif_pred(&self) -> LCDIF_PRED_R
[src]
Bits 12:14 - Pre-divider for lcdif clock. Divider should be updated when output clock is gated.
pub fn lcdif_pre_clk_sel(&self) -> LCDIF_PRE_CLK_SEL_R
[src]
Bits 15:17 - Selector for lcdif root clock pre-multiplexer
pub fn lpi2c_clk_sel(&self) -> LPI2C_CLK_SEL_R
[src]
Bit 18 - Selector for the LPI2C clock multiplexor
pub fn lpi2c_clk_podf(&self) -> LPI2C_CLK_PODF_R
[src]
Bits 19:24 - Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
impl R<u8, CSI_CLK_SEL_A>
[src]
pub fn variant(&self) -> CSI_CLK_SEL_A
[src]
Get enumerated values variant
pub fn is_csi_clk_sel_0(&self) -> bool
[src]
Checks if the value of the field is CSI_CLK_SEL_0
pub fn is_csi_clk_sel_1(&self) -> bool
[src]
Checks if the value of the field is CSI_CLK_SEL_1
pub fn is_csi_clk_sel_2(&self) -> bool
[src]
Checks if the value of the field is CSI_CLK_SEL_2
pub fn is_csi_clk_sel_3(&self) -> bool
[src]
Checks if the value of the field is CSI_CLK_SEL_3
impl R<u8, CSI_PODF_A>
[src]
pub fn variant(&self) -> CSI_PODF_A
[src]
Get enumerated values variant
pub fn is_csi_podf_0(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_0
pub fn is_csi_podf_1(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_1
pub fn is_csi_podf_2(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_2
pub fn is_csi_podf_3(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_3
pub fn is_csi_podf_4(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_4
pub fn is_csi_podf_5(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_5
pub fn is_csi_podf_6(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_6
pub fn is_csi_podf_7(&self) -> bool
[src]
Checks if the value of the field is CSI_PODF_7
impl R<u32, Reg<u32, _CSCDR3>>
[src]
pub fn csi_clk_sel(&self) -> CSI_CLK_SEL_R
[src]
Bits 9:10 - Selector for csi_mclk multiplexer
pub fn csi_podf(&self) -> CSI_PODF_R
[src]
Bits 11:13 - Post divider for csi_mclk. Divider should be updated when output clock is gated.
impl R<bool, SEMC_PODF_BUSY_A>
[src]
pub fn variant(&self) -> SEMC_PODF_BUSY_A
[src]
Get enumerated values variant
pub fn is_semc_podf_busy_0(&self) -> bool
[src]
Checks if the value of the field is SEMC_PODF_BUSY_0
pub fn is_semc_podf_busy_1(&self) -> bool
[src]
Checks if the value of the field is SEMC_PODF_BUSY_1
impl R<bool, AHB_PODF_BUSY_A>
[src]
pub fn variant(&self) -> AHB_PODF_BUSY_A
[src]
Get enumerated values variant
pub fn is_ahb_podf_busy_0(&self) -> bool
[src]
Checks if the value of the field is AHB_PODF_BUSY_0
pub fn is_ahb_podf_busy_1(&self) -> bool
[src]
Checks if the value of the field is AHB_PODF_BUSY_1
impl R<bool, PERIPH2_CLK_SEL_BUSY_A>
[src]
pub fn variant(&self) -> PERIPH2_CLK_SEL_BUSY_A
[src]
Get enumerated values variant
pub fn is_periph2_clk_sel_busy_0(&self) -> bool
[src]
Checks if the value of the field is PERIPH2_CLK_SEL_BUSY_0
pub fn is_periph2_clk_sel_busy_1(&self) -> bool
[src]
Checks if the value of the field is PERIPH2_CLK_SEL_BUSY_1
impl R<bool, PERIPH_CLK_SEL_BUSY_A>
[src]
pub fn variant(&self) -> PERIPH_CLK_SEL_BUSY_A
[src]
Get enumerated values variant
pub fn is_periph_clk_sel_busy_0(&self) -> bool
[src]
Checks if the value of the field is PERIPH_CLK_SEL_BUSY_0
pub fn is_periph_clk_sel_busy_1(&self) -> bool
[src]
Checks if the value of the field is PERIPH_CLK_SEL_BUSY_1
impl R<bool, ARM_PODF_BUSY_A>
[src]
pub fn variant(&self) -> ARM_PODF_BUSY_A
[src]
Get enumerated values variant
pub fn is_arm_podf_busy_0(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_BUSY_0
pub fn is_arm_podf_busy_1(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_BUSY_1
impl R<u32, Reg<u32, _CDHIPR>>
[src]
pub fn semc_podf_busy(&self) -> SEMC_PODF_BUSY_R
[src]
Bit 0 - Busy indicator for semc_podf.
pub fn ahb_podf_busy(&self) -> AHB_PODF_BUSY_R
[src]
Bit 1 - Busy indicator for ahb_podf.
pub fn periph2_clk_sel_busy(&self) -> PERIPH2_CLK_SEL_BUSY_R
[src]
Bit 3 - Busy indicator for periph2_clk_sel mux control.
pub fn periph_clk_sel_busy(&self) -> PERIPH_CLK_SEL_BUSY_R
[src]
Bit 5 - Busy indicator for periph_clk_sel mux control.
pub fn arm_podf_busy(&self) -> ARM_PODF_BUSY_R
[src]
Bit 16 - Busy indicator for arm_podf.
impl R<u8, LPM_A>
[src]
pub fn variant(&self) -> Variant<u8, LPM_A>
[src]
Get enumerated values variant
pub fn is_lpm_0(&self) -> bool
[src]
Checks if the value of the field is LPM_0
pub fn is_lpm_1(&self) -> bool
[src]
Checks if the value of the field is LPM_1
pub fn is_lpm_2(&self) -> bool
[src]
Checks if the value of the field is LPM_2
impl R<bool, ARM_CLK_DIS_ON_LPM_A>
[src]
pub fn variant(&self) -> ARM_CLK_DIS_ON_LPM_A
[src]
Get enumerated values variant
pub fn is_arm_clk_dis_on_lpm_0(&self) -> bool
[src]
Checks if the value of the field is ARM_CLK_DIS_ON_LPM_0
pub fn is_arm_clk_dis_on_lpm_1(&self) -> bool
[src]
Checks if the value of the field is ARM_CLK_DIS_ON_LPM_1
impl R<bool, SBYOS_A>
[src]
pub fn variant(&self) -> SBYOS_A
[src]
Get enumerated values variant
pub fn is_sbyos_0(&self) -> bool
[src]
Checks if the value of the field is SBYOS_0
pub fn is_sbyos_1(&self) -> bool
[src]
Checks if the value of the field is SBYOS_1
impl R<bool, DIS_REF_OSC_A>
[src]
pub fn variant(&self) -> DIS_REF_OSC_A
[src]
Get enumerated values variant
pub fn is_dis_ref_osc_0(&self) -> bool
[src]
Checks if the value of the field is DIS_REF_OSC_0
pub fn is_dis_ref_osc_1(&self) -> bool
[src]
Checks if the value of the field is DIS_REF_OSC_1
impl R<bool, VSTBY_A>
[src]
pub fn variant(&self) -> VSTBY_A
[src]
Get enumerated values variant
pub fn is_vstby_0(&self) -> bool
[src]
Checks if the value of the field is VSTBY_0
pub fn is_vstby_1(&self) -> bool
[src]
Checks if the value of the field is VSTBY_1
impl R<u8, STBY_COUNT_A>
[src]
pub fn variant(&self) -> STBY_COUNT_A
[src]
Get enumerated values variant
pub fn is_stby_count_0(&self) -> bool
[src]
Checks if the value of the field is STBY_COUNT_0
pub fn is_stby_count_1(&self) -> bool
[src]
Checks if the value of the field is STBY_COUNT_1
pub fn is_stby_count_2(&self) -> bool
[src]
Checks if the value of the field is STBY_COUNT_2
pub fn is_stby_count_3(&self) -> bool
[src]
Checks if the value of the field is STBY_COUNT_3
impl R<bool, COSC_PWRDOWN_A>
[src]
pub fn variant(&self) -> COSC_PWRDOWN_A
[src]
Get enumerated values variant
pub fn is_cosc_pwrdown_0(&self) -> bool
[src]
Checks if the value of the field is COSC_PWRDOWN_0
pub fn is_cosc_pwrdown_1(&self) -> bool
[src]
Checks if the value of the field is COSC_PWRDOWN_1
impl R<bool, MASK_CORE0_WFI_A>
[src]
pub fn variant(&self) -> MASK_CORE0_WFI_A
[src]
Get enumerated values variant
pub fn is_mask_core0_wfi_0(&self) -> bool
[src]
Checks if the value of the field is MASK_CORE0_WFI_0
pub fn is_mask_core0_wfi_1(&self) -> bool
[src]
Checks if the value of the field is MASK_CORE0_WFI_1
impl R<bool, MASK_SCU_IDLE_A>
[src]
pub fn variant(&self) -> MASK_SCU_IDLE_A
[src]
Get enumerated values variant
pub fn is_mask_scu_idle_0(&self) -> bool
[src]
Checks if the value of the field is MASK_SCU_IDLE_0
pub fn is_mask_scu_idle_1(&self) -> bool
[src]
Checks if the value of the field is MASK_SCU_IDLE_1
impl R<bool, MASK_L2CC_IDLE_A>
[src]
pub fn variant(&self) -> MASK_L2CC_IDLE_A
[src]
Get enumerated values variant
pub fn is_mask_l2cc_idle_0(&self) -> bool
[src]
Checks if the value of the field is MASK_L2CC_IDLE_0
pub fn is_mask_l2cc_idle_1(&self) -> bool
[src]
Checks if the value of the field is MASK_L2CC_IDLE_1
impl R<u32, Reg<u32, _CLPCR>>
[src]
pub fn lpm(&self) -> LPM_R
[src]
Bits 0:1 - Setting the low power mode that system will enter on next assertion of dsm_request signal.
pub fn arm_clk_dis_on_lpm(&self) -> ARM_CLK_DIS_ON_LPM_R
[src]
Bit 5 - Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode
pub fn sbyos(&self) -> SBYOS_R
[src]
Bit 6 - Standby clock oscillator bit
pub fn dis_ref_osc(&self) -> DIS_REF_OSC_R
[src]
Bit 7 - dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i
pub fn vstby(&self) -> VSTBY_R
[src]
Bit 8 - Voltage standby request bit
pub fn stby_count(&self) -> STBY_COUNT_R
[src]
Bits 9:10 - Standby counter definition
pub fn cosc_pwrdown(&self) -> COSC_PWRDOWN_R
[src]
Bit 11 - In run mode, software can manually control powering down of on chip oscillator, i
pub fn bypass_lpm_hs1(&self) -> BYPASS_LPM_HS1_R
[src]
Bit 19 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.
pub fn bypass_lpm_hs0(&self) -> BYPASS_LPM_HS0_R
[src]
Bit 21 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.
pub fn mask_core0_wfi(&self) -> MASK_CORE0_WFI_R
[src]
Bit 22 - Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request
pub fn mask_scu_idle(&self) -> MASK_SCU_IDLE_R
[src]
Bit 26 - Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request
pub fn mask_l2cc_idle(&self) -> MASK_L2CC_IDLE_R
[src]
Bit 27 - Mask L2CC IDLE for entering low power mode
impl R<bool, LRF_PLL_A>
[src]
pub fn variant(&self) -> LRF_PLL_A
[src]
Get enumerated values variant
pub fn is_lrf_pll_0(&self) -> bool
[src]
Checks if the value of the field is LRF_PLL_0
pub fn is_lrf_pll_1(&self) -> bool
[src]
Checks if the value of the field is LRF_PLL_1
impl R<bool, COSC_READY_A>
[src]
pub fn variant(&self) -> COSC_READY_A
[src]
Get enumerated values variant
pub fn is_cosc_ready_0(&self) -> bool
[src]
Checks if the value of the field is COSC_READY_0
pub fn is_cosc_ready_1(&self) -> bool
[src]
Checks if the value of the field is COSC_READY_1
impl R<bool, SEMC_PODF_LOADED_A>
[src]
pub fn variant(&self) -> SEMC_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_semc_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is SEMC_PODF_LOADED_0
pub fn is_semc_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is SEMC_PODF_LOADED_1
impl R<bool, PERIPH2_CLK_SEL_LOADED_A>
[src]
pub fn variant(&self) -> PERIPH2_CLK_SEL_LOADED_A
[src]
Get enumerated values variant
pub fn is_periph2_clk_sel_loaded_0(&self) -> bool
[src]
Checks if the value of the field is PERIPH2_CLK_SEL_LOADED_0
pub fn is_periph2_clk_sel_loaded_1(&self) -> bool
[src]
Checks if the value of the field is PERIPH2_CLK_SEL_LOADED_1
impl R<bool, AHB_PODF_LOADED_A>
[src]
pub fn variant(&self) -> AHB_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_ahb_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is AHB_PODF_LOADED_0
pub fn is_ahb_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is AHB_PODF_LOADED_1
impl R<bool, PERIPH_CLK_SEL_LOADED_A>
[src]
pub fn variant(&self) -> PERIPH_CLK_SEL_LOADED_A
[src]
Get enumerated values variant
pub fn is_periph_clk_sel_loaded_0(&self) -> bool
[src]
Checks if the value of the field is PERIPH_CLK_SEL_LOADED_0
pub fn is_periph_clk_sel_loaded_1(&self) -> bool
[src]
Checks if the value of the field is PERIPH_CLK_SEL_LOADED_1
impl R<bool, ARM_PODF_LOADED_A>
[src]
pub fn variant(&self) -> ARM_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_arm_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_LOADED_0
pub fn is_arm_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_LOADED_1
impl R<u32, Reg<u32, _CISR>>
[src]
pub fn lrf_pll(&self) -> LRF_PLL_R
[src]
Bit 0 - CCM interrupt request 2 generated due to lock of all enabled and not bypaseed PLLs
pub fn cosc_ready(&self) -> COSC_READY_R
[src]
Bit 6 - CCM interrupt request 2 generated due to on board oscillator ready, i
pub fn semc_podf_loaded(&self) -> SEMC_PODF_LOADED_R
[src]
Bit 17 - CCM interrupt request 1 generated due to frequency change of semc_podf
pub fn periph2_clk_sel_loaded(&self) -> PERIPH2_CLK_SEL_LOADED_R
[src]
Bit 19 - CCM interrupt request 1 generated due to frequency change of periph2_clk_sel
pub fn ahb_podf_loaded(&self) -> AHB_PODF_LOADED_R
[src]
Bit 20 - CCM interrupt request 1 generated due to frequency change of ahb_podf
pub fn periph_clk_sel_loaded(&self) -> PERIPH_CLK_SEL_LOADED_R
[src]
Bit 22 - CCM interrupt request 1 generated due to update of periph_clk_sel.
pub fn arm_podf_loaded(&self) -> ARM_PODF_LOADED_R
[src]
Bit 26 - CCM interrupt request 1 generated due to frequency change of arm_podf
impl R<bool, MASK_LRF_PLL_A>
[src]
pub fn variant(&self) -> MASK_LRF_PLL_A
[src]
Get enumerated values variant
pub fn is_mask_lrf_pll_0(&self) -> bool
[src]
Checks if the value of the field is MASK_LRF_PLL_0
pub fn is_mask_lrf_pll_1(&self) -> bool
[src]
Checks if the value of the field is MASK_LRF_PLL_1
impl R<bool, MASK_COSC_READY_A>
[src]
pub fn variant(&self) -> MASK_COSC_READY_A
[src]
Get enumerated values variant
pub fn is_mask_cosc_ready_0(&self) -> bool
[src]
Checks if the value of the field is MASK_COSC_READY_0
pub fn is_mask_cosc_ready_1(&self) -> bool
[src]
Checks if the value of the field is MASK_COSC_READY_1
impl R<bool, MASK_SEMC_PODF_LOADED_A>
[src]
pub fn variant(&self) -> MASK_SEMC_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_mask_semc_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is MASK_SEMC_PODF_LOADED_0
pub fn is_mask_semc_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is MASK_SEMC_PODF_LOADED_1
impl R<bool, MASK_PERIPH2_CLK_SEL_LOADED_A>
[src]
pub fn variant(&self) -> MASK_PERIPH2_CLK_SEL_LOADED_A
[src]
Get enumerated values variant
pub fn is_mask_periph2_clk_sel_loaded_0(&self) -> bool
[src]
Checks if the value of the field is MASK_PERIPH2_CLK_SEL_LOADED_0
pub fn is_mask_periph2_clk_sel_loaded_1(&self) -> bool
[src]
Checks if the value of the field is MASK_PERIPH2_CLK_SEL_LOADED_1
impl R<bool, MASK_AHB_PODF_LOADED_A>
[src]
pub fn variant(&self) -> MASK_AHB_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_mask_ahb_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is MASK_AHB_PODF_LOADED_0
pub fn is_mask_ahb_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is MASK_AHB_PODF_LOADED_1
impl R<bool, MASK_PERIPH_CLK_SEL_LOADED_A>
[src]
pub fn variant(&self) -> MASK_PERIPH_CLK_SEL_LOADED_A
[src]
Get enumerated values variant
pub fn is_mask_periph_clk_sel_loaded_0(&self) -> bool
[src]
Checks if the value of the field is MASK_PERIPH_CLK_SEL_LOADED_0
pub fn is_mask_periph_clk_sel_loaded_1(&self) -> bool
[src]
Checks if the value of the field is MASK_PERIPH_CLK_SEL_LOADED_1
impl R<bool, ARM_PODF_LOADED_A>
[src]
pub fn variant(&self) -> ARM_PODF_LOADED_A
[src]
Get enumerated values variant
pub fn is_arm_podf_loaded_0(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_LOADED_0
pub fn is_arm_podf_loaded_1(&self) -> bool
[src]
Checks if the value of the field is ARM_PODF_LOADED_1
impl R<u32, Reg<u32, _CIMR>>
[src]
pub fn mask_lrf_pll(&self) -> MASK_LRF_PLL_R
[src]
Bit 0 - mask interrupt generation due to lrf of PLLs
pub fn mask_cosc_ready(&self) -> MASK_COSC_READY_R
[src]
Bit 6 - mask interrupt generation due to on board oscillator ready
pub fn mask_semc_podf_loaded(&self) -> MASK_SEMC_PODF_LOADED_R
[src]
Bit 17 - mask interrupt generation due to frequency change of semc_podf
pub fn mask_periph2_clk_sel_loaded(&self) -> MASK_PERIPH2_CLK_SEL_LOADED_R
[src]
Bit 19 - mask interrupt generation due to update of periph2_clk_sel.
pub fn mask_ahb_podf_loaded(&self) -> MASK_AHB_PODF_LOADED_R
[src]
Bit 20 - mask interrupt generation due to frequency change of ahb_podf
pub fn mask_periph_clk_sel_loaded(&self) -> MASK_PERIPH_CLK_SEL_LOADED_R
[src]
Bit 22 - mask interrupt generation due to update of periph_clk_sel.
pub fn arm_podf_loaded(&self) -> ARM_PODF_LOADED_R
[src]
Bit 26 - mask interrupt generation due to frequency change of arm_podf
impl R<u8, CLKO1_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, CLKO1_SEL_A>
[src]
Get enumerated values variant
pub fn is_clko1_sel_0(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_0
pub fn is_clko1_sel_1(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_1
pub fn is_clko1_sel_3(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_3
pub fn is_clko1_sel_5(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_5
pub fn is_clko1_sel_10(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_10
pub fn is_clko1_sel_11(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_11
pub fn is_clko1_sel_12(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_12
pub fn is_clko1_sel_13(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_13
pub fn is_clko1_sel_14(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_14
pub fn is_clko1_sel_15(&self) -> bool
[src]
Checks if the value of the field is CLKO1_SEL_15
impl R<u8, CLKO1_DIV_A>
[src]
pub fn variant(&self) -> CLKO1_DIV_A
[src]
Get enumerated values variant
pub fn is_clko1_div_0(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_0
pub fn is_clko1_div_1(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_1
pub fn is_clko1_div_2(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_2
pub fn is_clko1_div_3(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_3
pub fn is_clko1_div_4(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_4
pub fn is_clko1_div_5(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_5
pub fn is_clko1_div_6(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_6
pub fn is_clko1_div_7(&self) -> bool
[src]
Checks if the value of the field is CLKO1_DIV_7
impl R<bool, CLKO1_EN_A>
[src]
pub fn variant(&self) -> CLKO1_EN_A
[src]
Get enumerated values variant
pub fn is_clko1_en_0(&self) -> bool
[src]
Checks if the value of the field is CLKO1_EN_0
pub fn is_clko1_en_1(&self) -> bool
[src]
Checks if the value of the field is CLKO1_EN_1
impl R<bool, CLK_OUT_SEL_A>
[src]
pub fn variant(&self) -> CLK_OUT_SEL_A
[src]
Get enumerated values variant
pub fn is_clk_out_sel_0(&self) -> bool
[src]
Checks if the value of the field is CLK_OUT_SEL_0
pub fn is_clk_out_sel_1(&self) -> bool
[src]
Checks if the value of the field is CLK_OUT_SEL_1
impl R<u8, CLKO2_SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, CLKO2_SEL_A>
[src]
Get enumerated values variant
pub fn is_clko2_sel_3(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_3
pub fn is_clko2_sel_6(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_6
pub fn is_clko2_sel_11(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_11
pub fn is_clko2_sel_14(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_14
pub fn is_clko2_sel_17(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_17
pub fn is_clko2_sel_18(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_18
pub fn is_clko2_sel_19(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_19
pub fn is_clko2_sel_20(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_20
pub fn is_clko2_sel_23(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_23
pub fn is_clko2_sel_27(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_27
pub fn is_clko2_sel_28(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_28
pub fn is_clko2_sel_29(&self) -> bool
[src]
Checks if the value of the field is CLKO2_SEL_29
impl R<u8, CLKO2_DIV_A>
[src]
pub fn variant(&self) -> CLKO2_DIV_A
[src]
Get enumerated values variant
pub fn is_clko2_div_0(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_0
pub fn is_clko2_div_1(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_1
pub fn is_clko2_div_2(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_2
pub fn is_clko2_div_3(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_3
pub fn is_clko2_div_4(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_4
pub fn is_clko2_div_5(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_5
pub fn is_clko2_div_6(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_6
pub fn is_clko2_div_7(&self) -> bool
[src]
Checks if the value of the field is CLKO2_DIV_7
impl R<bool, CLKO2_EN_A>
[src]
pub fn variant(&self) -> CLKO2_EN_A
[src]
Get enumerated values variant
pub fn is_clko2_en_0(&self) -> bool
[src]
Checks if the value of the field is CLKO2_EN_0
pub fn is_clko2_en_1(&self) -> bool
[src]
Checks if the value of the field is CLKO2_EN_1
impl R<u32, Reg<u32, _CCOSR>>
[src]
pub fn clko1_sel(&self) -> CLKO1_SEL_R
[src]
Bits 0:3 - Selection of the clock to be generated on CCM_CLKO1
pub fn clko1_div(&self) -> CLKO1_DIV_R
[src]
Bits 4:6 - Setting the divider of CCM_CLKO1
pub fn clko1_en(&self) -> CLKO1_EN_R
[src]
Bit 7 - Enable of CCM_CLKO1 clock
pub fn clk_out_sel(&self) -> CLK_OUT_SEL_R
[src]
Bit 8 - CCM_CLKO1 output to reflect CCM_CLKO1 or CCM_CLKO2 clocks
pub fn clko2_sel(&self) -> CLKO2_SEL_R
[src]
Bits 16:20 - Selection of the clock to be generated on CCM_CLKO2
pub fn clko2_div(&self) -> CLKO2_DIV_R
[src]
Bits 21:23 - Setting the divider of CCM_CLKO2
pub fn clko2_en(&self) -> CLKO2_EN_R
[src]
Bit 24 - Enable of CCM_CLKO2 clock
impl R<bool, PMIC_DELAY_SCALER_A>
[src]
pub fn variant(&self) -> PMIC_DELAY_SCALER_A
[src]
Get enumerated values variant
pub fn is_pmic_delay_scaler_0(&self) -> bool
[src]
Checks if the value of the field is PMIC_DELAY_SCALER_0
pub fn is_pmic_delay_scaler_1(&self) -> bool
[src]
Checks if the value of the field is PMIC_DELAY_SCALER_1
impl R<bool, EFUSE_PROG_SUPPLY_GATE_A>
[src]
pub fn variant(&self) -> EFUSE_PROG_SUPPLY_GATE_A
[src]
Get enumerated values variant
pub fn is_efuse_prog_supply_gate_0(&self) -> bool
[src]
Checks if the value of the field is EFUSE_PROG_SUPPLY_GATE_0
pub fn is_efuse_prog_supply_gate_1(&self) -> bool
[src]
Checks if the value of the field is EFUSE_PROG_SUPPLY_GATE_1
impl R<u8, SYS_MEM_DS_CTRL_A>
[src]
pub fn variant(&self) -> Variant<u8, SYS_MEM_DS_CTRL_A>
[src]
Get enumerated values variant
pub fn is_sys_mem_ds_ctrl_0(&self) -> bool
[src]
Checks if the value of the field is SYS_MEM_DS_CTRL_0
pub fn is_sys_mem_ds_ctrl_1(&self) -> bool
[src]
Checks if the value of the field is SYS_MEM_DS_CTRL_1
pub fn is_sys_mem_ds_ctrl_2(&self) -> bool
[src]
Checks if the value of the field is SYS_MEM_DS_CTRL_2
impl R<bool, FPL_A>
[src]
pub fn variant(&self) -> FPL_A
[src]
Get enumerated values variant
pub fn is_fpl_0(&self) -> bool
[src]
Checks if the value of the field is FPL_0
pub fn is_fpl_1(&self) -> bool
[src]
Checks if the value of the field is FPL_1
impl R<bool, INT_MEM_CLK_LPM_A>
[src]
pub fn variant(&self) -> INT_MEM_CLK_LPM_A
[src]
Get enumerated values variant
pub fn is_int_mem_clk_lpm_0(&self) -> bool
[src]
Checks if the value of the field is INT_MEM_CLK_LPM_0
pub fn is_int_mem_clk_lpm_1(&self) -> bool
[src]
Checks if the value of the field is INT_MEM_CLK_LPM_1
impl R<u32, Reg<u32, _CGPR>>
[src]
pub fn pmic_delay_scaler(&self) -> PMIC_DELAY_SCALER_R
[src]
Bit 0 - Defines clock dividion of clock for stby_count (pmic delay counter)
pub fn efuse_prog_supply_gate(&self) -> EFUSE_PROG_SUPPLY_GATE_R
[src]
Bit 4 - Defines the value of the output signal cgpr_dout[4]. Gate of program supply for efuse programing
pub fn sys_mem_ds_ctrl(&self) -> SYS_MEM_DS_CTRL_R
[src]
Bits 14:15 - System memory DS control
pub fn fpl(&self) -> FPL_R
[src]
Bit 16 - Fast PLL enable.
pub fn int_mem_clk_lpm(&self) -> INT_MEM_CLK_LPM_R
[src]
Bit 17 - Control for the Deep Sleep signal to the ARM Platform memories with additional control logic based on the ARM WFI signal
impl R<u32, Reg<u32, _CCGR0>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - aips_tz1 clocks (aips_tz1_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - aips_tz2 clocks (aips_tz2_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - mqs clock ( mqs_hmclk_clock_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - flexspi_exsc clock (flexspi_exsc_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - sim_m or sim_main register access clock (sim_m_mainclk_r_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - dcp clock (dcp_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - lpuart3 clock (lpuart3_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - can1 clock (can1_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - can1_serial clock (can1_serial_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - can2 clock (can2_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - can2_serial clock (can2_serial_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - trace clock (trace_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - gpt2 bus clocks (gpt2_bus_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - gpt2 serial clocks (gpt2_serial_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - lpuart2 clock (lpuart2_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - gpio2_clocks (gpio2_clk_enable)
impl R<u32, Reg<u32, _CCGR1>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - lpspi1 clocks (lpspi1_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - lpspi2 clocks (lpspi2_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - lpspi3 clocks (lpspi3_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - lpspi4 clocks (lpspi4_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - adc2 clock (adc2_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - enet clock (enet_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - pit clocks (pit_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - aoi2 clocks (aoi2_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - adc1 clock (adc1_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - semc_exsc clock (semc_exsc_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - gpt1 bus clock (gpt_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - gpt1 serial clock (gpt_serial_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - lpuart4 clock (lpuart4_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - gpio1 clock (gpio1_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - csu clock (csu_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - Reserved
impl R<u32, Reg<u32, _CCGR2>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - ocram_exsc clock (ocram_exsc_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - csi clock (csi_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - iomuxc_snvs clock (iomuxc_snvs_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - lpi2c1 clock (lpi2c1_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - lpi2c2 clock (lpi2c2_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - lpi2c3 clock (lpi2c3_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - OCOTP_CTRL clock (iim_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - xbar3 clock (xbar3_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - ipmux1 clock (ipmux1_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - ipmux2 clock (ipmux2_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - ipmux3 clock (ipmux3_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - xbar1 clock (xbar1_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - xbar2 clock (xbar2_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - gpio3 clock (gpio3_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - lcd clocks (lcd_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - pxp clocks (pxp_clk_enable)
impl R<u32, Reg<u32, _CCGR3>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - flexio2 clocks (flexio2_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - lpuart5 clock (lpuart5_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - semc clocks (semc_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - lpuart6 clock (lpuart6_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - aoi1 clock (aoi1_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - lcdif pix clock (lcdif_pix_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - gpio4 clock (gpio4_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - ewm clocks (ewm_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - wdog1 clock (wdog1_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - flexram clock (flexram_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - acmp1 clocks (acmp1_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - acmp2 clocks (acmp2_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - acmp3 clocks (acmp3_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - acmp4 clocks (acmp4_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - The OCRAM clock cannot be turned off when the CM cache is running on this device.
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - iomuxc_snvs_gpr clock (iomuxc_snvs_gpr_clk_enable)
impl R<u32, Reg<u32, _CCGR4>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - sim_m7 register access clock (sim_m7_mainclk_r_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - iomuxc clock (iomuxc_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - iomuxc gpr clock (iomuxc_gpr_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - bee clock(bee_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - sim_m7 clock (sim_m7_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - tsc_dig clock (tsc_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - sim_m clocks (sim_m_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - sim_ems clocks (sim_ems_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - pwm1 clocks (pwm1_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - pwm2 clocks (pwm2_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - pwm3 clocks (pwm3_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - pwm4 clocks (pwm4_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - enc1 clocks (enc1_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - enc2 clocks (enc2_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - enc3 clocks (enc3_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - enc4 clocks (enc4_clk_enable)
impl R<u32, Reg<u32, _CCGR5>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - rom clock (rom_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - flexio1 clock (flexio1_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - wdog3 clock (wdog3_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - dma clock (dma_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - kpp clock (kpp_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - wdog2 clock (wdog2_clk_enable)
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - aipstz4 clocks (aips_tz4_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - spdif clock (spdif_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - sim_main clock (sim_main_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - sai1 clock (sai1_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - sai2 clock (sai2_clk_enable)
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - sai3 clock (sai3_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - lpuart1 clock (lpuart1_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - lpuart7 clock (lpuart7_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - snvs_hp clock (snvs_hp_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - snvs_lp clock (snvs_lp_clk_enable)
impl R<u32, Reg<u32, _CCGR6>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - usboh3 clock (usboh3_clk_enable)
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - usdhc1 clocks (usdhc1_clk_enable)
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - usdhc2 clocks (usdhc2_clk_enable)
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - dcdc clocks (dcdc_clk_enable)
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - ipmux4 clock (ipmux4_clk_enable)
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - trng clock (trng_clk_enable)
pub fn cg7(&self) -> CG7_R
[src]
Bits 14:15 - lpuart8 clocks (lpuart8_clk_enable)
pub fn cg8(&self) -> CG8_R
[src]
Bits 16:17 - timer4 clocks (timer4_clk_enable)
pub fn cg9(&self) -> CG9_R
[src]
Bits 18:19 - aips_tz3 clock (aips_tz3_clk_enable)
pub fn cg10(&self) -> CG10_R
[src]
Bits 20:21 - sim_axbs_p_clk_enable
pub fn cg11(&self) -> CG11_R
[src]
Bits 22:23 - anadig clocks (anadig_clk_enable)
pub fn cg12(&self) -> CG12_R
[src]
Bits 24:25 - lpi2c4 serial clock (lpi2c4_serial_clk_enable)
pub fn cg13(&self) -> CG13_R
[src]
Bits 26:27 - timer1 clocks (timer1_clk_enable)
pub fn cg14(&self) -> CG14_R
[src]
Bits 28:29 - timer2 clocks (timer2_clk_enable)
pub fn cg15(&self) -> CG15_R
[src]
Bits 30:31 - timer3 clocks (timer3_clk_enable)
impl R<u32, Reg<u32, _CCGR7>>
[src]
pub fn cg0(&self) -> CG0_R
[src]
Bits 0:1 - enet2_clk_enable
pub fn cg1(&self) -> CG1_R
[src]
Bits 2:3 - flexspi2_clk_enable
pub fn cg2(&self) -> CG2_R
[src]
Bits 4:5 - axbs_l_clk_enable
pub fn cg3(&self) -> CG3_R
[src]
Bits 6:7 - can3_clk_enable
pub fn cg4(&self) -> CG4_R
[src]
Bits 8:9 - can3_serial_clk_enable
pub fn cg5(&self) -> CG5_R
[src]
Bits 10:11 - aips_lite_clk_enable
pub fn cg6(&self) -> CG6_R
[src]
Bits 12:13 - flexio3_clk_enable
impl R<bool, MOD_EN_OV_GPT_A>
[src]
pub fn variant(&self) -> MOD_EN_OV_GPT_A
[src]
Get enumerated values variant
pub fn is_mod_en_ov_gpt_0(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_GPT_0
pub fn is_mod_en_ov_gpt_1(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_GPT_1
impl R<bool, MOD_EN_OV_PIT_A>
[src]
pub fn variant(&self) -> MOD_EN_OV_PIT_A
[src]
Get enumerated values variant
pub fn is_mod_en_ov_pit_0(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_PIT_0
pub fn is_mod_en_ov_pit_1(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_PIT_1
impl R<bool, MOD_EN_USDHC_A>
[src]
pub fn variant(&self) -> MOD_EN_USDHC_A
[src]
Get enumerated values variant
pub fn is_mod_en_usdhc_0(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_USDHC_0
pub fn is_mod_en_usdhc_1(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_USDHC_1
impl R<bool, MOD_EN_OV_TRNG_A>
[src]
pub fn variant(&self) -> MOD_EN_OV_TRNG_A
[src]
Get enumerated values variant
pub fn is_mod_en_ov_trng_0(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_TRNG_0
pub fn is_mod_en_ov_trng_1(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_TRNG_1
impl R<bool, MOD_EN_OV_CANFD_CPI_A>
[src]
pub fn variant(&self) -> MOD_EN_OV_CANFD_CPI_A
[src]
Get enumerated values variant
pub fn is_mod_en_ov_canfd_cpi_0(&self) -> bool
[src]
Checks if the value of the field is MOD_EN_OV_CANFD_CPI_0
pub fn is_mod_en_ov_canfd_cpi_1(&self) -> bool
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Checks if the value of the field is MOD_EN_OV_CANFD_CPI_1
impl R<bool, MOD_EN_OV_CAN2_CPI_A>
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pub fn variant(&self) -> MOD_EN_OV_CAN2_CPI_A
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Get enumerated values variant
pub fn is_mod_en_ov_can2_cpi_0(&self) -> bool
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Checks if the value of the field is MOD_EN_OV_CAN2_CPI_0
pub fn is_mod_en_ov_can2_cpi_1(&self) -> bool
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Checks if the value of the field is MOD_EN_OV_CAN2_CPI_1
impl R<bool, MOD_EN_OV_CAN1_CPI_A>
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pub fn variant(&self) -> MOD_EN_OV_CAN1_CPI_A
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Get enumerated values variant
pub fn is_mod_en_ov_can1_cpi_0(&self) -> bool
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Checks if the value of the field is MOD_EN_OV_CAN1_CPI_0
pub fn is_mod_en_ov_can1_cpi_1(&self) -> bool
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Checks if the value of the field is MOD_EN_OV_CAN1_CPI_1
impl R<u32, Reg<u32, _CMEOR>>
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pub fn mod_en_ov_gpt(&self) -> MOD_EN_OV_GPT_R
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Bit 5 - Overide clock enable signal from GPT - clock will not be gated based on GPT's signal 'ipg_enable_clk'
pub fn mod_en_ov_pit(&self) -> MOD_EN_OV_PIT_R
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Bit 6 - Overide clock enable signal from PIT - clock will not be gated based on PIT's signal 'ipg_enable_clk'
pub fn mod_en_usdhc(&self) -> MOD_EN_USDHC_R
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Bit 7 - overide clock enable signal from USDHC.
pub fn mod_en_ov_trng(&self) -> MOD_EN_OV_TRNG_R
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Bit 9 - Overide clock enable signal from TRNG
pub fn mod_en_ov_canfd_cpi(&self) -> MOD_EN_OV_CANFD_CPI_R
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Bit 10 - Overide clock enable signal from FlexCAN3(CANFD) - clock will not be gated based on CAN's signal 'enable_clk_cpi'
pub fn mod_en_ov_can2_cpi(&self) -> MOD_EN_OV_CAN2_CPI_R
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Bit 28 - Overide clock enable signal from CAN2 - clock will not be gated based on CAN's signal 'enable_clk_cpi'
pub fn mod_en_ov_can1_cpi(&self) -> MOD_EN_OV_CAN1_CPI_R
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Bit 30 - Overide clock enable signal from CAN1 - clock will not be gated based on CAN's signal 'enable_clk_cpi'
Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,