Type Definition imxrt1062_can1::ctrl2::W

type W = W<u32, CTRL2>;

Writer for register CTRL2

Methods

impl W

pub fn eacen(&mut self) -> EACEN_W

Bit 16 - This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process

pub fn rrs(&mut self) -> RRS_W

Bit 17 - If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame

pub fn mrp(&mut self) -> MRP_W

Bit 18 - If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO

pub fn tasd(&mut self) -> TASD_W

Bits 19:23 - This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus

pub fn rffn(&mut self) -> RFFN_W

Bits 24:27 - This 4-bit field defines the number of Rx FIFO filters according to

pub fn wrmfrz(&mut self) -> WRMFRZ_W

Bit 28 - Enable unrestricted write access to FlexCAN memory in Freeze mode