Type Definition imxrt1062_adc_etc::ctrl::W

type W = W<u32, CTRL>;

Writer for register CTRL

Methods

impl W

pub fn trig_enable(&mut self) -> TRIG_ENABLE_W

Bits 0:7 - TRIG enable register

pub fn ext0_trig_enable(&mut self) -> EXT0_TRIG_ENABLE_W

Bit 8 - TSC0 TRIG enable register. 1'b1: enable external TSC0 trigger. 1'b0: disable external TSC0 trigger.

pub fn ext0_trig_priority(&mut self) -> EXT0_TRIG_PRIORITY_W

Bits 9:11 - External TSC0 trigger priority, 7 is Highest, 0 is lowest .

pub fn ext1_trig_enable(&mut self) -> EXT1_TRIG_ENABLE_W

Bit 12 - TSC1 TRIG enable register. 1'b1: enable external TSC1 trigger. 1'b0: disable external TSC1 trigger.

pub fn ext1_trig_priority(&mut self) -> EXT1_TRIG_PRIORITY_W

Bits 13:15 - External TSC1 trigger priority, 7 is Highest, 0 is lowest .

pub fn pre_divider(&mut self) -> PRE_DIVIDER_W

Bits 16:23 - Pre-divider for trig delay and interval .

pub fn dma_mode_sel(&mut self) -> DMA_MODE_SEL_W

Bit 29 - 1'b0: Trig DMA_REQ with latched signal, REQ will be cleared when ACK and source request cleared

pub fn tsc_bypass(&mut self) -> TSC_BYPASS_W

Bit 30 - 1'b1: TSC is bypassed to ADC2. 1'b0: TSC not bypassed. To use ADC2, this bit should be cleared.

pub fn softrst(&mut self) -> SOFTRST_W

Bit 31 - Software reset, high active. When write 1 ,all logical will be reset.