Struct ClockConfigs 

pub struct ClockConfigs {
    pub sckpcs: u8,
    pub pcssck: u8,
    pub dbt: u8,
    pub sckdiv: u8,
}

LPSPI clock configurations.

This is a low-level API. You should prefer set_clock_hz if you’re not sure how to use these configurations.

All delays and dividers are in terms of the LPSPI functional clock cycles. They’re written directly to the corresponding clock configuration register fields. See inline documentation to understand what values of zero represent.

Fields

sckpcs: u8

SCK-to-PCS delay.

This value is off-by-one: a value of zero indicates one cycle.

pcssck: u8

PCS-to-SCK delay.

This value is off-by-one: a value of zero indicates one cycle.

dbt: u8

Delay between transfers.

For normal transactions, this affects the PCS negation duration. In this configuration, this value is off-by-two: a value of zero indicates two cycle.

For continuous transactions, this affects the clock delay between words. In this configuration, this value is off-by-one.

sckdiv: u8

SCK divider.

This value is off-by-two: a value of zero indicates two cycles.

Trait Implementations

impl Clone for ClockConfigs

fn clone(&self) -> ClockConfigs

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for ClockConfigs

fn eq(&self, other: &ClockConfigs) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for ClockConfigs

impl Eq for ClockConfigs

impl StructuralPartialEq for ClockConfigs