#[repr(C)]pub struct InstructionData {Show 16 fields
pub status: i32,
pub err_op: u8,
pub err_optype: u8,
pub address: u64,
pub target: u64,
pub itype: u16,
pub len: u8,
pub isa: u8,
pub nops: u8,
pub flow: u8,
pub mnemonic: String,
pub ops: Vec<OperandData>,
pub mask: RegisterData,
pub zeroing: u8,
pub fp_control: u8,
pub round_mode: u8,
}Expand description
A decoded instruction, returned by value from decode_insn; status carries the raw result code and ops is right-sized to the populated operands.
Fields§
§status: i32Result code: 0 ok, -1 no instruction, -2 unsupported processor, -3 unmodeled operand, -4 unmodeled register.
err_op: u8On the -3/-4 status, the offending operand index.
err_optype: u8On -3 the offending raw operand type; on -4 the register number.
address: u64Instruction address.
target: u64Direct branch/call target, or BADADDR.
itype: u16Processor-local canonical instruction id.
len: u8Encoded length in bytes.
isa: u80 = x86, 1 = x64.
nops: u8Number of populated operands (matches ops.len()).
flow: u8FLOW_* bit flags.
mnemonic: StringCanonical mnemonic.
ops: Vec<OperandData>Decoded operands; only meaningful when status == 0.
mask: RegisterDataEVEX write-mask opmask register (k1..k7), or the REG_NONE sentinel if unmasked.
zeroing: u8EVEX zeroing-masking flag: 1 = {z} (zero masked lanes), 0 = merge. Meaningful only with a mask.
fp_control: u8EVEX register-form FP control: FPC_* (0 none, 1 static rounding, 2 suppress-exceptions-only).
round_mode: u8EVEX static rounding mode ROUND_* (0 nearest, 1 down, 2 up, 3 zero), meaningful when fp_control == FPC_ROUNDING.