[−][src]Enum iced_x86::Register
A register
Variants (Non-exhaustive)
Implementations
impl Register
[src]
#[must_use]pub fn info(self) -> &'static RegisterInfo
[src]
Gets register info
Examples
use iced_x86::*; let info = Register::EAX.info(); assert_eq!(4, info.size());
#[must_use]pub fn base(self) -> Self
[src]
Gets the base register, eg. AL
, AX
, EAX
, RAX
, MM0
, XMM0
, YMM0
, ZMM0
, ES
Examples
use iced_x86::*; assert_eq!(Register::ES, Register::GS.base()); assert_eq!(Register::AL, Register::SIL.base()); assert_eq!(Register::AX, Register::SP.base()); assert_eq!(Register::EAX, Register::R13D.base()); assert_eq!(Register::RAX, Register::RBP.base()); assert_eq!(Register::MM0, Register::MM6.base()); assert_eq!(Register::XMM0, Register::XMM28.base()); assert_eq!(Register::YMM0, Register::YMM12.base()); assert_eq!(Register::ZMM0, Register::ZMM31.base()); assert_eq!(Register::K0, Register::K3.base()); assert_eq!(Register::BND0, Register::BND1.base()); assert_eq!(Register::ST0, Register::ST7.base()); assert_eq!(Register::CR0, Register::CR8.base()); assert_eq!(Register::DR0, Register::DR6.base()); assert_eq!(Register::TR0, Register::TR3.base()); assert_eq!(Register::EIP, Register::RIP.base());
#[must_use]pub fn number(self) -> usize
[src]
The register number (index) relative to base()
, eg. 0-15, or 0-31, or if 8-bit GPR, 0-19
Examples
use iced_x86::*; assert_eq!(5, Register::GS.number()); assert_eq!(10, Register::SIL.number()); assert_eq!(4, Register::SP.number()); assert_eq!(13, Register::R13D.number()); assert_eq!(5, Register::RBP.number()); assert_eq!(6, Register::MM6.number()); assert_eq!(28, Register::XMM28.number()); assert_eq!(12, Register::YMM12.number()); assert_eq!(31, Register::ZMM31.number()); assert_eq!(3, Register::K3.number()); assert_eq!(1, Register::BND1.number()); assert_eq!(7, Register::ST7.number()); assert_eq!(8, Register::CR8.number()); assert_eq!(6, Register::DR6.number()); assert_eq!(3, Register::TR3.number()); assert_eq!(1, Register::RIP.number());
#[must_use]pub fn full_register(self) -> Self
[src]
Gets the full register that this one is a part of, eg. CL
/CH
/CX
/ECX
/RCX
-> RCX
, XMM11
/YMM11
/ZMM11
-> ZMM11
Examples
use iced_x86::*; assert_eq!(Register::GS, Register::GS.full_register()); assert_eq!(Register::RSI, Register::SIL.full_register()); assert_eq!(Register::RSP, Register::SP.full_register()); assert_eq!(Register::R13, Register::R13D.full_register()); assert_eq!(Register::RBP, Register::RBP.full_register()); assert_eq!(Register::MM6, Register::MM6.full_register()); assert_eq!(Register::ZMM10, Register::XMM10.full_register()); assert_eq!(Register::ZMM10, Register::YMM10.full_register()); assert_eq!(Register::ZMM10, Register::ZMM10.full_register()); assert_eq!(Register::K3, Register::K3.full_register()); assert_eq!(Register::BND1, Register::BND1.full_register()); assert_eq!(Register::ST7, Register::ST7.full_register()); assert_eq!(Register::CR8, Register::CR8.full_register()); assert_eq!(Register::DR6, Register::DR6.full_register()); assert_eq!(Register::TR3, Register::TR3.full_register()); assert_eq!(Register::RIP, Register::RIP.full_register());
#[must_use]pub fn full_register32(self) -> Self
[src]
Gets the full register that this one is a part of, except if it's a GPR in which case the 32-bit register is returned,
eg. CL
/CH
/CX
/ECX
/RCX
-> ECX
, XMM11
/YMM11
/ZMM11
-> ZMM11
Examples
use iced_x86::*; assert_eq!(Register::GS, Register::GS.full_register32()); assert_eq!(Register::ESI, Register::SIL.full_register32()); assert_eq!(Register::ESP, Register::SP.full_register32()); assert_eq!(Register::R13D, Register::R13D.full_register32()); assert_eq!(Register::EBP, Register::RBP.full_register32()); assert_eq!(Register::MM6, Register::MM6.full_register32()); assert_eq!(Register::ZMM10, Register::XMM10.full_register32()); assert_eq!(Register::ZMM10, Register::YMM10.full_register32()); assert_eq!(Register::ZMM10, Register::ZMM10.full_register32()); assert_eq!(Register::K3, Register::K3.full_register32()); assert_eq!(Register::BND1, Register::BND1.full_register32()); assert_eq!(Register::ST7, Register::ST7.full_register32()); assert_eq!(Register::CR8, Register::CR8.full_register32()); assert_eq!(Register::DR6, Register::DR6.full_register32()); assert_eq!(Register::TR3, Register::TR3.full_register32()); assert_eq!(Register::RIP, Register::RIP.full_register32());
#[must_use]pub fn size(self) -> usize
[src]
Gets the size of the register in bytes
Examples
use iced_x86::*; assert_eq!(2, Register::GS.size()); assert_eq!(1, Register::SIL.size()); assert_eq!(2, Register::SP.size()); assert_eq!(4, Register::R13D.size()); assert_eq!(8, Register::RBP.size()); assert_eq!(8, Register::MM6.size()); assert_eq!(16, Register::XMM10.size()); assert_eq!(32, Register::YMM10.size()); assert_eq!(64, Register::ZMM10.size()); assert_eq!(8, Register::K3.size()); assert_eq!(16, Register::BND1.size()); assert_eq!(10, Register::ST7.size()); assert_eq!(8, Register::CR8.size()); assert_eq!(8, Register::DR6.size()); assert_eq!(4, Register::TR3.size()); assert_eq!(8, Register::RIP.size());
impl Register
[src]
#[must_use]pub fn is_segment_register(self) -> bool
[src]
Checks if it's a segment register (ES
, CS
, SS
, DS
, FS
, GS
)
Examples
use iced_x86::*; assert!(Register::GS.is_segment_register()); assert!(!Register::RCX.is_segment_register());
#[must_use]pub fn is_gpr(self) -> bool
[src]
Checks if it's a general purpose register (AL
-R15L
, AX
-R15W
, EAX
-R15D
, RAX
-R15
)
Examples
use iced_x86::*; assert!(!Register::GS.is_gpr()); assert!(Register::CH.is_gpr()); assert!(Register::DX.is_gpr()); assert!(Register::R13D.is_gpr()); assert!(Register::RSP.is_gpr()); assert!(!Register::XMM0.is_gpr());
#[must_use]pub fn is_gpr8(self) -> bool
[src]
Checks if it's an 8-bit general purpose register (AL
-R15L
)
Examples
use iced_x86::*; assert!(!Register::GS.is_gpr8()); assert!(Register::CH.is_gpr8()); assert!(!Register::DX.is_gpr8()); assert!(!Register::R13D.is_gpr8()); assert!(!Register::RSP.is_gpr8()); assert!(!Register::XMM0.is_gpr8());
#[must_use]pub fn is_gpr16(self) -> bool
[src]
Checks if it's a 16-bit general purpose register (AX
-R15W
)
Examples
use iced_x86::*; assert!(!Register::GS.is_gpr16()); assert!(!Register::CH.is_gpr16()); assert!(Register::DX.is_gpr16()); assert!(!Register::R13D.is_gpr16()); assert!(!Register::RSP.is_gpr16()); assert!(!Register::XMM0.is_gpr16());
#[must_use]pub fn is_gpr32(self) -> bool
[src]
Checks if it's a 32-bit general purpose register (EAX
-R15D
)
Examples
use iced_x86::*; assert!(!Register::GS.is_gpr32()); assert!(!Register::CH.is_gpr32()); assert!(!Register::DX.is_gpr32()); assert!(Register::R13D.is_gpr32()); assert!(!Register::RSP.is_gpr32()); assert!(!Register::XMM0.is_gpr32());
#[must_use]pub fn is_gpr64(self) -> bool
[src]
Checks if it's a 64-bit general purpose register (RAX
-R15
)
Examples
use iced_x86::*; assert!(!Register::GS.is_gpr64()); assert!(!Register::CH.is_gpr64()); assert!(!Register::DX.is_gpr64()); assert!(!Register::R13D.is_gpr64()); assert!(Register::RSP.is_gpr64()); assert!(!Register::XMM0.is_gpr64());
#[must_use]pub fn is_xmm(self) -> bool
[src]
Checks if it's a 128-bit vector register (XMM0
-XMM31
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_xmm()); assert!(!Register::RSP.is_xmm()); assert!(Register::XMM0.is_xmm()); assert!(!Register::YMM0.is_xmm()); assert!(!Register::ZMM0.is_xmm());
#[must_use]pub fn is_ymm(self) -> bool
[src]
Checks if it's a 256-bit vector register (YMM0
-YMM31
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_ymm()); assert!(!Register::RSP.is_ymm()); assert!(!Register::XMM0.is_ymm()); assert!(Register::YMM0.is_ymm()); assert!(!Register::ZMM0.is_ymm());
#[must_use]pub fn is_zmm(self) -> bool
[src]
Checks if it's a 512-bit vector register (ZMM0
-ZMM31
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_zmm()); assert!(!Register::RSP.is_zmm()); assert!(!Register::XMM0.is_zmm()); assert!(!Register::YMM0.is_zmm()); assert!(Register::ZMM0.is_zmm());
#[must_use]pub fn is_vector_register(self) -> bool
[src]
Checks if it's an XMM
, YMM
or ZMM
register
Examples
use iced_x86::*; assert!(!Register::R13D.is_vector_register()); assert!(!Register::RSP.is_vector_register()); assert!(Register::XMM0.is_vector_register()); assert!(Register::YMM0.is_vector_register()); assert!(Register::ZMM0.is_vector_register());
#[must_use]pub fn is_ip(self) -> bool
[src]
Checks if it's EIP
/RIP
Examples
use iced_x86::*; assert!(Register::EIP.is_ip()); assert!(Register::RIP.is_ip());
#[must_use]pub fn is_k(self) -> bool
[src]
Checks if it's an opmask register (K0
-K7
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_k()); assert!(Register::K3.is_k());
#[must_use]pub fn is_cr(self) -> bool
[src]
Checks if it's a control register (CR0
-CR15
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_cr()); assert!(Register::CR3.is_cr());
#[must_use]pub fn is_dr(self) -> bool
[src]
Checks if it's a debug register (DR0
-DR15
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_dr()); assert!(Register::DR3.is_dr());
#[must_use]pub fn is_tr(self) -> bool
[src]
Checks if it's a test register (TR0
-TR7
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_tr()); assert!(Register::TR3.is_tr());
#[must_use]pub fn is_st(self) -> bool
[src]
Checks if it's an FPU stack register (ST0
-ST7
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_st()); assert!(Register::ST3.is_st());
#[must_use]pub fn is_bnd(self) -> bool
[src]
Checks if it's a bound register (BND0
-BND3
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_bnd()); assert!(Register::BND3.is_bnd());
#[must_use]pub fn is_mm(self) -> bool
[src]
Checks if it's an MMX register (MM0
-MM7
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_mm()); assert!(Register::MM3.is_mm());
#[must_use]pub fn is_tmm(self) -> bool
[src]
Checks if it's a tile register (TMM0
-TMM7
)
Examples
use iced_x86::*; assert!(!Register::R13D.is_tmm()); assert!(Register::TMM3.is_tmm());
Trait Implementations
impl Add<Register> for i32
[src]
type Output = Register
The resulting type after applying the +
operator.
#[must_use]pub fn add(self, rhs: Register) -> Self::Output
[src]
impl Add<Register> for u32
[src]
type Output = Register
The resulting type after applying the +
operator.
#[must_use]pub fn add(self, rhs: Register) -> Self::Output
[src]
impl Add<i32> for Register
[src]
type Output = Self
The resulting type after applying the +
operator.
#[must_use]pub fn add(self, rhs: i32) -> Self::Output
[src]
impl Add<u32> for Register
[src]
type Output = Self
The resulting type after applying the +
operator.
#[must_use]pub fn add(self, rhs: u32) -> Self::Output
[src]
impl AddAssign<i32> for Register
[src]
pub fn add_assign(&mut self, rhs: i32)
[src]
impl AddAssign<u32> for Register
[src]
pub fn add_assign(&mut self, rhs: u32)
[src]
impl Clone for Register
[src]
impl Copy for Register
[src]
impl Debug for Register
[src]
impl Default for Register
[src]
impl Eq for Register
[src]
impl Hash for Register
[src]
pub fn hash<__H: Hasher>(&self, state: &mut __H)
[src]
pub fn hash_slice<H>(data: &[Self], state: &mut H) where
H: Hasher,
1.3.0[src]
H: Hasher,
impl Ord for Register
[src]
pub fn cmp(&self, other: &Register) -> Ordering
[src]
#[must_use]pub fn max(self, other: Self) -> Self
1.21.0[src]
#[must_use]pub fn min(self, other: Self) -> Self
1.21.0[src]
#[must_use]pub fn clamp(self, min: Self, max: Self) -> Self
1.50.0[src]
impl PartialEq<Register> for Register
[src]
pub fn eq(&self, other: &Register) -> bool
[src]
#[must_use]pub fn ne(&self, other: &Rhs) -> bool
1.0.0[src]
impl PartialOrd<Register> for Register
[src]
pub fn partial_cmp(&self, other: &Register) -> Option<Ordering>
[src]
#[must_use]pub fn lt(&self, other: &Rhs) -> bool
1.0.0[src]
#[must_use]pub fn le(&self, other: &Rhs) -> bool
1.0.0[src]
#[must_use]pub fn gt(&self, other: &Rhs) -> bool
1.0.0[src]
#[must_use]pub fn ge(&self, other: &Rhs) -> bool
1.0.0[src]
impl StructuralEq for Register
[src]
impl StructuralPartialEq for Register
[src]
impl Sub<i32> for Register
[src]
type Output = Self
The resulting type after applying the -
operator.
#[must_use]pub fn sub(self, rhs: i32) -> Self::Output
[src]
impl Sub<u32> for Register
[src]
type Output = Self
The resulting type after applying the -
operator.
#[must_use]pub fn sub(self, rhs: u32) -> Self::Output
[src]
impl SubAssign<i32> for Register
[src]
pub fn sub_assign(&mut self, rhs: i32)
[src]
impl SubAssign<u32> for Register
[src]
pub fn sub_assign(&mut self, rhs: u32)
[src]
Auto Trait Implementations
impl RefUnwindSafe for Register
impl Send for Register
impl Sync for Register
impl Unpin for Register
impl UnwindSafe for Register
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
[src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
[src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src]
T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T
[src]
impl<T> From<T> for T
[src]
impl<T, U> Into<U> for T where
U: From<T>,
[src]
U: From<T>,
impl<T> ToOwned for T where
T: Clone,
[src]
T: Clone,
type Owned = T
The resulting type after obtaining ownership.
pub fn to_owned(&self) -> T
[src]
pub fn clone_into(&self, target: &mut T)
[src]
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src]
U: TryFrom<T>,