pub struct Device<I> { /* private fields */ }Expand description
Low-level driver of iC-MD
This is the low-level driver for the iC-MD. It was built with device-driver. All functionality is based on the datasheet Rev. C2.
Root block of the Device driver
Implementations§
Source§impl<I> Device<I>
impl<I> Device<I>
Sourcepub fn counter_configuration(
&mut self,
) -> RegisterOperation<'_, Self, CounterConfiguration, u8, RW, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn counter_configuration(
&mut self,
) -> RegisterOperation<'_, Self, CounterConfiguration, u8, RW, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Counter configuration The iC-MD can be configured for 1 up to 3 channels with counter lengths of 16 to 48 bits. Here, the counter configuration is selected as a u8 value. The higher-level driver takes care of converting from a meaningful configuration to the 8-bit value.
Register operation:
- Address:
0 - Reset value:
0
Sourcepub fn read_cnt_cfg_0(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg0, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_0(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg0, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 24 bit counter configuration, 24+2 bits to read (4 bytes)
This corresponds to counter configuration 0b000.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_1(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg1, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_1(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg1, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 24 bit, 2 counters configuration, 48+2 bits to read (7 bytes)
This corresponds to counter configuration 0b001.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_2(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg2, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_2(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg2, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 48 bit counter register, 48+2 bits to read (7 bytes)
This corresponds to counter configuration 0b010.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_3(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg3, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_3(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg3, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 16 bit counter configuration, 16+2 bits to read (3 bytes)
This corresponds to counter configuration 0b011.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_4(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg4, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_4(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg4, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 32 bit counter configuration, 32+2 bits to read (5 bytes)
This corresponds to counter configuration 0b100.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_5(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg5, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_5(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg5, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 32 bit and 16 bit counter configuration, 32+16+2 bits to read (7 bytes)
This corresponds to counter configuration 0b101.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_6(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg6, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_6(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg6, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 16 bit and 16 bit counter configuration, 16+16+2 bits to read (5 bytes)
This corresponds to counter configuration 0b110.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn read_cnt_cfg_7(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg7, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn read_cnt_cfg_7(
&mut self,
) -> RegisterOperation<'_, Self, ReadCntCfg7, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the 3 x 16 bit counter configuration, 16+16+16+2 bits to read (7 bytes)
This corresponds to counter configuration 0b111.
Register operation:
- Address:
8 - Reset value:
0
Sourcepub fn reference_counter(
&mut self,
) -> RegisterOperation<'_, Self, ReferenceCounter, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn reference_counter(
&mut self,
) -> RegisterOperation<'_, Self, ReferenceCounter, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Read the references registers 24 bits. TODO: It is unclear if this works, as I assume the address for reading is auto-incremented as when reading the data. This should be tested once the actual hardware setup is available with an encoder connected.
Register operation:
- Address:
16 - Reset value:
0
Sourcepub fn instruction_byte(
&mut self,
) -> RegisterOperation<'_, Self, InstructionByte, u8, WO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn instruction_byte(
&mut self,
) -> RegisterOperation<'_, Self, InstructionByte, u8, WO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Instruction byte (write only)
Allows writing of the instruction bytes. When one of these bits is set to 1, the
corresponding instruction is executed and the bit set back to zero, except in the
case of Act0 and Act1, which remain set to the written value.
Register operation:
- Address:
48 - Reset value:
0
Sourcepub fn status_0(&mut self) -> RegisterOperation<'_, Self, Status0, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn status_0(&mut self) -> RegisterOperation<'_, Self, Status0, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Status0: Status of counter 0
Returns the status of counter 0 plus several other status bits. See also Status1 and
Status2 for the other counters and more status bits.
Register operation:
- Address:
72 - Reset value:
0
Sourcepub fn status_1(&mut self) -> RegisterOperation<'_, Self, Status1, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn status_1(&mut self) -> RegisterOperation<'_, Self, Status1, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Status1: Status of counter 1
Returns the status of counter 1 plus several other status bits. See also Status0 and
Status2 for the other counters and more status bits.
Register operation:
- Address:
73 - Reset value:
0
Sourcepub fn status_2(&mut self) -> RegisterOperation<'_, Self, Status2, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
pub fn status_2(&mut self) -> RegisterOperation<'_, Self, Status2, u8, RO, ()>where
I: RegisterInterfaceBase<AddressType = u8>,
Status2: Status of counter 2
Returns the status of counter 2 plus several other status bits. See also Status0 and
Status1 for the other counters and more status bits.
Register operation:
- Address:
74 - Reset value:
0