pub struct ControlObservationRequest<'a> { /* private fields */ }Expand description
Ephemeral immutable request bound to original intent and exact host-ingress mutation bytes.
The integration owns challenge freshness, authenticated observations and prior per-call accounting. This request is only for direct caller-controller checks; read visibility, Root proxies and subnet-admin exceptions grant no admission here.
Implementations§
Source§impl<'a> ControlObservationRequest<'a>
impl<'a> ControlObservationRequest<'a>
Sourcepub fn new(
plan: &OperationPlanRecord,
sequence: u64,
wire: &'a IcManagementRequestRecord,
challenge: ArtifactChecksumRecord,
max_remote_observations: u32,
) -> Result<Self, ControlRequestError>
pub fn new( plan: &OperationPlanRecord, sequence: u64, wire: &'a IcManagementRequestRecord, challenge: ArtifactChecksumRecord, max_remote_observations: u32, ) -> Result<Self, ControlRequestError>
Derive original binding and validate exact mutation target/method/payload bytes.
§Errors
Rejects unknown operations, observation methods, changed payload/target or excessive ceiling.
Sourcepub const fn binding(&self) -> &OperationBindingRecord
pub const fn binding(&self) -> &OperationBindingRecord
Read exact original intent/context/target/payload identity.
Sourcepub const fn wire(&self) -> &IcManagementRequestRecord
pub const fn wire(&self) -> &IcManagementRequestRecord
Read validated exact method/routing/Candid mutation bytes.
Sourcepub const fn challenge(&self) -> &ArtifactChecksumRecord
pub const fn challenge(&self) -> &ArtifactChecksumRecord
Read integration-owned challenge; its value alone proves no freshness.
Sourcepub const fn max_remote_observations(&self) -> u32
pub const fn max_remote_observations(&self) -> u32
Read descriptive call ceiling, separate from original spending allowances.
Sourcepub fn digest(&self) -> ArtifactChecksumRecord
pub fn digest(&self) -> ArtifactChecksumRecord
Hash original intent/sequence, exact wire digest, challenge and descriptive call ceiling.
Encoding: NUL-terminated ASCII v1 domain, 64 ASCII intent bytes, u64 big-endian sequence, 64 ASCII wire-digest bytes, 64 ASCII challenge bytes, then u32 big-endian ceiling. Observed evidence/controllers are excluded.