Module hyperloglog_rs::utils

Utils

This module provides utility functions used by the HyperLogLog algorithm implementation.

The functions provided are:

• ceil(numerator: usize, denominator: usize) -> usize: Calculates the integer ceil of the division of numerator by denominator.

• split_registers<const NUMBER_OF_REGISTERS_IN_WORD: usize>(word: u32) -> [u32; NUMBER_OF_REGISTERS_IN_WORD]: Split the given registers into an array of bytes where each element corresponds to a register of NUMBER_OF_BITS_PER_REGISTER bits. The number of registers in a single 32-bit registers word is specified by NUMBER_OF_REGISTERS_IN_WORD.

• word_from_registers<const NUMBER_OF_BITS_PER_REGISTER: usize>(registers: &[u32]) -> u32: Converts an array of HLL registers into a single 32-bit word.

Examples

assert_eq!(ceil(10, 5), 2);
assert_eq!(ceil(25, 5), 5);

let word = 0b0110_1001_1010_1111_0110_1001_1010_1111;
let registers = split_registers::<4>(word);
let expected = [0b1010_1111, 0b0110_1001, 0b1010_1111, 0b0110_1001];
assert_eq!(registers, expected, "Example 1, Expected: {:?}, got: {:?}", expected, registers);

let registers = [0b1010_1010_0101_0101, 0b1111_0000_1111_0000];
let word = word_from_registers::<16>(&registers);
assert_eq!(word, 0b1111_0000_1111_0000_1010_1010_0101_0101);

Functions

• ceil
  Calculates the integer ceil of the division of numerator by denominator.
• get_alpha
  Computes the alpha constant for the given number of registers.
• precompute_reciprocals
  Precomputes an array of reciprocal powers of two and returns it.
• precompute_small_corrections
  Precomputes small corrections for HyperLogLog algorithm.
• split_registers
  Split the given registers into an array of bytes where each element corresponds to a register of NUMBER_OF_BITS_PER_REGISTER bits. The number of registers in a single 32-bit registers word is specified by NUMBER_OF_REGISTERS_IN_WORD.
• word_from_registers
  Converts an array of HLL registers into a single 32-bit word.