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Registers

Struct Registers 

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pub struct Registers {
Show 18 fields pub pc: u16, pub sp: u16, pub af: u16, pub bc: u16, pub de: u16, pub hl: u16, pub af_alt: u16, pub bc_alt: u16, pub de_alt: u16, pub hl_alt: u16, pub ix: u16, pub iy: u16, pub wz: u16, pub i: u8, pub r: u8, pub interrupt_mode: InterruptMode, pub iff1: bool, pub iff2: bool,
}
Expand description

The complete architectural state of the processor.

Every field is public so that a caller restoring a saved machine can write the state directly, which is otherwise awkward to express through accessors. The core reads these fields as it executes, so writing them mid-instruction is permitted but will be observed immediately.

The register pairs are held as 16-bit values with the high byte in the upper half: the high byte of af is the accumulator and the low byte is the flags.

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§pc: u16

Program counter.

§sp: u16

Stack pointer.

§af: u16

Accumulator and flags.

§bc: u16

The BC pair.

§de: u16

The DE pair.

§hl: u16

The HL pair.

§af_alt: u16

The alternate accumulator and flags, reached with EX AF, AF'.

§bc_alt: u16

The alternate BC pair, reached with EXX.

§de_alt: u16

The alternate DE pair, reached with EXX.

§hl_alt: u16

The alternate HL pair, reached with EXX.

§ix: u16

The IX index register.

§iy: u16

The IY index register.

§wz: u16

The internal address latch, commonly written WZ or MEMPTR.

No instruction reads it directly, but BIT n, (HL) copies two of its bits into the undocumented flags. That makes it observable, so it’s worth modelling.

§i: u8

Interrupt vector base, the high byte of the vector address in interrupt mode 2.

§r: u8

Memory refresh counter. Only the low seven bits count — bit 7 is held across increments.

§interrupt_mode: InterruptMode

The selected interrupt mode.

§iff1: bool

Whether maskable interrupts are currently accepted.

§iff2: bool

The copy of iff1 saved when a non-maskable interrupt is accepted. RETN restores it, and LD A, I or LD A, R make it readable through the parity flag.

Trait Implementations§

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impl Clone for Registers

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fn clone(&self) -> Registers

Returns a duplicate of the value. Read more
1.0.0 (const: unstable) · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Copy for Registers

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impl Debug for Registers

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Default for Registers

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fn default() -> Registers

Returns the “default value” for a type. Read more
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impl Eq for Registers

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impl PartialEq for Registers

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fn eq(&self, other: &Registers) -> bool

Equality operator ==. Read more
1.0.0 (const: unstable) · Source§

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=. Read more
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impl StructuralPartialEq for Registers

Auto Trait Implementations§

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.