Expand description
Monomorphized vector register types for the hermes-simd workspace.
Provides compile-time configured type aliases that map to target-optimal registers and explicit aliases for each hardware backend.
Structs§
- Avx2
- x86/x86_64 AVX2 instruction set architecture marker.
- Avx512
- x86/x86_64 AVX-512F instruction set architecture marker.
- Bf4
- Brain Float 4: finite-only E2M1 with the top exponent reserved for NaN.
- Bf8
- Brain Float 8: IEEE-style E5M2 with infinity and NaN.
- Bf16
- bfloat16 (E8M7), stored as its raw
u16bit pattern. - F4
- Finite-only 4-bit float: E3M0 with the top exponent reserved for NaN.
- F8
- Finite-only 8-bit float: E4M3 with the top exponent reserved for NaN.
- F16
- IEEE 754 binary16 (half precision), stored as its raw
u16bit pattern. - F32
- Transparent wrapper for f32.
- F64
- Transparent wrapper for f64.
- I8
- Transparent wrapper for i8.
- I16
- Transparent wrapper for i16.
- I32
- Transparent wrapper for i32.
- Mask
- A type-safe, architecture-native SIMD mask type.
- Neon
- AArch64 NEON instruction set architecture marker.
- Scalar
- Fallback scalar implementation marker.
- Vector
- A monomorphized vector register type wrapping the architecture-native raw register.
Type Aliases§
- Avx2Bf4
- Concrete AVX2 bfloat4 vector register (32 lanes).
- Avx2Bf8
- Concrete AVX2 bfloat8 vector register (32 lanes).
- Avx2
Bf16 - Concrete AVX2 bfloat16 vector register (16 lanes).
- Avx2F4
- Concrete AVX2 float4 vector register (32 lanes).
- Avx2F8
- Concrete AVX2 float8 vector register (32 lanes).
- Avx2F16
- Concrete AVX2 standard f16 vector register (16 lanes).
- Avx2F32
- Concrete AVX2 f32 vector register (8 lanes).
- Avx2F64
- Concrete AVX2 f64 vector register (4 lanes).
- Avx2I8
- Concrete AVX2 i8 vector register (32 lanes).
- Avx2I16
- Concrete AVX2 i16 vector register (16 lanes).
- Avx2I32
- Concrete AVX2 i32 vector register (8 lanes).
- Avx2
Mask Bf16 - Concrete AVX2 bfloat16 mask register (16 lanes).
- Avx2
Mask F16 - Concrete AVX2 f16 mask register (16 lanes).
- Avx2
Mask F32 - Concrete AVX2 f32 mask register (8 lanes).
- Avx2
Mask F64 - Concrete AVX2 f64 mask register (4 lanes).
- Avx512
Bf4 - Concrete AVX-512 bfloat4 vector register (64 lanes).
- Avx512
Bf8 - Concrete AVX-512 bfloat8 vector register (64 lanes).
- Avx512
Bf16 - Concrete AVX-512 bfloat16 vector register (32 lanes).
- Avx512
F4 - Concrete AVX-512 float4 vector register (64 lanes).
- Avx512
F8 - Concrete AVX-512 float8 vector register (64 lanes).
- Avx512
F16 - Concrete AVX-512 standard f16 vector register (32 lanes).
- Avx512
F32 - Concrete AVX-512 f32 vector register (16 lanes).
- Avx512
F64 - Concrete AVX-512 f64 vector register (8 lanes).
- Avx512
I8 - Concrete AVX-512 i8 vector register (64 lanes).
- Avx512
I16 - Concrete AVX-512 i16 vector register (32 lanes).
- Avx512
I32 - Concrete AVX-512 i32 vector register (16 lanes).
- Avx512
Mask Bf16 - Concrete AVX-512 bfloat16 mask register (32 lanes).
- Avx512
Mask F16 - Concrete AVX-512 f16 mask register (32 lanes).
- Avx512
Mask F32 - Concrete AVX-512 f32 mask register (16 lanes).
- Avx512
Mask F64 - Concrete AVX-512 f64 mask register (8 lanes).
- MaskBf4
- Generic bfloat4 SIMD lane selection mask.
- MaskBf8
- Generic bfloat8 SIMD lane selection mask.
- Mask
Bf16 - Generic bfloat16 SIMD lane selection mask.
- MaskF4
- Generic float4 SIMD lane selection mask.
- MaskF8
- Generic float8 SIMD lane selection mask.
- MaskF16
- Generic standard f16 SIMD lane selection mask.
- MaskF32
- Generic f32 SIMD lane selection mask.
- MaskF64
- Generic f64 SIMD lane selection mask.
- MaskI8
- Generic i8 SIMD lane selection mask.
- MaskI16
- Generic i16 SIMD lane selection mask.
- MaskI32
- Generic i32 SIMD lane selection mask.
- Preferred
Arch - The optimal target architecture typestate compiled for the current host CPU target.
- Scalar
Bf4 - Concrete 1-element scalar emulation bfloat4 vector register.
- Scalar
Bf8 - Concrete 1-element scalar emulation bfloat8 vector register.
- Scalar
Bf16 - Concrete 1-element scalar emulation bfloat16 vector register.
- Scalar
F4 - Concrete 1-element scalar emulation float4 vector register.
- Scalar
F8 - Concrete 1-element scalar emulation float8 vector register.
- Scalar
F16 - Concrete 1-element scalar emulation f16 vector register.
- Scalar
F32 - Concrete 1-element scalar emulation f32 vector register.
- Scalar
F64 - Concrete 1-element scalar emulation f64 vector register.
- Scalar
I8 - Concrete 1-element scalar emulation i8 vector register.
- Scalar
I16 - Concrete 1-element scalar emulation i16 vector register.
- Scalar
I32 - Concrete 1-element scalar emulation i32 vector register.
- Scalar
Mask F32 - Concrete 1-element scalar emulation f32 mask register.
- Scalar
Mask F64 - Concrete 1-element scalar emulation f64 mask register.
- SimdBf4
- Optimal bfloat4 SIMD register compiled for the host.
- SimdBf8
- Optimal bfloat8 SIMD register compiled for the host.
- Simd
Bf16 - Optimal bfloat16 SIMD register compiled for the host.
- SimdF4
- Optimal float4 SIMD register compiled for the host.
- SimdF8
- Optimal float8 SIMD register compiled for the host.
- SimdF16
- Optimal f16 SIMD register compiled for the host.
- SimdF32
- Optimal f32 SIMD register compiled for the host.
- SimdF64
- Optimal f64 SIMD register compiled for the host.
- SimdI8
- Optimal i8 SIMD register compiled for the host.
- SimdI16
- Optimal i16 SIMD register compiled for the host.
- SimdI32
- Optimal i32 SIMD register compiled for the host.
- Simd
Mask Bf4 - Optimal bfloat4 SIMD mask register compiled for the host.
- Simd
Mask Bf8 - Optimal bfloat8 SIMD mask register compiled for the host.
- Simd
Mask Bf16 - Optimal bfloat16 SIMD mask register compiled for the host.
- Simd
Mask F4 - Optimal float4 SIMD mask register compiled for the host.
- Simd
Mask F8 - Optimal float8 SIMD mask register compiled for the host.
- Simd
Mask F16 - Optimal f16 SIMD mask register compiled for the host.
- Simd
Mask F32 - Optimal f32 SIMD mask register compiled for the host.
- Simd
Mask F64 - Optimal f64 SIMD mask register compiled for the host.
- Simd
Mask I8 - Optimal i8 SIMD mask register compiled for the host.
- Simd
Mask I16 - Optimal i16 SIMD mask register compiled for the host.
- Simd
Mask I32 - Optimal i32 SIMD mask register compiled for the host.
- Vector
Bf4 - Generic bfloat4 SIMD vector register.
- Vector
Bf8 - Generic bfloat8 SIMD vector register.
- Vector
Bf16 - Generic bfloat16 SIMD vector register.
- Vector
F4 - Generic float4 SIMD vector register.
- Vector
F8 - Generic float8 SIMD vector register.
- Vector
F16 - Generic standard f16 SIMD vector register.
- Vector
F32 - Generic f32 SIMD vector register.
- Vector
F64 - Generic f64 SIMD vector register.
- Vector
I8 - Generic i8 SIMD vector register.
- Vector
I16 - Generic i16 SIMD vector register.
- Vector
I32 - Generic i32 SIMD vector register.