Struct F16 

#[repr(transparent)]
pub struct F16(pub u16);

IEEE 754 binary16 (half precision), stored as its raw u16 bit pattern.

Conversions run through the native convert kernel; PartialEq/PartialOrd are float-semantic (via f32), not bitwise.

Tuple Fields

0: u16

Implementations

impl F16

pub const ZERO: F16

The value +0.0.

pub const ONE: F16

The value 1.0.

pub const NAN: F16

A quiet not-a-number.

pub const INFINITY: F16

Positive infinity.

pub const NEG_INFINITY: F16

Negative infinity.

pub const fn from_bits(bits: u16) -> F16

Construct from an IEEE 754 binary16 bit pattern without conversion.

Examples

let one = eunomia::F16::from_bits(0x3C00);
assert_eq!(one.to_f32(), 1.0);

pub const fn to_bits(self) -> u16

Return the unchanged IEEE 754 binary16 bit pattern.

Examples

let negative_zero = eunomia::F16::from_bits(0x8000);
assert_eq!(negative_zero.to_bits(), 0x8000);

pub fn to_f32(self) -> f32

Widen to f32 (exact).

pub fn from_f32(value: f32) -> F16

Narrow from f32, rounding to nearest with ties to even.

pub fn from_f64(value: f64) -> F16

Narrow from f64 via f32 — exact, since f32’s 24-bit significand meets the 2·11 + 2 bits the double-rounding theorem requires for binary16.

pub fn is_finite(self) -> bool

Whether self is finite (neither infinite nor NaN).

pub fn is_nan(self) -> bool

Whether self is NaN.

pub fn widen_slice(src: &[F16], dst: &mut [f32])

Widen a slice of F16 into f32 — F16C-accelerated on x86-64, scalar elsewhere. Writes min(src.len(), dst.len()) elements.

pub fn narrow_slice(src: &[f32], dst: &mut [F16])

Narrow a slice of f32 into F16, rounding to nearest with ties to even — F16C-accelerated on x86-64. Writes min(src.len(), dst.len()) elements.

Trait Implementations

impl Add for F16

type Output = F16

The resulting type after applying the + operator.

fn add(self, rhs: F16) -> F16

Performs the + operation.

impl AddAssign for F16

fn add_assign(&mut self, rhs: F16)

Performs the += operation.

impl CastFrom<Bf4> for F16

fn cast_from(val: Bf4) -> F16

Cast from type T to Self.

impl CastFrom<Bf8> for F16

fn cast_from(val: Bf8) -> F16

Cast from type T to Self.

impl CastFrom<Bf16> for F16

fn cast_from(val: Bf16) -> F16

Cast from type T to Self.

impl CastFrom<F4> for F16

fn cast_from(val: F4) -> F16

Cast from type T to Self.

impl CastFrom<F8> for F16

fn cast_from(val: F8) -> F16

Cast from type T to Self.

impl CastFrom<F16> for I8

fn cast_from(val: F16) -> I8

Cast from type T to Self.

impl CastFrom<F16> for I16

fn cast_from(val: F16) -> I16

Cast from type T to Self.

impl CastFrom<F16> for I32

fn cast_from(val: F16) -> I32

Cast from type T to Self.

impl CastFrom<F16> for F32

fn cast_from(val: F16) -> F32

Cast from type T to Self.

impl CastFrom<F16> for F64

fn cast_from(val: F16) -> F64

Cast from type T to Self.

impl CastFrom<F16> for Bf16

fn cast_from(val: F16) -> Bf16

Cast from type T to Self.

impl CastFrom<F16> for Bf8

fn cast_from(val: F16) -> Bf8

Cast from type T to Self.

impl CastFrom<F16> for Bf4

fn cast_from(val: F16) -> Bf4

Cast from type T to Self.

impl CastFrom<F16> for F8

fn cast_from(val: F16) -> F8

Cast from type T to Self.

impl CastFrom<F16> for F4

fn cast_from(val: F16) -> F4

Cast from type T to Self.

impl CastFrom<F16> for F16

fn cast_from(val: F16) -> F16

Cast from type T to Self.

impl CastFrom<F32> for F16

fn cast_from(val: F32) -> F16

Cast from type T to Self.

impl CastFrom<F64> for F16

fn cast_from(val: F64) -> F16

Cast from type T to Self.

impl CastFrom<I8> for F16

fn cast_from(val: I8) -> F16

Cast from type T to Self.

impl CastFrom<I16> for F16

fn cast_from(val: I16) -> F16

Cast from type T to Self.

impl CastFrom<I32> for F16

fn cast_from(val: I32) -> F16

Cast from type T to Self.

impl CastFrom<f32> for F16

fn cast_from(val: f32) -> F16

Cast from type T to Self.

impl CastFrom<f64> for F16

fn cast_from(val: f64) -> F16

Cast from type T to Self.

impl CastFrom<i8> for F16

fn cast_from(val: i8) -> F16

Cast from type T to Self.

impl CastFrom<i16> for F16

fn cast_from(val: i16) -> F16

Cast from type T to Self.

impl CastFrom<i32> for F16

fn cast_from(val: i32) -> F16

Cast from type T to Self.

impl Clone for F16

fn clone(&self) -> F16

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for F16

impl Debug for F16

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Default for F16

fn default() -> F16

Returns the “default value” for a type.

impl Div for F16

type Output = F16

The resulting type after applying the / operator.

fn div(self, rhs: F16) -> F16

Performs the / operation.

impl FloatElement for F16

fn from_f32(val: f32) -> F16

Convert from f32.

fn from_f64(val: f64) -> F16

Convert from f64.

fn to_f32(self) -> f32

Cast to f32.

fn exp(self) -> Self

e^self.

fn ln(self) -> Self

Natural logarithm.

fn sin(self) -> Self

Sine (radians).

fn cos(self) -> Self

Cosine (radians).

fn acos(self) -> Self

Inverse cosine (radians).

fn tan(self) -> Self

Tangent (radians).

fn sinh(self) -> Self

Hyperbolic sine.

fn cosh(self) -> Self

Hyperbolic cosine.

fn tanh(self) -> Self

Hyperbolic tangent.

fn atan2(self, other: Self) -> Self

Four-quadrant arctangent of self / other.

fn powf(self, n: Self) -> Self

self raised to the power n.

fn recip(self) -> Self

Reciprocal 1 / self.

fn floor(self) -> Self

Largest integer ≤ self.

fn ceil(self) -> Self

Smallest integer ≥ self.

fn round(self) -> Self

Nearest integer, half away from zero.

fn trunc(self) -> Self

Integer part (toward zero).

fn signum(self) -> Self

Sign of self: 1 for positive/+0, -1 for negative/-0, NaN for NaN (matching f64::signum / num_traits::Float::signum).

fn powi(self, n: i32) -> Self

self raised to an integer power via exponentiation by squaring.

fn log10(self) -> Self

Base-10 logarithm, log₁₀(self).

fn log2(self) -> Self

Base-2 logarithm, log₂(self).

fn erf(self) -> Self

Error function erf(self) = 2/√π ∫₀ˢᵉˡᶠ e^(-t²) dt.

fn erfc(self) -> Self

Complementary error function erfc(self) = 1 - erf(self), computed without the cancellation error of 1 - erf for large self.

fn lgamma(self) -> Self

Natural logarithm of the absolute value of the gamma function, ln|Γ(self)|.

fn default_epsilon() -> Self

where Self: RealField,

Machine epsilon (nalgebra::RealField::default_epsilon compatibility alias).

fn pi() -> Self

where Self: RealField,

Returns π as this float type (nalgebra compatibility alias for RealField::PI).

fn max(self, other: Self) -> Self

Componentwise maximum (method form; prefer NumericElement::max_scalar in new code).

fn min(self, other: Self) -> Self

Componentwise minimum (method form; prefer NumericElement::min_scalar in new code).

fn norm(self) -> Self

L2 (Euclidean) norm — for scalars this is the absolute value.

impl Mul for F16

type Output = F16

The resulting type after applying the * operator.

fn mul(self, rhs: F16) -> F16

Performs the * operation.

impl MulAssign for F16

fn mul_assign(&mut self, rhs: F16)

Performs the *= operation.

impl Neg for F16

type Output = F16

The resulting type after applying the - operator.

fn neg(self) -> F16

Performs the unary - operation.

impl NumericElement for F16

const ZERO: F16 = F16::ZERO

Additive identity.

const ONE: F16 = F16::ONE

Multiplicative identity.

const NAN: F16 = F16::NAN

IEEE 754 not-a-number sentinel.

const INFINITY: F16 = F16::INFINITY

IEEE 754 positive infinity.

const MIN_VALUE: F16 = F16::NEG_INFINITY

The minimum representable finite value (negative infinity or i32::MIN).

const MAX_VALUE: F16 = F16::INFINITY

The maximum representable finite value (positive infinity or i32::MAX).

const BYTE_WIDTH: usize = 2

Number of bytes per element.

const ALL_ONES: F16

Bitwise representation with all bits set to 1.

const SIGN_MASK: F16

IEEE 754 sign-bit mask: only the most-significant bit is set.

fn abs(self) -> F16

Absolute value.

fn scalar_fmadd(self, b: F16, c: F16) -> F16

Scalar fused multiply-add: (self * b) + c.

fn sqrt(self) -> F16

Square root. Floats follow IEEE 754 (NaN for negative inputs); integers return the exact floor integer square root (isqrt), with negative signed inputs defined to return 0 (integers have no NaN to signal the domain error). No f64 round-trip, so the integer result is exact for all operands.

fn is_finite(self) -> bool

Returns true if finite.

fn is_nan(self) -> bool

Returns true if NaN.

fn to_f64(self) -> f64

Cast to f64.

fn bitand(self, rhs: F16) -> F16

Bitwise AND.

fn bitor(self, rhs: F16) -> F16

Bitwise OR.

fn bitxor(self, rhs: F16) -> F16

Bitwise XOR.

fn count_ones(self) -> u32

Count set bits (population count).

fn min_scalar(self, other: Self) -> Self

where Self: PartialOrd,

Elementwise minimum: returns self if self <= other, else other.

fn max_scalar(self, other: Self) -> Self

where Self: PartialOrd,

Elementwise maximum: returns self if self >= other, else other.

fn saturating_add(self, rhs: Self) -> Self

Saturating addition.

fn saturating_mul(self, rhs: Self) -> Self

Saturating multiplication.

fn checked_add(self, rhs: Self) -> Option<Self>

Checked addition: returns Some(self + rhs) or None on integer overflow.

fn checked_mul(self, rhs: Self) -> Option<Self>

Checked multiplication: returns Some(self * rhs) or None on integer overflow.

impl PartialEq for F16

fn eq(&self, other: &F16) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl PartialOrd for F16

fn partial_cmp(&self, other: &F16) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Pod for F16

impl Pod for F16

impl Rem for F16

type Output = F16

The resulting type after applying the % operator.

fn rem(self, rhs: F16) -> F16

Performs the % operation.

impl RemAssign for F16

fn rem_assign(&mut self, rhs: F16)

Performs the %= operation.

impl SimdKernel<F16> for Scalar

const LANE_COUNT: usize = 8

Number of primitive elements of type T in one Vector.

const UNROLL_FACTOR: usize = 4

Loop unrolling register accumulation factor to break loop-carried dependency chains.

type Vector = [F16; 8]

The underlying raw register/vector type for this architecture and element type.

type Mask = [bool; 8]

Hardware-native mask type.

type IndexVector = [i32; 8]

Integer index vector for gather operations.

unsafe fn load_aligned(ptr: *const F16) -> <Scalar as SimdKernel<F16>>::Vector

Load a vector from an aligned pointer.

unsafe fn load_unaligned(ptr: *const F16) -> <Scalar as SimdKernel<F16>>::Vector

Load a vector from an unaligned pointer.

unsafe fn store_aligned(ptr: *mut F16, val: <Scalar as SimdKernel<F16>>::Vector)

Store a vector to an aligned pointer.

unsafe fn store_unaligned( ptr: *mut F16, val: <Scalar as SimdKernel<F16>>::Vector, )

Store a vector to an unaligned pointer.

unsafe fn add( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Elementwise addition: a + b.

unsafe fn mul( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Elementwise multiplication: a * b.

unsafe fn sub( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Elementwise subtraction: a - b.

unsafe fn fmadd( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, c: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Fused multiply-add: (a * b) + c.

unsafe fn sum_reduce(v: <Scalar as SimdKernel<F16>>::Vector) -> F16

Horizontal sum of all lanes.

unsafe fn masked_load_unaligned( ptr: *const F16, mask: <Scalar as SimdKernel<F16>>::Mask, src: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Masked load: active lanes loaded from ptr, inactive lanes taken from src.

unsafe fn masked_store_unaligned( ptr: *mut F16, mask: <Scalar as SimdKernel<F16>>::Mask, val: <Scalar as SimdKernel<F16>>::Vector, )

Masked store: active lanes written to ptr, inactive lanes left unchanged.

unsafe fn masked_add( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, src: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Masked elementwise add: active lanes compute a + b, inactive lanes yield src.

unsafe fn masked_mul( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, src: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Masked elementwise multiply: active lanes compute a * b, inactive lanes yield src.

unsafe fn masked_fmadd( a: <Scalar as SimdKernel<F16>>::Vector, b: <Scalar as SimdKernel<F16>>::Vector, c: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, ) -> <Scalar as SimdKernel<F16>>::Vector

Masked fused multiply-add: active lanes compute (a * b) + c, inactive lanes retain c.

unsafe fn masked_sum_reduce( v: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, ) -> F16

Masked horizontal sum: only lanes where mask[i]=1 contribute.

unsafe fn compress( src: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, ) -> <Scalar as SimdKernel<F16>>::Vector

Compress: pack selected lanes (where mask[i]=1) into the low lanes of the result.

unsafe fn expand( src: <Scalar as SimdKernel<F16>>::Vector, mask: <Scalar as SimdKernel<F16>>::Mask, fill: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Expand: scatter the low lanes of src into result positions where mask[i]=1.

unsafe fn gather( base: *const F16, indices: <Scalar as SimdKernel<F16>>::IndexVector, ) -> <Scalar as SimdKernel<F16>>::Vector

Gather: load LANE_COUNT elements at base + indices[i] for each lane i.

unsafe fn gather_masked( base: *const F16, indices: <Scalar as SimdKernel<F16>>::IndexVector, mask: <Scalar as SimdKernel<F16>>::Mask, src: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Vector

Masked gather: gather active lanes; inactive lanes take value from src.

unsafe fn mask_from_bools(bits: &[bool]) -> <Scalar as SimdKernel<F16>>::Mask

Construct a mask from a slice of booleans (length must equal LANE_COUNT).

unsafe fn leading_k_mask(k: usize) -> <Scalar as SimdKernel<F16>>::Mask

Construct a mask with the first k lanes active and the rest inactive.

unsafe fn zero() -> <Scalar as SimdKernel<F16>>::Vector

Set all lanes to zero.

unsafe fn splat(val: F16) -> <Scalar as SimdKernel<F16>>::Vector

Broadcast a scalar value to all lanes.

unsafe fn mask_to_bitmask(mask: <Scalar as SimdKernel<F16>>::Mask) -> u64

Convert the native mask back to a raw u64 bitmask.

unsafe fn mask_to_vector( mask: <Scalar as SimdKernel<F16>>::Mask, ) -> <Scalar as SimdKernel<F16>>::Vector

Convert the native mask back to a vector register where active lanes are set to T::ALL_ONES and inactive lanes to T::ZERO.

unsafe fn vector_to_mask( v: <Scalar as SimdKernel<F16>>::Vector, ) -> <Scalar as SimdKernel<F16>>::Mask

Convert a comparison-result vector into the native mask, the inverse of SimdKernel::mask_to_vector.

const LANE_BOUND_CHECK: () = _

Compile-time guard that LANE_COUNT fits the fixed MAX_SIMD_LANES scalar-fallback stack buffers. Referencing this const in the buffer-using default methods forces the assertion to be evaluated for each concrete backend at monomorphization, turning a would-be silent stack-buffer overflow into a compile error.

const SUPPORTS_NT_STORE: bool = false

Whether this backend provides a non-temporal (cache-bypassing) store via store_streaming. Backends leaving this false keep the regular store default; callers gate the streaming path on this const so it is a compile-time branch, dead-code-eliminated where unsupported.

unsafe fn store_streaming(ptr: *mut T, val: Self::Vector)

Store a vector with a non-temporal (streaming) hint that bypasses the cache, avoiding the read-for-ownership traffic a normal write-allocate pays for write-only data larger than the last-level cache (measured 1.71× on out-of-LLC AVX2 f32 elementwise writes; see streaming_bench).

fn stream_write_barrier()

Fence ordering this backend’s non-temporal stores before subsequent reads. No-op by default (only meaningful where store_streaming is a weakly ordered non-temporal store).

unsafe fn mask_from_bitmask(bm: u64) -> Self::Mask

Convert a raw u64 bitmask to the architecture-native mask type.

unsafe fn scan_vector<Op, SMode>(v: Self::Vector, carry: T) -> (Self::Vector, T)

where Op: ScanOp<T>, SMode: ScanMode,

Perform an intra-vector prefix scan (inclusive or exclusive) of the vector, using the specified ScanOp strategy and starting carry value. Returns the scanned vector and the final carry value.

unsafe fn div(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise division: a / b.

unsafe fn bitand(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise AND: a & b.

unsafe fn bitor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise OR: a | b.

unsafe fn bitxor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise XOR: a ^ b.

unsafe fn abs(a: Self::Vector) -> Self::Vector

Elementwise absolute value.

unsafe fn min(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise minimum of a and b.

unsafe fn max(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise maximum of a and b.

unsafe fn sqrt(a: Self::Vector) -> Self::Vector

Elementwise square root.

unsafe fn recip_sqrt(a: Self::Vector) -> Self::Vector

Elementwise reciprocal square root, 1/√x, to full T precision (~1 ulp).

unsafe fn cmp_eq(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise equal: a == b.

unsafe fn cmp_ne(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise not equal: a != b.

unsafe fn cmp_lt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than: a < b.

unsafe fn cmp_le(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than or equal: a <= b.

unsafe fn cmp_gt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than: a > b.

unsafe fn cmp_ge(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than or equal: a >= b.

unsafe fn blend( mask: Self::Vector, true_val: Self::Vector, false_val: Self::Vector, ) -> Self::Vector

Elementwise blend: select lanes from true_val where the sign bit of mask is set, and from false_val otherwise.

unsafe fn neg(a: Self::Vector) -> Self::Vector

Elementwise negate: -a.

unsafe fn bitnot(a: Self::Vector) -> Self::Vector

Elementwise bitwise NOT: !a.

unsafe fn min_reduce(v: Self::Vector) -> T

Horizontal minimum across all lanes.

unsafe fn max_reduce(v: Self::Vector) -> T

Horizontal maximum across all lanes.

unsafe fn popcount(a: Self::Vector) -> Self::Vector

Elementwise population count (number of set bits).

unsafe fn horizontal_bitwise_and(v: Self::Vector) -> T

Horizontal bitwise AND across all lanes.

unsafe fn horizontal_bitwise_or(v: Self::Vector) -> T

Horizontal bitwise OR across all lanes.

unsafe fn horizontal_bitwise_xor(v: Self::Vector) -> T

Horizontal bitwise XOR across all lanes.

unsafe fn swap_adjacent(v: Self::Vector) -> Self::Vector

Swap each adjacent lane pair: [a0, a1, a2, a3, ...] -> [a1, a0, a3, a2, ...].

unsafe fn dup_even(v: Self::Vector) -> Self::Vector

Duplicate even lanes into odd lanes: [a0, a1, a2, a3, ...] -> [a0, a0, a2, a2, ...].

unsafe fn dup_odd(v: Self::Vector) -> Self::Vector

Duplicate odd lanes into even lanes: [a0, a1, a2, a3, ...] -> [a1, a1, a3, a3, ...].

unsafe fn fmaddsub( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b - c, odd lanes a*b + c.

unsafe fn fmsubadd( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b + c, odd lanes a*b - c.

impl SimdKernel<F16> for Avx2

Available on x86 or x86-64 only.

const LANE_COUNT: usize = 16

Number of primitive elements of type T in one Vector.

const UNROLL_FACTOR: usize = 4

Loop unrolling register accumulation factor to break loop-carried dependency chains.

type Vector = [F16; 16]

The underlying raw register/vector type for this architecture and element type.

type Mask = [bool; 16]

Hardware-native mask type.

type IndexVector = [i32; 16]

Integer index vector for gather operations.

unsafe fn load_aligned(ptr: *const F16) -> <Avx2 as SimdKernel<F16>>::Vector

Load a vector from an aligned pointer.

unsafe fn load_unaligned(ptr: *const F16) -> <Avx2 as SimdKernel<F16>>::Vector

Load a vector from an unaligned pointer.

unsafe fn store_aligned(ptr: *mut F16, val: <Avx2 as SimdKernel<F16>>::Vector)

Store a vector to an aligned pointer.

unsafe fn store_unaligned(ptr: *mut F16, val: <Avx2 as SimdKernel<F16>>::Vector)

Store a vector to an unaligned pointer.

unsafe fn add( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Elementwise addition: a + b.

unsafe fn mul( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Elementwise multiplication: a * b.

unsafe fn sub( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Elementwise subtraction: a - b.

unsafe fn fmadd( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, c: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Fused multiply-add: (a * b) + c.

unsafe fn sum_reduce(v: <Avx2 as SimdKernel<F16>>::Vector) -> F16

Horizontal sum of all lanes.

unsafe fn masked_load_unaligned( ptr: *const F16, mask: <Avx2 as SimdKernel<F16>>::Mask, src: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Masked load: active lanes loaded from ptr, inactive lanes taken from src.

unsafe fn masked_store_unaligned( ptr: *mut F16, mask: <Avx2 as SimdKernel<F16>>::Mask, val: <Avx2 as SimdKernel<F16>>::Vector, )

Masked store: active lanes written to ptr, inactive lanes left unchanged.

unsafe fn masked_add( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, src: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Masked elementwise add: active lanes compute a + b, inactive lanes yield src.

unsafe fn masked_mul( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, src: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Masked elementwise multiply: active lanes compute a * b, inactive lanes yield src.

unsafe fn masked_fmadd( a: <Avx2 as SimdKernel<F16>>::Vector, b: <Avx2 as SimdKernel<F16>>::Vector, c: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, ) -> <Avx2 as SimdKernel<F16>>::Vector

Masked fused multiply-add: active lanes compute (a * b) + c, inactive lanes retain c.

unsafe fn masked_sum_reduce( v: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, ) -> F16

Masked horizontal sum: only lanes where mask[i]=1 contribute.

unsafe fn compress( src: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, ) -> <Avx2 as SimdKernel<F16>>::Vector

Compress: pack selected lanes (where mask[i]=1) into the low lanes of the result.

unsafe fn expand( src: <Avx2 as SimdKernel<F16>>::Vector, mask: <Avx2 as SimdKernel<F16>>::Mask, fill: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Expand: scatter the low lanes of src into result positions where mask[i]=1.

unsafe fn gather( base: *const F16, indices: <Avx2 as SimdKernel<F16>>::IndexVector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Gather: load LANE_COUNT elements at base + indices[i] for each lane i.

unsafe fn gather_masked( base: *const F16, indices: <Avx2 as SimdKernel<F16>>::IndexVector, mask: <Avx2 as SimdKernel<F16>>::Mask, src: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Vector

Masked gather: gather active lanes; inactive lanes take value from src.

unsafe fn mask_from_bools(bits: &[bool]) -> <Avx2 as SimdKernel<F16>>::Mask

Construct a mask from a slice of booleans (length must equal LANE_COUNT).

unsafe fn leading_k_mask(k: usize) -> <Avx2 as SimdKernel<F16>>::Mask

Construct a mask with the first k lanes active and the rest inactive.

unsafe fn zero() -> <Avx2 as SimdKernel<F16>>::Vector

Set all lanes to zero.

unsafe fn splat(val: F16) -> <Avx2 as SimdKernel<F16>>::Vector

Broadcast a scalar value to all lanes.

unsafe fn mask_to_bitmask(mask: <Avx2 as SimdKernel<F16>>::Mask) -> u64

Convert the native mask back to a raw u64 bitmask.

unsafe fn mask_to_vector( mask: <Avx2 as SimdKernel<F16>>::Mask, ) -> <Avx2 as SimdKernel<F16>>::Vector

Convert the native mask back to a vector register where active lanes are set to T::ALL_ONES and inactive lanes to T::ZERO.

unsafe fn vector_to_mask( v: <Avx2 as SimdKernel<F16>>::Vector, ) -> <Avx2 as SimdKernel<F16>>::Mask

Convert a comparison-result vector into the native mask, the inverse of SimdKernel::mask_to_vector.

const LANE_BOUND_CHECK: () = _

Compile-time guard that LANE_COUNT fits the fixed MAX_SIMD_LANES scalar-fallback stack buffers. Referencing this const in the buffer-using default methods forces the assertion to be evaluated for each concrete backend at monomorphization, turning a would-be silent stack-buffer overflow into a compile error.

const SUPPORTS_NT_STORE: bool = false

Whether this backend provides a non-temporal (cache-bypassing) store via store_streaming. Backends leaving this false keep the regular store default; callers gate the streaming path on this const so it is a compile-time branch, dead-code-eliminated where unsupported.

unsafe fn store_streaming(ptr: *mut T, val: Self::Vector)

Store a vector with a non-temporal (streaming) hint that bypasses the cache, avoiding the read-for-ownership traffic a normal write-allocate pays for write-only data larger than the last-level cache (measured 1.71× on out-of-LLC AVX2 f32 elementwise writes; see streaming_bench).

fn stream_write_barrier()

Fence ordering this backend’s non-temporal stores before subsequent reads. No-op by default (only meaningful where store_streaming is a weakly ordered non-temporal store).

unsafe fn mask_from_bitmask(bm: u64) -> Self::Mask

Convert a raw u64 bitmask to the architecture-native mask type.

unsafe fn scan_vector<Op, SMode>(v: Self::Vector, carry: T) -> (Self::Vector, T)

where Op: ScanOp<T>, SMode: ScanMode,

Perform an intra-vector prefix scan (inclusive or exclusive) of the vector, using the specified ScanOp strategy and starting carry value. Returns the scanned vector and the final carry value.

unsafe fn div(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise division: a / b.

unsafe fn bitand(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise AND: a & b.

unsafe fn bitor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise OR: a | b.

unsafe fn bitxor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise XOR: a ^ b.

unsafe fn abs(a: Self::Vector) -> Self::Vector

Elementwise absolute value.

unsafe fn min(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise minimum of a and b.

unsafe fn max(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise maximum of a and b.

unsafe fn sqrt(a: Self::Vector) -> Self::Vector

Elementwise square root.

unsafe fn recip_sqrt(a: Self::Vector) -> Self::Vector

Elementwise reciprocal square root, 1/√x, to full T precision (~1 ulp).

unsafe fn cmp_eq(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise equal: a == b.

unsafe fn cmp_ne(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise not equal: a != b.

unsafe fn cmp_lt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than: a < b.

unsafe fn cmp_le(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than or equal: a <= b.

unsafe fn cmp_gt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than: a > b.

unsafe fn cmp_ge(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than or equal: a >= b.

unsafe fn blend( mask: Self::Vector, true_val: Self::Vector, false_val: Self::Vector, ) -> Self::Vector

Elementwise blend: select lanes from true_val where the sign bit of mask is set, and from false_val otherwise.

unsafe fn neg(a: Self::Vector) -> Self::Vector

Elementwise negate: -a.

unsafe fn bitnot(a: Self::Vector) -> Self::Vector

Elementwise bitwise NOT: !a.

unsafe fn min_reduce(v: Self::Vector) -> T

Horizontal minimum across all lanes.

unsafe fn max_reduce(v: Self::Vector) -> T

Horizontal maximum across all lanes.

unsafe fn popcount(a: Self::Vector) -> Self::Vector

Elementwise population count (number of set bits).

unsafe fn horizontal_bitwise_and(v: Self::Vector) -> T

Horizontal bitwise AND across all lanes.

unsafe fn horizontal_bitwise_or(v: Self::Vector) -> T

Horizontal bitwise OR across all lanes.

unsafe fn horizontal_bitwise_xor(v: Self::Vector) -> T

Horizontal bitwise XOR across all lanes.

unsafe fn swap_adjacent(v: Self::Vector) -> Self::Vector

Swap each adjacent lane pair: [a0, a1, a2, a3, ...] -> [a1, a0, a3, a2, ...].

unsafe fn dup_even(v: Self::Vector) -> Self::Vector

Duplicate even lanes into odd lanes: [a0, a1, a2, a3, ...] -> [a0, a0, a2, a2, ...].

unsafe fn dup_odd(v: Self::Vector) -> Self::Vector

Duplicate odd lanes into even lanes: [a0, a1, a2, a3, ...] -> [a1, a1, a3, a3, ...].

unsafe fn fmaddsub( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b - c, odd lanes a*b + c.

unsafe fn fmsubadd( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b + c, odd lanes a*b - c.

impl SimdKernel<F16> for Avx512

Available on x86 or x86-64 only.

const LANE_COUNT: usize = 32

Number of primitive elements of type T in one Vector.

const UNROLL_FACTOR: usize = 4

Loop unrolling register accumulation factor to break loop-carried dependency chains.

type Vector = [F16; 32]

The underlying raw register/vector type for this architecture and element type.

type Mask = [bool; 32]

Hardware-native mask type.

type IndexVector = [i32; 32]

Integer index vector for gather operations.

unsafe fn load_aligned(ptr: *const F16) -> <Avx512 as SimdKernel<F16>>::Vector

Load a vector from an aligned pointer.

unsafe fn load_unaligned(ptr: *const F16) -> <Avx512 as SimdKernel<F16>>::Vector

Load a vector from an unaligned pointer.

unsafe fn store_aligned(ptr: *mut F16, val: <Avx512 as SimdKernel<F16>>::Vector)

Store a vector to an aligned pointer.

unsafe fn store_unaligned( ptr: *mut F16, val: <Avx512 as SimdKernel<F16>>::Vector, )

Store a vector to an unaligned pointer.

unsafe fn add( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Elementwise addition: a + b.

unsafe fn mul( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Elementwise multiplication: a * b.

unsafe fn sub( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Elementwise subtraction: a - b.

unsafe fn fmadd( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, c: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Fused multiply-add: (a * b) + c.

unsafe fn sum_reduce(v: <Avx512 as SimdKernel<F16>>::Vector) -> F16

Horizontal sum of all lanes.

unsafe fn masked_load_unaligned( ptr: *const F16, mask: <Avx512 as SimdKernel<F16>>::Mask, src: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Masked load: active lanes loaded from ptr, inactive lanes taken from src.

unsafe fn masked_store_unaligned( ptr: *mut F16, mask: <Avx512 as SimdKernel<F16>>::Mask, val: <Avx512 as SimdKernel<F16>>::Vector, )

Masked store: active lanes written to ptr, inactive lanes left unchanged.

unsafe fn masked_add( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, src: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Masked elementwise add: active lanes compute a + b, inactive lanes yield src.

unsafe fn masked_mul( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, src: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Masked elementwise multiply: active lanes compute a * b, inactive lanes yield src.

unsafe fn masked_fmadd( a: <Avx512 as SimdKernel<F16>>::Vector, b: <Avx512 as SimdKernel<F16>>::Vector, c: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, ) -> <Avx512 as SimdKernel<F16>>::Vector

Masked fused multiply-add: active lanes compute (a * b) + c, inactive lanes retain c.

unsafe fn masked_sum_reduce( v: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, ) -> F16

Masked horizontal sum: only lanes where mask[i]=1 contribute.

unsafe fn compress( src: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, ) -> <Avx512 as SimdKernel<F16>>::Vector

Compress: pack selected lanes (where mask[i]=1) into the low lanes of the result.

unsafe fn expand( src: <Avx512 as SimdKernel<F16>>::Vector, mask: <Avx512 as SimdKernel<F16>>::Mask, fill: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Expand: scatter the low lanes of src into result positions where mask[i]=1.

unsafe fn gather( base: *const F16, indices: <Avx512 as SimdKernel<F16>>::IndexVector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Gather: load LANE_COUNT elements at base + indices[i] for each lane i.

unsafe fn gather_masked( base: *const F16, indices: <Avx512 as SimdKernel<F16>>::IndexVector, mask: <Avx512 as SimdKernel<F16>>::Mask, src: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Vector

Masked gather: gather active lanes; inactive lanes take value from src.

unsafe fn mask_from_bools(bits: &[bool]) -> <Avx512 as SimdKernel<F16>>::Mask

Construct a mask from a slice of booleans (length must equal LANE_COUNT).

unsafe fn leading_k_mask(k: usize) -> <Avx512 as SimdKernel<F16>>::Mask

Construct a mask with the first k lanes active and the rest inactive.

unsafe fn zero() -> <Avx512 as SimdKernel<F16>>::Vector

Set all lanes to zero.

unsafe fn splat(val: F16) -> <Avx512 as SimdKernel<F16>>::Vector

Broadcast a scalar value to all lanes.

unsafe fn mask_to_bitmask(mask: <Avx512 as SimdKernel<F16>>::Mask) -> u64

Convert the native mask back to a raw u64 bitmask.

unsafe fn mask_to_vector( mask: <Avx512 as SimdKernel<F16>>::Mask, ) -> <Avx512 as SimdKernel<F16>>::Vector

Convert the native mask back to a vector register where active lanes are set to T::ALL_ONES and inactive lanes to T::ZERO.

unsafe fn vector_to_mask( v: <Avx512 as SimdKernel<F16>>::Vector, ) -> <Avx512 as SimdKernel<F16>>::Mask

Convert a comparison-result vector into the native mask, the inverse of SimdKernel::mask_to_vector.

const LANE_BOUND_CHECK: () = _

Compile-time guard that LANE_COUNT fits the fixed MAX_SIMD_LANES scalar-fallback stack buffers. Referencing this const in the buffer-using default methods forces the assertion to be evaluated for each concrete backend at monomorphization, turning a would-be silent stack-buffer overflow into a compile error.

const SUPPORTS_NT_STORE: bool = false

Whether this backend provides a non-temporal (cache-bypassing) store via store_streaming. Backends leaving this false keep the regular store default; callers gate the streaming path on this const so it is a compile-time branch, dead-code-eliminated where unsupported.

unsafe fn store_streaming(ptr: *mut T, val: Self::Vector)

Store a vector with a non-temporal (streaming) hint that bypasses the cache, avoiding the read-for-ownership traffic a normal write-allocate pays for write-only data larger than the last-level cache (measured 1.71× on out-of-LLC AVX2 f32 elementwise writes; see streaming_bench).

fn stream_write_barrier()

Fence ordering this backend’s non-temporal stores before subsequent reads. No-op by default (only meaningful where store_streaming is a weakly ordered non-temporal store).

unsafe fn mask_from_bitmask(bm: u64) -> Self::Mask

Convert a raw u64 bitmask to the architecture-native mask type.

unsafe fn scan_vector<Op, SMode>(v: Self::Vector, carry: T) -> (Self::Vector, T)

where Op: ScanOp<T>, SMode: ScanMode,

Perform an intra-vector prefix scan (inclusive or exclusive) of the vector, using the specified ScanOp strategy and starting carry value. Returns the scanned vector and the final carry value.

unsafe fn div(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise division: a / b.

unsafe fn bitand(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise AND: a & b.

unsafe fn bitor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise OR: a | b.

unsafe fn bitxor(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise bitwise XOR: a ^ b.

unsafe fn abs(a: Self::Vector) -> Self::Vector

Elementwise absolute value.

unsafe fn min(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise minimum of a and b.

unsafe fn max(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise maximum of a and b.

unsafe fn sqrt(a: Self::Vector) -> Self::Vector

Elementwise square root.

unsafe fn recip_sqrt(a: Self::Vector) -> Self::Vector

Elementwise reciprocal square root, 1/√x, to full T precision (~1 ulp).

unsafe fn cmp_eq(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise equal: a == b.

unsafe fn cmp_ne(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise not equal: a != b.

unsafe fn cmp_lt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than: a < b.

unsafe fn cmp_le(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise less than or equal: a <= b.

unsafe fn cmp_gt(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than: a > b.

unsafe fn cmp_ge(a: Self::Vector, b: Self::Vector) -> Self::Vector

Elementwise greater than or equal: a >= b.

unsafe fn blend( mask: Self::Vector, true_val: Self::Vector, false_val: Self::Vector, ) -> Self::Vector

Elementwise blend: select lanes from true_val where the sign bit of mask is set, and from false_val otherwise.

unsafe fn neg(a: Self::Vector) -> Self::Vector

Elementwise negate: -a.

unsafe fn bitnot(a: Self::Vector) -> Self::Vector

Elementwise bitwise NOT: !a.

unsafe fn min_reduce(v: Self::Vector) -> T

Horizontal minimum across all lanes.

unsafe fn max_reduce(v: Self::Vector) -> T

Horizontal maximum across all lanes.

unsafe fn popcount(a: Self::Vector) -> Self::Vector

Elementwise population count (number of set bits).

unsafe fn horizontal_bitwise_and(v: Self::Vector) -> T

Horizontal bitwise AND across all lanes.

unsafe fn horizontal_bitwise_or(v: Self::Vector) -> T

Horizontal bitwise OR across all lanes.

unsafe fn horizontal_bitwise_xor(v: Self::Vector) -> T

Horizontal bitwise XOR across all lanes.

unsafe fn swap_adjacent(v: Self::Vector) -> Self::Vector

Swap each adjacent lane pair: [a0, a1, a2, a3, ...] -> [a1, a0, a3, a2, ...].

unsafe fn dup_even(v: Self::Vector) -> Self::Vector

Duplicate even lanes into odd lanes: [a0, a1, a2, a3, ...] -> [a0, a0, a2, a2, ...].

unsafe fn dup_odd(v: Self::Vector) -> Self::Vector

Duplicate odd lanes into even lanes: [a0, a1, a2, a3, ...] -> [a1, a1, a3, a3, ...].

unsafe fn fmaddsub( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b - c, odd lanes a*b + c.

unsafe fn fmsubadd( a: Self::Vector, b: Self::Vector, c: Self::Vector, ) -> Self::Vector

Alternating fused multiply: even lanes a*b + c, odd lanes a*b - c.

impl Sub for F16

type Output = F16

The resulting type after applying the - operator.

fn sub(self, rhs: F16) -> F16

Performs the - operation.

impl SubAssign for F16

fn sub_assign(&mut self, rhs: F16)

Performs the -= operation.

impl UnitScalar for F16

fn scale_by_f64(self, factor: f64) -> F16

Scale this value by a real coefficient in the scalar’s native precision.

impl Zeroable for F16

fn zeroed() -> Self

Returns a value of Self with every byte set to zero.

impl Zeroable for F16

fn zeroed() -> Self

Calls zeroed.