Struct gd32vf103_pac::usbfs_host::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 39 fields
pub hctl: HCTL,
pub hft: HFT,
pub hfinfr: HFINFR,
pub hptfqstat: HPTFQSTAT,
pub hachint: HACHINT,
pub hachinten: HACHINTEN,
pub hpcs: HPCS,
pub hch0ctl: HCH0CTL,
pub hch0intf: HCH0INTF,
pub hch0inten: HCH0INTEN,
pub hch0len: HCH0LEN,
pub hch1ctl: HCH1CTL,
pub hch1intf: HCH1INTF,
pub hch1inten: HCH1INTEN,
pub hch1len: HCH1LEN,
pub hch2ctl: HCH2CTL,
pub hch2intf: HCH2INTF,
pub hch2inten: HCH2INTEN,
pub hch2len: HCH2LEN,
pub hch3ctl: HCH3CTL,
pub hch3intf: HCH3INTF,
pub hch3inten: HCH3INTEN,
pub hch3len: HCH3LEN,
pub hch4ctl: HCH4CTL,
pub hch4intf: HCH4INTF,
pub hch4inten: HCH4INTEN,
pub hch4len: HCH4LEN,
pub hch5ctl: HCH5CTL,
pub hch5intf: HCH5INTF,
pub hch5inten: HCH5INTEN,
pub hch5len: HCH5LEN,
pub hch6ctl: HCH6CTL,
pub hch6intf: HCH6INTF,
pub hch6inten: HCH6INTEN,
pub hch6len: HCH6LEN,
pub hch7ctl: HCH7CTL,
pub hch7intf: HCH7INTF,
pub hch7inten: HCH7INTEN,
pub hch7len: HCH7LEN,
/* private fields */
}
Expand description
Register block
Fields§
§hctl: HCTL
0x00 - host configuration register (HCTL)
hft: HFT
0x04 - Host frame interval register
hfinfr: HFINFR
0x08 - FS host frame number/frame time remaining register (HFINFR)
hptfqstat: HPTFQSTAT
0x10 - Host periodic transmit FIFO/queue status register (HPTFQSTAT)
hachint: HACHINT
0x14 - Host all channels interrupt register
hachinten: HACHINTEN
0x18 - host all channels interrupt mask register
hpcs: HPCS
0x40 - Host port control and status register (USBFS_HPCS)
hch0ctl: HCH0CTL
0x100 - host channel-0 characteristics register (HCH0CTL)
hch0intf: HCH0INTF
0x108 - host channel-0 interrupt register (USBFS_HCHxINTF)
hch0inten: HCH0INTEN
0x10c - host channel-0 interrupt enable register (HCH0INTEN)
hch0len: HCH0LEN
0x110 - host channel-0 transfer length register
hch1ctl: HCH1CTL
0x120 - host channel-1 characteristics register (HCH1CTL)
hch1intf: HCH1INTF
0x128 - host channel-1 interrupt register (HCH1INTF)
hch1inten: HCH1INTEN
0x12c - host channel-1 interrupt enable register (HCH1INTEN)
hch1len: HCH1LEN
0x130 - host channel-1 transfer length register
hch2ctl: HCH2CTL
0x140 - host channel-2 characteristics register (HCH2CTL)
hch2intf: HCH2INTF
0x148 - host channel-2 interrupt register (HCH2INTF)
hch2inten: HCH2INTEN
0x14c - host channel-2 interrupt enable register (HCH2INTEN)
hch2len: HCH2LEN
0x150 - host channel-2 transfer length register
hch3ctl: HCH3CTL
0x160 - host channel-3 characteristics register (HCH3CTL)
hch3intf: HCH3INTF
0x168 - host channel-3 interrupt register (HCH3INTF)
hch3inten: HCH3INTEN
0x16c - host channel-3 interrupt enable register (HCH3INTEN)
hch3len: HCH3LEN
0x170 - host channel-3 transfer length register
hch4ctl: HCH4CTL
0x180 - host channel-4 characteristics register (HCH4CTL)
hch4intf: HCH4INTF
0x188 - host channel-4 interrupt register (HCH4INTF)
hch4inten: HCH4INTEN
0x18c - host channel-4 interrupt enable register (HCH4INTEN)
hch4len: HCH4LEN
0x190 - host channel-4 transfer length register
hch5ctl: HCH5CTL
0x1a0 - host channel-5 characteristics register (HCH5CTL)
hch5intf: HCH5INTF
0x1a8 - host channel-5 interrupt register (HCH5INTF)
hch5inten: HCH5INTEN
0x1ac - host channel-5 interrupt enable register (HCH5INTEN)
hch5len: HCH5LEN
0x1b0 - host channel-5 transfer length register
hch6ctl: HCH6CTL
0x1c0 - host channel-6 characteristics register (HCH6CTL)
hch6intf: HCH6INTF
0x1c8 - host channel-6 interrupt register (HCH6INTF)
hch6inten: HCH6INTEN
0x1cc - host channel-6 interrupt enable register (HCH6INTEN)
hch6len: HCH6LEN
0x1d0 - host channel-6 transfer length register
hch7ctl: HCH7CTL
0x1e0 - host channel-7 characteristics register (HCH7CTL)
hch7intf: HCH7INTF
0x1e8 - host channel-7 interrupt register (HCH7INTF)
hch7inten: HCH7INTEN
0x1ec - host channel-7 interrupt enable register (HCH7INTEN)
hch7len: HCH7LEN
0x1f0 - host channel-7 transfer length register