[−][src]Struct gd32vf103_pac::generic::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Implementations

`impl<U, T> R<U, T> where U: Copy,` [src]

`pub fn bits(&self) -> U`[src]

Read raw bits from register/field

`impl<FI> R<bool, FI>`[src]

`pub fn bit(&self) -> bool`[src]

Value of the field as raw bits

`pub fn bit_is_clear(&self) -> bool`[src]

Returns true if the bit is clear (0)

`pub fn bit_is_set(&self) -> bool`[src]

Returns true if the bit is set (1)

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn strc(&self) -> STRC_R`[src]

Bit 4 - Start flag of regular channel group

`pub fn stic(&self) -> STIC_R`[src]

Bit 3 - Start flag of inserted channel group

`pub fn eoic(&self) -> EOIC_R`[src]

Bit 2 - End of inserted group conversion flag

`pub fn eoc(&self) -> EOC_R`[src]

Bit 1 - End of group conversion flag

`pub fn wde(&self) -> WDE_R`[src]

Bit 0 - Analog watchdog event flag

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn rwden(&self) -> RWDEN_R`[src]

Bit 23 - Regular channel analog watchdog enable

`pub fn iwden(&self) -> IWDEN_R`[src]

Bit 22 - Inserted channel analog watchdog enable

`pub fn syncm(&self) -> SYNCM_R`[src]

Bits 16:19 - sync mode selection

`pub fn disnum(&self) -> DISNUM_R`[src]

Bits 13:15 - Number of conversions in discontinuous mode

`pub fn disic(&self) -> DISIC_R`[src]

Bit 12 - Discontinuous mode on inserted channels

`pub fn disrc(&self) -> DISRC_R`[src]

Bit 11 - Discontinuous mode on regular channels

`pub fn ica(&self) -> ICA_R`[src]

Bit 10 - Inserted channel group convert automatically

`pub fn wdsc(&self) -> WDSC_R`[src]

Bit 9 - When in scan mode, analog watchdog is effective on a single channel

`pub fn sm(&self) -> SM_R`[src]

Bit 8 - Scan mode

`pub fn eoicie(&self) -> EOICIE_R`[src]

Bit 7 - Interrupt enable for EOIC

`pub fn wdeie(&self) -> WDEIE_R`[src]

Bit 6 - Interrupt enable for WDE

`pub fn eocie(&self) -> EOCIE_R`[src]

Bit 5 - Interrupt enable for EOC

`pub fn wdchsel(&self) -> WDCHSEL_R`[src]

Bits 0:4 - Analog watchdog channel select

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn tsvren(&self) -> TSVREN_R`[src]

Bit 23 - Channel 16 and 17 enable of ADC0

`pub fn swrcst(&self) -> SWRCST_R`[src]

Bit 22 - Start on regular channel

`pub fn swicst(&self) -> SWICST_R`[src]

Bit 21 - Start on inserted channel

`pub fn eterc(&self) -> ETERC_R`[src]

Bit 20 - External trigger enable for regular channel

`pub fn etsrc(&self) -> ETSRC_R`[src]

Bits 17:19 - External trigger select for regular channel

`pub fn eteic(&self) -> ETEIC_R`[src]

Bit 15 - External trigger select for inserted channel

`pub fn etsic(&self) -> ETSIC_R`[src]

Bits 12:14 - External trigger select for inserted channel

`pub fn dal(&self) -> DAL_R`[src]

Bit 11 - Data alignment

`pub fn dma(&self) -> DMA_R`[src]

Bit 8 - DMA request enable

`pub fn rstclb(&self) -> RSTCLB_R`[src]

Bit 3 - Reset calibration

`pub fn clb(&self) -> CLB_R`[src]

Bit 2 - ADC calibration

`pub fn ctn(&self) -> CTN_R`[src]

Bit 1 - Continuous mode

`pub fn adcon(&self) -> ADCON_R`[src]

Bit 0 - ADC on

`impl R<u32, Reg<u32, _SAMPT0>>`[src]

`pub fn spt10(&self) -> SPT10_R`[src]

Bits 0:2 - Channel 10 sample time selection

`pub fn spt11(&self) -> SPT11_R`[src]

Bits 3:5 - Channel 11 sample time selection

`pub fn spt12(&self) -> SPT12_R`[src]

Bits 6:8 - Channel 12 sample time selection

`pub fn spt13(&self) -> SPT13_R`[src]

Bits 9:11 - Channel 13 sample time selection

`pub fn spt14(&self) -> SPT14_R`[src]

Bits 12:14 - Channel 14 sample time selection

`pub fn spt15(&self) -> SPT15_R`[src]

Bits 15:17 - Channel 15 sample time selection

`pub fn spt16(&self) -> SPT16_R`[src]

Bits 18:20 - Channel 16 sample time selection

`pub fn spt17(&self) -> SPT17_R`[src]

Bits 21:23 - Channel 17 sample time selection

`impl R<u32, Reg<u32, _SAMPT1>>`[src]

`pub fn spt0(&self) -> SPT0_R`[src]

Bits 0:2 - Channel 0 sample time selection

`pub fn spt1(&self) -> SPT1_R`[src]

Bits 3:5 - Channel 1 sample time selection

`pub fn spt2(&self) -> SPT2_R`[src]

Bits 6:8 - Channel 2 sample time selection

`pub fn spt3(&self) -> SPT3_R`[src]

Bits 9:11 - Channel 3 sample time selection

`pub fn spt4(&self) -> SPT4_R`[src]

Bits 12:14 - Channel 4 sample time selection

`pub fn spt5(&self) -> SPT5_R`[src]

Bits 15:17 - Channel 5 sample time selection

`pub fn spt6(&self) -> SPT6_R`[src]

Bits 18:20 - Channel 6 sample time selection

`pub fn spt7(&self) -> SPT7_R`[src]

Bits 21:23 - Channel 7 sample time selection

`pub fn spt8(&self) -> SPT8_R`[src]

Bits 24:26 - Channel 8 sample time selection

`pub fn spt9(&self) -> SPT9_R`[src]

Bits 27:29 - Channel 9 sample time selection

`impl R<u32, Reg<u32, _IOFF0>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 0

`impl R<u32, Reg<u32, _IOFF1>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 1

`impl R<u32, Reg<u32, _IOFF2>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 2

`impl R<u32, Reg<u32, _IOFF3>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 3

`impl R<u32, Reg<u32, _WDHT>>`[src]

`pub fn wdht(&self) -> WDHT_R`[src]

Bits 0:11 - Analog watchdog higher threshold

`impl R<u32, Reg<u32, _WDLT>>`[src]

`pub fn wdlt(&self) -> WDLT_R`[src]

Bits 0:11 - Analog watchdog lower threshold

`impl R<u32, Reg<u32, _RSQ0>>`[src]

`pub fn rl(&self) -> RL_R`[src]

Bits 20:23 - Regular channel group length

`pub fn rsq15(&self) -> RSQ15_R`[src]

Bits 15:19 - 16th conversion in regular sequence

`pub fn rsq14(&self) -> RSQ14_R`[src]

Bits 10:14 - 15th conversion in regular sequence

`pub fn rsq13(&self) -> RSQ13_R`[src]

Bits 5:9 - 14th conversion in regular sequence

`pub fn rsq12(&self) -> RSQ12_R`[src]

Bits 0:4 - 13th conversion in regular sequence

`impl R<u32, Reg<u32, _RSQ1>>`[src]

`pub fn rsq11(&self) -> RSQ11_R`[src]

Bits 25:29 - 12th conversion in regular sequence

`pub fn rsq10(&self) -> RSQ10_R`[src]

Bits 20:24 - 11th conversion in regular sequence

`pub fn rsq9(&self) -> RSQ9_R`[src]

Bits 15:19 - 10th conversion in regular sequence

`pub fn rsq8(&self) -> RSQ8_R`[src]

Bits 10:14 - 9th conversion in regular sequence

`pub fn rsq7(&self) -> RSQ7_R`[src]

Bits 5:9 - 8th conversion in regular sequence

`pub fn rsq6(&self) -> RSQ6_R`[src]

Bits 0:4 - 7th conversion in regular sequence

`impl R<u32, Reg<u32, _RSQ2>>`[src]

`pub fn rsq5(&self) -> RSQ5_R`[src]

Bits 25:29 - 6th conversion in regular sequence

`pub fn rsq4(&self) -> RSQ4_R`[src]

Bits 20:24 - 5th conversion in regular sequence

`pub fn rsq3(&self) -> RSQ3_R`[src]

Bits 15:19 - 4th conversion in regular sequence

`pub fn rsq2(&self) -> RSQ2_R`[src]

Bits 10:14 - 3rd conversion in regular sequence

`pub fn rsq1(&self) -> RSQ1_R`[src]

Bits 5:9 - 2nd conversion in regular sequence

`pub fn rsq0(&self) -> RSQ0_R`[src]

Bits 0:4 - 1st conversion in regular sequence

`impl R<u32, Reg<u32, _ISQ>>`[src]

`pub fn il(&self) -> IL_R`[src]

Bits 20:21 - Inserted channel group length

`pub fn isq3(&self) -> ISQ3_R`[src]

Bits 15:19 - 4th conversion in inserted sequence

`pub fn isq2(&self) -> ISQ2_R`[src]

Bits 10:14 - 3rd conversion in inserted sequence

`pub fn isq1(&self) -> ISQ1_R`[src]

Bits 5:9 - 2nd conversion in inserted sequence

`pub fn isq0(&self) -> ISQ0_R`[src]

Bits 0:4 - 1st conversion in inserted sequence

`impl R<u32, Reg<u32, _IDATA0>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA1>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA2>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA3>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _RDATA>>`[src]

`pub fn adc1rdtr(&self) -> ADC1RDTR_R`[src]

Bits 16:31 - ADC regular channel data

`pub fn rdata(&self) -> RDATA_R`[src]

Bits 0:15 - Regular channel data

`impl R<u32, Reg<u32, _OVSAMPCTL>>`[src]

`pub fn dres(&self) -> DRES_R`[src]

Bits 12:13 - ADC resolution

`pub fn tovs(&self) -> TOVS_R`[src]

Bit 9 - Triggered Oversampling

`pub fn ovss(&self) -> OVSS_R`[src]

Bits 5:8 - Oversampling shift

`pub fn ovsr(&self) -> OVSR_R`[src]

Bits 2:4 - Oversampling ratio

`pub fn ovsen(&self) -> OVSEN_R`[src]

Bit 0 - Oversampler Enable

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn strc(&self) -> STRC_R`[src]

Bit 4 - Start flag of regular channel group

`pub fn stic(&self) -> STIC_R`[src]

Bit 3 - Start flag of inserted channel group

`pub fn eoic(&self) -> EOIC_R`[src]

Bit 2 - End of inserted group conversion flag

`pub fn eoc(&self) -> EOC_R`[src]

Bit 1 - End of group conversion flag

`pub fn wde(&self) -> WDE_R`[src]

Bit 0 - Analog watchdog event flag

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn rwden(&self) -> RWDEN_R`[src]

Bit 23 - Regular channel analog watchdog enable

`pub fn iwden(&self) -> IWDEN_R`[src]

Bit 22 - Inserted channel analog watchdog enable

`pub fn disnum(&self) -> DISNUM_R`[src]

Bits 13:15 - Number of conversions in discontinuous mode

`pub fn disic(&self) -> DISIC_R`[src]

Bit 12 - Discontinuous mode on inserted channels

`pub fn disrc(&self) -> DISRC_R`[src]

Bit 11 - Discontinuous mode on regular channels

`pub fn ica(&self) -> ICA_R`[src]

Bit 10 - Inserted channel group convert automatically

`pub fn wdsc(&self) -> WDSC_R`[src]

Bit 9 - When in scan mode, analog watchdog is effective on a single channel

`pub fn sm(&self) -> SM_R`[src]

Bit 8 - Scan mode

`pub fn eoicie(&self) -> EOICIE_R`[src]

Bit 7 - Interrupt enable for EOIC

`pub fn wdeie(&self) -> WDEIE_R`[src]

Bit 6 - Interrupt enable for WDE

`pub fn eocie(&self) -> EOCIE_R`[src]

Bit 5 - Interrupt enable for EOC

`pub fn wdchsel(&self) -> WDCHSEL_R`[src]

Bits 0:4 - Analog watchdog channel select

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn swrcst(&self) -> SWRCST_R`[src]

Bit 22 - Start on regular channel

`pub fn swicst(&self) -> SWICST_R`[src]

Bit 21 - Start on inserted channel

`pub fn eterc(&self) -> ETERC_R`[src]

Bit 20 - External trigger enable for regular channel

`pub fn etsrc(&self) -> ETSRC_R`[src]

Bits 17:19 - External trigger select for regular channel

`pub fn eteic(&self) -> ETEIC_R`[src]

Bit 15 - External trigger enable for inserted channel

`pub fn etsic(&self) -> ETSIC_R`[src]

Bits 12:14 - External trigger select for inserted channel

`pub fn dal(&self) -> DAL_R`[src]

Bit 11 - Data alignment

`pub fn dma(&self) -> DMA_R`[src]

Bit 8 - DMA request enable

`pub fn rstclb(&self) -> RSTCLB_R`[src]

Bit 3 - Reset calibration

`pub fn clb(&self) -> CLB_R`[src]

Bit 2 - ADC calibration

`pub fn ctn(&self) -> CTN_R`[src]

Bit 1 - Continuous mode

`pub fn adcon(&self) -> ADCON_R`[src]

Bit 0 - ADC on

`impl R<u32, Reg<u32, _SAMPT0>>`[src]

`pub fn spt10(&self) -> SPT10_R`[src]

Bits 0:2 - Channel 10 sample time selection

`pub fn spt11(&self) -> SPT11_R`[src]

Bits 3:5 - Channel 11 sample time selection

`pub fn spt12(&self) -> SPT12_R`[src]

Bits 6:8 - Channel 12 sample time selection

`pub fn spt13(&self) -> SPT13_R`[src]

Bits 9:11 - Channel 13 sample time selection

`pub fn spt14(&self) -> SPT14_R`[src]

Bits 12:14 - Channel 14 sample time selection

`pub fn spt15(&self) -> SPT15_R`[src]

Bits 15:17 - Channel 15 sample time selection

`pub fn spt16(&self) -> SPT16_R`[src]

Bits 18:20 - Channel 16 sample time selection

`pub fn spt17(&self) -> SPT17_R`[src]

Bits 21:23 - Channel 17 sample time selection

`impl R<u32, Reg<u32, _SAMPT1>>`[src]

`pub fn spt0(&self) -> SPT0_R`[src]

Bits 0:2 - Channel 0 sample time selection

`pub fn spt1(&self) -> SPT1_R`[src]

Bits 3:5 - Channel 1 sample time selection

`pub fn spt2(&self) -> SPT2_R`[src]

Bits 6:8 - Channel 2 sample time selection

`pub fn spt3(&self) -> SPT3_R`[src]

Bits 9:11 - Channel 3 sample time selection

`pub fn spt4(&self) -> SPT4_R`[src]

Bits 12:14 - Channel 4 sample time selection

`pub fn spt5(&self) -> SPT5_R`[src]

Bits 15:17 - Channel 5 sample time selection

`pub fn spt6(&self) -> SPT6_R`[src]

Bits 18:20 - Channel 6 sample time selection

`pub fn spt7(&self) -> SPT7_R`[src]

Bits 21:23 - Channel 7 sample time selection

`pub fn spt8(&self) -> SPT8_R`[src]

Bits 24:26 - Channel 8 sample time selection

`pub fn spt9(&self) -> SPT9_R`[src]

Bits 27:29 - Channel 9 sample time selection

`impl R<u32, Reg<u32, _IOFF0>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 0

`impl R<u32, Reg<u32, _IOFF1>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 1

`impl R<u32, Reg<u32, _IOFF2>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 2

`impl R<u32, Reg<u32, _IOFF3>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

Bits 0:11 - Data offset for inserted channel 3

`impl R<u32, Reg<u32, _WDHT>>`[src]

`pub fn wdht(&self) -> WDHT_R`[src]

Bits 0:11 - Analog watchdog higher threshold

`impl R<u32, Reg<u32, _WDLT>>`[src]

`pub fn wdlt(&self) -> WDLT_R`[src]

Bits 0:11 - Analog watchdog lower threshold

`impl R<u32, Reg<u32, _RSQ0>>`[src]

`pub fn rl(&self) -> RL_R`[src]

Bits 20:23 - Regular channel group length

`pub fn rsq15(&self) -> RSQ15_R`[src]

Bits 15:19 - 16th conversion in regular sequence

`pub fn rsq14(&self) -> RSQ14_R`[src]

Bits 10:14 - 15th conversion in regular sequence

`pub fn rsq13(&self) -> RSQ13_R`[src]

Bits 5:9 - 14th conversion in regular sequence

`pub fn rsq12(&self) -> RSQ12_R`[src]

Bits 0:4 - 13th conversion in regular sequence

`impl R<u32, Reg<u32, _RSQ1>>`[src]

`pub fn rsq11(&self) -> RSQ11_R`[src]

Bits 25:29 - 12th conversion in regular sequence

`pub fn rsq10(&self) -> RSQ10_R`[src]

Bits 20:24 - 11th conversion in regular sequence

`pub fn rsq9(&self) -> RSQ9_R`[src]

Bits 15:19 - 10th conversion in regular sequence

`pub fn rsq8(&self) -> RSQ8_R`[src]

Bits 10:14 - 9th conversion in regular sequence

`pub fn rsq7(&self) -> RSQ7_R`[src]

Bits 5:9 - 8th conversion in regular sequence

`pub fn rsq6(&self) -> RSQ6_R`[src]

Bits 0:4 - 7th conversion in regular sequence

`impl R<u32, Reg<u32, _RSQ2>>`[src]

`pub fn rsq5(&self) -> RSQ5_R`[src]

Bits 25:29 - 6th conversion in regular sequence

`pub fn rsq4(&self) -> RSQ4_R`[src]

Bits 20:24 - 5th conversion in regular sequence

`pub fn rsq3(&self) -> RSQ3_R`[src]

Bits 15:19 - 4th conversion in regular sequence

`pub fn rsq2(&self) -> RSQ2_R`[src]

Bits 10:14 - 3rd conversion in regular sequence

`pub fn rsq1(&self) -> RSQ1_R`[src]

Bits 5:9 - 2nd conversion in regular sequence

`pub fn rsq0(&self) -> RSQ0_R`[src]

Bits 0:4 - 1st conversion in regular sequence

`impl R<u32, Reg<u32, _ISQ>>`[src]

`pub fn il(&self) -> IL_R`[src]

Bits 20:21 - Inserted channel group length

`pub fn isq3(&self) -> ISQ3_R`[src]

Bits 15:19 - 4th conversion in inserted sequence

`pub fn isq2(&self) -> ISQ2_R`[src]

Bits 10:14 - 3rd conversion in inserted sequence

`pub fn isq1(&self) -> ISQ1_R`[src]

Bits 5:9 - 2nd conversion in inserted sequence

`pub fn isq0(&self) -> ISQ0_R`[src]

Bits 0:4 - 1st conversion in inserted sequence

`impl R<u32, Reg<u32, _IDATA0>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA1>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA2>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _IDATA3>>`[src]

`pub fn idatan(&self) -> IDATAN_R`[src]

Bits 0:15 - Inserted number n conversion data

`impl R<u32, Reg<u32, _RDATA>>`[src]

`pub fn rdata(&self) -> RDATA_R`[src]

Bits 0:15 - Regular channel data

`impl R<u32, Reg<u32, _EC>>`[src]

`pub fn eoe(&self) -> EOE_R`[src]

Bit 7 - Event output enable

`pub fn port(&self) -> PORT_R`[src]

Bits 4:6 - Event output port selection

`pub fn pin(&self) -> PIN_R`[src]

Bits 0:3 - Event output pin selection

`impl R<u32, Reg<u32, _PCF0>>`[src]

`pub fn timer1iti1_remap(&self) -> TIMER1ITI1_REMAP_R`[src]

Bit 29 - TIMER1 internal trigger 1 remapping

`pub fn spi2_remap(&self) -> SPI2_REMAP_R`[src]

Bit 28 - SPI2/I2S2 remapping

`pub fn swj_cfg(&self) -> SWJ_CFG_R`[src]

Bits 24:26 - Serial wire JTAG configuration

`pub fn can1_remap(&self) -> CAN1_REMAP_R`[src]

Bit 22 - CAN1 I/O remapping

`pub fn timer4ch3_iremap(&self) -> TIMER4CH3_IREMAP_R`[src]

Bit 16 - TIMER4 channel3 internal remapping

`pub fn pd01_remap(&self) -> PD01_REMAP_R`[src]

Bit 15 - Port D0/Port D1 mapping on OSC_IN/OSC_OUT

`pub fn can0_remap(&self) -> CAN0_REMAP_R`[src]

Bits 13:14 - CAN0 alternate interface remapping

`pub fn timer3_remap(&self) -> TIMER3_REMAP_R`[src]

Bit 12 - TIMER3 remapping

`pub fn timer2_remap(&self) -> TIMER2_REMAP_R`[src]

Bits 10:11 - TIMER2 remapping

`pub fn timer1_remap(&self) -> TIMER1_REMAP_R`[src]

Bits 8:9 - TIMER1 remapping

`pub fn timer0_remap(&self) -> TIMER0_REMAP_R`[src]

Bits 6:7 - TIMER0 remapping

`pub fn usart2_remap(&self) -> USART2_REMAP_R`[src]

Bits 4:5 - USART2 remapping

`pub fn usart1_remap(&self) -> USART1_REMAP_R`[src]

Bit 3 - USART1 remapping

`pub fn usart0_remap(&self) -> USART0_REMAP_R`[src]

Bit 2 - USART0 remapping

`pub fn i2c0_remap(&self) -> I2C0_REMAP_R`[src]

Bit 1 - I2C0 remapping

`pub fn spi0_remap(&self) -> SPI0_REMAP_R`[src]

Bit 0 - SPI0 remapping

`impl R<u32, Reg<u32, _EXTISS0>>`[src]

`pub fn exti3_ss(&self) -> EXTI3_SS_R`[src]

Bits 12:15 - EXTI 3 sources selection

`pub fn exti2_ss(&self) -> EXTI2_SS_R`[src]

Bits 8:11 - EXTI 2 sources selection

`pub fn exti1_ss(&self) -> EXTI1_SS_R`[src]

Bits 4:7 - EXTI 1 sources selection

`pub fn exti0_ss(&self) -> EXTI0_SS_R`[src]

Bits 0:3 - EXTI 0 sources selection

`impl R<u32, Reg<u32, _EXTISS1>>`[src]

`pub fn exti7_ss(&self) -> EXTI7_SS_R`[src]

Bits 12:15 - EXTI 7 sources selection

`pub fn exti6_ss(&self) -> EXTI6_SS_R`[src]

Bits 8:11 - EXTI 6 sources selection

`pub fn exti5_ss(&self) -> EXTI5_SS_R`[src]

Bits 4:7 - EXTI 5 sources selection

`pub fn exti4_ss(&self) -> EXTI4_SS_R`[src]

Bits 0:3 - EXTI 4 sources selection

`impl R<u32, Reg<u32, _EXTISS2>>`[src]

`pub fn exti11_ss(&self) -> EXTI11_SS_R`[src]

Bits 12:15 - EXTI 11 sources selection

`pub fn exti10_ss(&self) -> EXTI10_SS_R`[src]

Bits 8:11 - EXTI 10 sources selection

`pub fn exti9_ss(&self) -> EXTI9_SS_R`[src]

Bits 4:7 - EXTI 9 sources selection

`pub fn exti8_ss(&self) -> EXTI8_SS_R`[src]

Bits 0:3 - EXTI 8 sources selection

`impl R<u32, Reg<u32, _EXTISS3>>`[src]

`pub fn exti15_ss(&self) -> EXTI15_SS_R`[src]

Bits 12:15 - EXTI 15 sources selection

`pub fn exti14_ss(&self) -> EXTI14_SS_R`[src]

Bits 8:11 - EXTI 14 sources selection

`pub fn exti13_ss(&self) -> EXTI13_SS_R`[src]

Bits 4:7 - EXTI 13 sources selection

`pub fn exti12_ss(&self) -> EXTI12_SS_R`[src]

Bits 0:3 - EXTI 12 sources selection

`impl R<u32, Reg<u32, _PCF1>>`[src]

`pub fn exmc_nadv(&self) -> EXMC_NADV_R`[src]

Bit 10 - EXMC_NADV connect/disconnect

`impl R<u16, Reg<u16, _DATA0>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA1>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA2>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA3>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA4>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA5>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA6>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA7>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA8>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA9>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA10>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA11>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA12>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA13>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA14>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA15>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA16>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA17>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA18>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA19>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA20>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA21>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA22>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA23>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA24>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA25>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA26>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA27>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA28>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA29>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA30>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA31>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA32>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA33>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA34>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA35>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA36>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA37>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA38>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA39>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA40>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _DATA41>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:15 - Backup data

`impl R<u16, Reg<u16, _OCTL>>`[src]

`pub fn rosel(&self) -> ROSEL_R`[src]

Bit 9 - RTC output selection

`pub fn asoen(&self) -> ASOEN_R`[src]

Bit 8 - RTC alarm or second signal output enable

`pub fn coen(&self) -> COEN_R`[src]

Bit 7 - RTC clock calibration output enable

`pub fn rccv(&self) -> RCCV_R`[src]

Bits 0:6 - RTC clock calibration value

`impl R<u16, Reg<u16, _TPCTL>>`[src]

`pub fn tpal(&self) -> TPAL_R`[src]

Bit 1 - TAMPER pin active level

`pub fn tpen(&self) -> TPEN_R`[src]

Bit 0 - TAMPER detection enable

`impl R<u16, Reg<u16, _TPCS>>`[src]

`pub fn tif(&self) -> TIF_R`[src]

Bit 9 - Tamper interrupt flag

`pub fn tef(&self) -> TEF_R`[src]

Bit 8 - Tamper event flag

`pub fn tpie(&self) -> TPIE_R`[src]

Bit 2 - Tamper interrupt enable

`pub fn tir(&self) -> TIR_R`[src]

Bit 1 - Tamper interrupt reset

`pub fn ter(&self) -> TER_R`[src]

Bit 0 - Tamper event reset

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn dfz(&self) -> DFZ_R`[src]

Bit 16 - Debug freeze

`pub fn swrst(&self) -> SWRST_R`[src]

Bit 15 - Software reset

`pub fn ttc(&self) -> TTC_R`[src]

Bit 7 - Time-triggered communication

`pub fn abor(&self) -> ABOR_R`[src]

Bit 6 - Automatic bus-off recovery

`pub fn awu(&self) -> AWU_R`[src]

Bit 5 - Automatic wakeup

`pub fn ard(&self) -> ARD_R`[src]

Bit 4 - Automatic retransmission disable

`pub fn rfod(&self) -> RFOD_R`[src]

Bit 3 - Receive FIFO overwrite disable

`pub fn tfo(&self) -> TFO_R`[src]

Bit 2 - Transmit FIFO order

`pub fn slpwmod(&self) -> SLPWMOD_R`[src]

Bit 1 - Sleep working mode

`pub fn iwmod(&self) -> IWMOD_R`[src]

Bit 0 - Initial working mode

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn rxl(&self) -> RXL_R`[src]

Bit 11 - RX level

`pub fn lastrx(&self) -> LASTRX_R`[src]

Bit 10 - Last sample value of RX pin

`pub fn rs(&self) -> RS_R`[src]

Bit 9 - Receiving state

`pub fn ts(&self) -> TS_R`[src]

Bit 8 - Transmitting state

`pub fn slpif(&self) -> SLPIF_R`[src]

Bit 4 - Status change interrupt flag of sleep working mode entering

`pub fn wuif(&self) -> WUIF_R`[src]

Bit 3 - Status change interrupt flag of wakeup from sleep working mode

`pub fn errif(&self) -> ERRIF_R`[src]

Bit 2 - Error interrupt flag

`pub fn slpws(&self) -> SLPWS_R`[src]

Bit 1 - Sleep working state

`pub fn iws(&self) -> IWS_R`[src]

Bit 0 - Initial working state

`impl R<u32, Reg<u32, _TSTAT>>`[src]

`pub fn tmls2(&self) -> TMLS2_R`[src]

Bit 31 - Transmit mailbox 2 last sending in transmit FIFO

`pub fn tmls1(&self) -> TMLS1_R`[src]

Bit 30 - Transmit mailbox 1 last sending in transmit FIFO

`pub fn tmls0(&self) -> TMLS0_R`[src]

Bit 29 - Transmit mailbox 0 last sending in transmit FIFO

`pub fn tme2(&self) -> TME2_R`[src]

Bit 28 - Transmit mailbox 2 empty

`pub fn tme1(&self) -> TME1_R`[src]

Bit 27 - Transmit mailbox 1 empty

`pub fn tme0(&self) -> TME0_R`[src]

Bit 26 - Transmit mailbox 0 empty

`pub fn num(&self) -> NUM_R`[src]

Bits 24:25 - number of the transmit FIFO mailbox in which the frame will be transmitted if at least one mailbox is empty

`pub fn mst2(&self) -> MST2_R`[src]

Bit 23 - Mailbox 2 stop transmitting

`pub fn mte2(&self) -> MTE2_R`[src]

Bit 19 - Mailbox 2 transmit error

`pub fn mal2(&self) -> MAL2_R`[src]

Bit 18 - Mailbox 2 arbitration lost

`pub fn mtfnerr2(&self) -> MTFNERR2_R`[src]

Bit 17 - Mailbox 2 transmit finished and no error

`pub fn mtf2(&self) -> MTF2_R`[src]

Bit 16 - Mailbox 2 transmit finished

`pub fn mst1(&self) -> MST1_R`[src]

Bit 15 - Mailbox 1 stop transmitting

`pub fn mte1(&self) -> MTE1_R`[src]

Bit 11 - Mailbox 1 transmit error

`pub fn mal1(&self) -> MAL1_R`[src]

Bit 10 - Mailbox 1 arbitration lost

`pub fn mtfnerr1(&self) -> MTFNERR1_R`[src]

Bit 9 - Mailbox 1 transmit finished and no error

`pub fn mtf1(&self) -> MTF1_R`[src]

Bit 8 - Mailbox 1 transmit finished

`pub fn mst0(&self) -> MST0_R`[src]

Bit 7 - Mailbox 0 stop transmitting

`pub fn mte0(&self) -> MTE0_R`[src]

Bit 3 - Mailbox 0 transmit error

`pub fn mal0(&self) -> MAL0_R`[src]

Bit 2 - Mailbox 0 arbitration lost

`pub fn mtfnerr0(&self) -> MTFNERR0_R`[src]

Bit 1 - Mailbox 0 transmit finished and no error

`pub fn mtf0(&self) -> MTF0_R`[src]

Bit 0 - Mailbox 0 transmit finished

`impl R<u32, Reg<u32, _RFIFO0>>`[src]

`pub fn rfd0(&self) -> RFD0_R`[src]

Bit 5 - Receive FIFO0 dequeue

`pub fn rfo0(&self) -> RFO0_R`[src]

Bit 4 - Receive FIFO0 overfull

`pub fn rff0(&self) -> RFF0_R`[src]

Bit 3 - Receive FIFO0 full

`pub fn rfl0(&self) -> RFL0_R`[src]

Bits 0:1 - Receive FIFO0 length

`impl R<u32, Reg<u32, _RFIFO1>>`[src]

`pub fn rfd1(&self) -> RFD1_R`[src]

Bit 5 - Receive FIFO1 dequeue

`pub fn rfo1(&self) -> RFO1_R`[src]

Bit 4 - Receive FIFO1 overfull

`pub fn rff1(&self) -> RFF1_R`[src]

Bit 3 - Receive FIFO1 full

`pub fn rfl1(&self) -> RFL1_R`[src]

Bits 0:1 - Receive FIFO1 length

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn slpwie(&self) -> SLPWIE_R`[src]

Bit 17 - Sleep working interrupt enable

`pub fn wie(&self) -> WIE_R`[src]

Bit 16 - Wakeup interrupt enable

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 15 - Error interrupt enable

`pub fn errnie(&self) -> ERRNIE_R`[src]

Bit 11 - Error number interrupt enable

`pub fn boie(&self) -> BOIE_R`[src]

Bit 10 - Bus-off interrupt enable

`pub fn perrie(&self) -> PERRIE_R`[src]

Bit 9 - Passive error interrupt enable

`pub fn werrie(&self) -> WERRIE_R`[src]

Bit 8 - Warning error interrupt enable

`pub fn rfoie1(&self) -> RFOIE1_R`[src]

Bit 6 - Receive FIFO1 overfull interrupt enable

`pub fn rffie1(&self) -> RFFIE1_R`[src]

Bit 5 - Receive FIFO1 full interrupt enable

`pub fn rfneie1(&self) -> RFNEIE1_R`[src]

Bit 4 - Receive FIFO1 not empty interrupt enable

`pub fn rfoie0(&self) -> RFOIE0_R`[src]

Bit 3 - Receive FIFO0 overfull interrupt enable

`pub fn rffie0(&self) -> RFFIE0_R`[src]

Bit 2 - Receive FIFO0 full interrupt enable

`pub fn rfneie0(&self) -> RFNEIE0_R`[src]

Bit 1 - Receive FIFO0 not empty interrupt enable

`pub fn tmeie(&self) -> TMEIE_R`[src]

Bit 0 - Transmit mailbox empty interrupt enable

`impl R<u32, Reg<u32, _ERR>>`[src]

`pub fn recnt(&self) -> RECNT_R`[src]

Bits 24:31 - Receive Error Count defined by the CAN standard

`pub fn tecnt(&self) -> TECNT_R`[src]

Bits 16:23 - Transmit Error Count defined by the CAN standard

`pub fn errn(&self) -> ERRN_R`[src]

Bits 4:6 - Error number

`pub fn boerr(&self) -> BOERR_R`[src]

Bit 2 - Bus-off error

`pub fn perr(&self) -> PERR_R`[src]

Bit 1 - Passive error

`pub fn werr(&self) -> WERR_R`[src]

Bit 0 - Warning error

`impl R<u32, Reg<u32, _BT>>`[src]

`pub fn scmod(&self) -> SCMOD_R`[src]

Bit 31 - Silent communication mode

`pub fn lcmod(&self) -> LCMOD_R`[src]

Bit 30 - Loopback communication mode

`pub fn sjw(&self) -> SJW_R`[src]

Bits 24:25 - Resynchronization jump width

`pub fn bs2(&self) -> BS2_R`[src]

Bits 20:22 - Bit segment 2

`pub fn bs1(&self) -> BS1_R`[src]

Bits 16:19 - Bit segment 1

`pub fn baudpsc(&self) -> BAUDPSC_R`[src]

Bits 0:9 - Baud rate prescaler

`impl R<u32, Reg<u32, _TMI0>>`[src]

`pub fn sfid_efid(&self) -> SFID_EFID_R`[src]

Bits 21:31 - The frame identifier

`pub fn efid(&self) -> EFID_R`[src]

Bits 3:20 - The frame identifier

`pub fn ff(&self) -> FF_R`[src]

Bit 2 - Frame format

`pub fn ft(&self) -> FT_R`[src]

Bit 1 - Frame type

`pub fn ten(&self) -> TEN_R`[src]

Bit 0 - Transmit enable

`impl R<u32, Reg<u32, _TMP0>>`[src]

`pub fn ts(&self) -> TS_R`[src]

Bits 16:31 - Time stamp

`pub fn tsen(&self) -> TSEN_R`[src]

Bit 8 - Time stamp enable

`pub fn dlenc(&self) -> DLENC_R`[src]

Bits 0:3 - Data length code

`impl R<u32, Reg<u32, _TMDATA00>>`[src]

`pub fn db3(&self) -> DB3_R`[src]

Bits 24:31 - Data byte 3

`pub fn db2(&self) -> DB2_R`[src]

Bits 16:23 - Data byte 2

`pub fn db1(&self) -> DB1_R`[src]

Bits 8:15 - Data byte 1

`pub fn db0(&self) -> DB0_R`[src]

Bits 0:7 - Data byte 0

`impl R<u32, Reg<u32, _TMDATA10>>`[src]

`pub fn db7(&self) -> DB7_R`[src]

Bits 24:31 - Data byte 7

`pub fn db6(&self) -> DB6_R`[src]

Bits 16:23 - Data byte 6

`pub fn db5(&self) -> DB5_R`[src]

Bits 8:15 - Data byte 5

`pub fn db4(&self) -> DB4_R`[src]

Bits 0:7 - Data byte 4

`impl R<u32, Reg<u32, _TMI1>>`[src]

`pub fn sfid_efid(&self) -> SFID_EFID_R`[src]

Bits 21:31 - The frame identifier

`pub fn efid(&self) -> EFID_R`[src]

Bits 3:20 - The frame identifier

`pub fn ff(&self) -> FF_R`[src]

Bit 2 - Frame format

`pub fn ft(&self) -> FT_R`[src]

Bit 1 - Frame type

`pub fn ten(&self) -> TEN_R`[src]

Bit 0 - Transmit enable

`impl R<u32, Reg<u32, _TMP1>>`[src]

`pub fn ts(&self) -> TS_R`[src]

Bits 16:31 - Time stamp

`pub fn tsen(&self) -> TSEN_R`[src]

Bit 8 - Time stamp enable

`pub fn dlenc(&self) -> DLENC_R`[src]

Bits 0:3 - Data length code

`impl R<u32, Reg<u32, _TMDATA01>>`[src]

`pub fn db3(&self) -> DB3_R`[src]

Bits 24:31 - Data byte 3

`pub fn db2(&self) -> DB2_R`[src]

Bits 16:23 - Data byte 2

`pub fn db1(&self) -> DB1_R`[src]

Bits 8:15 - Data byte 1

`pub fn db0(&self) -> DB0_R`[src]

Bits 0:7 - Data byte 0

`impl R<u32, Reg<u32, _TMDATA11>>`[src]

`pub fn db7(&self) -> DB7_R`[src]

Bits 24:31 - Data byte 7

`pub fn db6(&self) -> DB6_R`[src]

Bits 16:23 - Data byte 6

`pub fn db5(&self) -> DB5_R`[src]

Bits 8:15 - Data byte 5

`pub fn db4(&self) -> DB4_R`[src]

Bits 0:7 - Data byte 4

`impl R<u32, Reg<u32, _TMI2>>`[src]

`pub fn sfid_efid(&self) -> SFID_EFID_R`[src]

Bits 21:31 - The frame identifier

`pub fn efid(&self) -> EFID_R`[src]

Bits 3:20 - The frame identifier

`pub fn ff(&self) -> FF_R`[src]

Bit 2 - Frame format

`pub fn ft(&self) -> FT_R`[src]

Bit 1 - Frame type

`pub fn ten(&self) -> TEN_R`[src]

Bit 0 - Transmit enable

`impl R<u32, Reg<u32, _TMP2>>`[src]

`pub fn ts(&self) -> TS_R`[src]

Bits 16:31 - Time stamp

`pub fn tsen(&self) -> TSEN_R`[src]

Bit 8 - Time stamp enable

`pub fn dlenc(&self) -> DLENC_R`[src]

Bits 0:3 - Data length code

`impl R<u32, Reg<u32, _TMDATA02>>`[src]

`pub fn db3(&self) -> DB3_R`[src]

Bits 24:31 - Data byte 3

`pub fn db2(&self) -> DB2_R`[src]

Bits 16:23 - Data byte 2

`pub fn db1(&self) -> DB1_R`[src]

Bits 8:15 - Data byte 1

`pub fn db0(&self) -> DB0_R`[src]

Bits 0:7 - Data byte 0

`impl R<u32, Reg<u32, _TMDATA12>>`[src]

`pub fn db7(&self) -> DB7_R`[src]

Bits 24:31 - Data byte 7

`pub fn db6(&self) -> DB6_R`[src]

Bits 16:23 - Data byte 6

`pub fn db5(&self) -> DB5_R`[src]

Bits 8:15 - Data byte 5

`pub fn db4(&self) -> DB4_R`[src]

Bits 0:7 - Data byte 4

`impl R<u32, Reg<u32, _RFIFOMI0>>`[src]

`pub fn sfid_efid(&self) -> SFID_EFID_R`[src]

Bits 21:31 - The frame identifier

`pub fn efid(&self) -> EFID_R`[src]

Bits 3:20 - The frame identifier

`pub fn ff(&self) -> FF_R`[src]

Bit 2 - Frame format

`pub fn ft(&self) -> FT_R`[src]

Bit 1 - Frame type

`impl R<u32, Reg<u32, _RFIFOMP0>>`[src]

`pub fn ts(&self) -> TS_R`[src]

Bits 16:31 - Time stamp

`pub fn fi(&self) -> FI_R`[src]

Bits 8:15 - Filtering index

`pub fn dlenc(&self) -> DLENC_R`[src]

Bits 0:3 - Data length code

`impl R<u32, Reg<u32, _RFIFOMDATA00>>`[src]

`pub fn db3(&self) -> DB3_R`[src]

Bits 24:31 - Data byte 3

`pub fn db2(&self) -> DB2_R`[src]

Bits 16:23 - Data byte 2

`pub fn db1(&self) -> DB1_R`[src]

Bits 8:15 - Data byte 1

`pub fn db0(&self) -> DB0_R`[src]

Bits 0:7 - Data byte 0

`impl R<u32, Reg<u32, _RFIFOMDATA10>>`[src]

`pub fn db7(&self) -> DB7_R`[src]

Bits 24:31 - Data byte 7

`pub fn db6(&self) -> DB6_R`[src]

Bits 16:23 - Data byte 6

`pub fn db5(&self) -> DB5_R`[src]

Bits 8:15 - Data byte 5

`pub fn db4(&self) -> DB4_R`[src]

Bits 0:7 - Data byte 4

`impl R<u32, Reg<u32, _RFIFOMI1>>`[src]

`pub fn sfid_efid(&self) -> SFID_EFID_R`[src]

Bits 21:31 - The frame identifier

`pub fn efid(&self) -> EFID_R`[src]

Bits 3:20 - The frame identifier

`pub fn ff(&self) -> FF_R`[src]

Bit 2 - Frame format

`pub fn ft(&self) -> FT_R`[src]

Bit 1 - Frame type

`impl R<u32, Reg<u32, _RFIFOMP1>>`[src]

`pub fn ts(&self) -> TS_R`[src]

Bits 16:31 - Time stamp

`pub fn fi(&self) -> FI_R`[src]

Bits 8:15 - Filtering index

`pub fn dlenc(&self) -> DLENC_R`[src]

Bits 0:3 - Data length code

`impl R<u32, Reg<u32, _RFIFOMDATA01>>`[src]

`pub fn db3(&self) -> DB3_R`[src]

Bits 24:31 - Data byte 3

`pub fn db2(&self) -> DB2_R`[src]

Bits 16:23 - Data byte 2

`pub fn db1(&self) -> DB1_R`[src]

Bits 8:15 - Data byte 1

`pub fn db0(&self) -> DB0_R`[src]

Bits 0:7 - Data byte 0

`impl R<u32, Reg<u32, _RFIFOMDATA11>>`[src]

`pub fn db7(&self) -> DB7_R`[src]

Bits 24:31 - Data byte 7

`pub fn db6(&self) -> DB6_R`[src]

Bits 16:23 - Data byte 6

`pub fn db5(&self) -> DB5_R`[src]

Bits 8:15 - Data byte 5

`pub fn db4(&self) -> DB4_R`[src]

Bits 0:7 - Data byte 4

`impl R<u32, Reg<u32, _FCTL>>`[src]

`pub fn hbc1f(&self) -> HBC1F_R`[src]

Bits 8:13 - Header bank of CAN1 filter

`pub fn fld(&self) -> FLD_R`[src]

Bit 0 - Filter lock disable

`impl R<u32, Reg<u32, _FMCFG>>`[src]

`pub fn fmod27(&self) -> FMOD27_R`[src]

Bit 27 - Filter mode

`pub fn fmod26(&self) -> FMOD26_R`[src]

Bit 26 - Filter mode

`pub fn fmod25(&self) -> FMOD25_R`[src]

Bit 25 - Filter mode

`pub fn fmod24(&self) -> FMOD24_R`[src]

Bit 24 - Filter mode

`pub fn fmod23(&self) -> FMOD23_R`[src]

Bit 23 - Filter mode

`pub fn fmod22(&self) -> FMOD22_R`[src]

Bit 22 - Filter mode

`pub fn fmod21(&self) -> FMOD21_R`[src]

Bit 21 - Filter mode

`pub fn fmod20(&self) -> FMOD20_R`[src]

Bit 20 - Filter mode

`pub fn fmod19(&self) -> FMOD19_R`[src]

Bit 19 - Filter mode

`pub fn fmod18(&self) -> FMOD18_R`[src]

Bit 18 - Filter mode

`pub fn fmod17(&self) -> FMOD17_R`[src]

Bit 17 - Filter mode

`pub fn fmod16(&self) -> FMOD16_R`[src]

Bit 16 - Filter mode

`pub fn fmod15(&self) -> FMOD15_R`[src]

Bit 15 - Filter mode

`pub fn fmod14(&self) -> FMOD14_R`[src]

Bit 14 - Filter mode

`pub fn fmod13(&self) -> FMOD13_R`[src]

Bit 13 - Filter mode

`pub fn fmod12(&self) -> FMOD12_R`[src]

Bit 12 - Filter mode

`pub fn fmod11(&self) -> FMOD11_R`[src]

Bit 11 - Filter mode

`pub fn fmod10(&self) -> FMOD10_R`[src]

Bit 10 - Filter mode

`pub fn fmod9(&self) -> FMOD9_R`[src]

Bit 9 - Filter mode

`pub fn fmod8(&self) -> FMOD8_R`[src]

Bit 8 - Filter mode

`pub fn fmod7(&self) -> FMOD7_R`[src]

Bit 7 - Filter mode

`pub fn fmod6(&self) -> FMOD6_R`[src]

Bit 6 - Filter mode

`pub fn fmod5(&self) -> FMOD5_R`[src]

Bit 5 - Filter mode

`pub fn fmod4(&self) -> FMOD4_R`[src]

Bit 4 - Filter mode

`pub fn fmod3(&self) -> FMOD3_R`[src]

Bit 3 - Filter mode

`pub fn fmod2(&self) -> FMOD2_R`[src]

Bit 2 - Filter mode

`pub fn fmod1(&self) -> FMOD1_R`[src]

Bit 1 - Filter mode

`pub fn fmod0(&self) -> FMOD0_R`[src]

Bit 0 - Filter mode

`impl R<u32, Reg<u32, _FSCFG>>`[src]

`pub fn fs0(&self) -> FS0_R`[src]

Bit 0 - Filter scale configuration

`pub fn fs1(&self) -> FS1_R`[src]

Bit 1 - Filter scale configuration

`pub fn fs2(&self) -> FS2_R`[src]

Bit 2 - Filter scale configuration

`pub fn fs3(&self) -> FS3_R`[src]

Bit 3 - Filter scale configuration

`pub fn fs4(&self) -> FS4_R`[src]

Bit 4 - Filter scale configuration

`pub fn fs5(&self) -> FS5_R`[src]

Bit 5 - Filter scale configuration

`pub fn fs6(&self) -> FS6_R`[src]

Bit 6 - Filter scale configuration

`pub fn fs7(&self) -> FS7_R`[src]

Bit 7 - Filter scale configuration

`pub fn fs8(&self) -> FS8_R`[src]

Bit 8 - Filter scale configuration

`pub fn fs9(&self) -> FS9_R`[src]

Bit 9 - Filter scale configuration

`pub fn fs10(&self) -> FS10_R`[src]

Bit 10 - Filter scale configuration

`pub fn fs11(&self) -> FS11_R`[src]

Bit 11 - Filter scale configuration

`pub fn fs12(&self) -> FS12_R`[src]

Bit 12 - Filter scale configuration

`pub fn fs13(&self) -> FS13_R`[src]

Bit 13 - Filter scale configuration

`pub fn fs14(&self) -> FS14_R`[src]

Bit 14 - Filter scale configuration

`pub fn fs15(&self) -> FS15_R`[src]

Bit 15 - Filter scale configuration

`pub fn fs16(&self) -> FS16_R`[src]

Bit 16 - Filter scale configuration

`pub fn fs17(&self) -> FS17_R`[src]

Bit 17 - Filter scale configuration

`pub fn fs18(&self) -> FS18_R`[src]

Bit 18 - Filter scale configuration

`pub fn fs19(&self) -> FS19_R`[src]

Bit 19 - Filter scale configuration

`pub fn fs20(&self) -> FS20_R`[src]

Bit 20 - Filter scale configuration

`pub fn fs21(&self) -> FS21_R`[src]

Bit 21 - Filter scale configuration

`pub fn fs22(&self) -> FS22_R`[src]

Bit 22 - Filter scale configuration

`pub fn fs23(&self) -> FS23_R`[src]

Bit 23 - Filter scale configuration

`pub fn fs24(&self) -> FS24_R`[src]

Bit 24 - Filter scale configuration

`pub fn fs25(&self) -> FS25_R`[src]

Bit 25 - Filter scale configuration

`pub fn fs26(&self) -> FS26_R`[src]

Bit 26 - Filter scale configuration

`pub fn fs27(&self) -> FS27_R`[src]

Bit 27 - Filter scale configuration

`impl R<u32, Reg<u32, _FAFIFO>>`[src]

`pub fn faf0(&self) -> FAF0_R`[src]

Bit 0 - Filter 0 associated with FIFO

`pub fn faf1(&self) -> FAF1_R`[src]

Bit 1 - Filter 1 associated with FIFO

`pub fn faf2(&self) -> FAF2_R`[src]

Bit 2 - Filter 2 associated with FIFO

`pub fn faf3(&self) -> FAF3_R`[src]

Bit 3 - Filter 3 associated with FIFO

`pub fn faf4(&self) -> FAF4_R`[src]

Bit 4 - Filter 4 associated with FIFO

`pub fn faf5(&self) -> FAF5_R`[src]

Bit 5 - Filter 5 associated with FIFO

`pub fn faf6(&self) -> FAF6_R`[src]

Bit 6 - Filter 6 associated with FIFO

`pub fn faf7(&self) -> FAF7_R`[src]

Bit 7 - Filter 7 associated with FIFO

`pub fn faf8(&self) -> FAF8_R`[src]

Bit 8 - Filter 8 associated with FIFO

`pub fn faf9(&self) -> FAF9_R`[src]

Bit 9 - Filter 9 associated with FIFO

`pub fn faf10(&self) -> FAF10_R`[src]

Bit 10 - Filter 10 associated with FIFO

`pub fn faf11(&self) -> FAF11_R`[src]

Bit 11 - Filter 11 associated with FIFO

`pub fn faf12(&self) -> FAF12_R`[src]

Bit 12 - Filter 12 associated with FIFO

`pub fn faf13(&self) -> FAF13_R`[src]

Bit 13 - Filter 13 associated with FIFO

`pub fn faf14(&self) -> FAF14_R`[src]

Bit 14 - Filter 14 associated with FIFO

`pub fn faf15(&self) -> FAF15_R`[src]

Bit 15 - Filter 15 associated with FIFO

`pub fn faf16(&self) -> FAF16_R`[src]

Bit 16 - Filter 16 associated with FIFO

`pub fn faf17(&self) -> FAF17_R`[src]

Bit 17 - Filter 17 associated with FIFO

`pub fn faf18(&self) -> FAF18_R`[src]

Bit 18 - Filter 18 associated with FIFO

`pub fn faf19(&self) -> FAF19_R`[src]

Bit 19 - Filter 19 associated with FIFO

`pub fn faf20(&self) -> FAF20_R`[src]

Bit 20 - Filter 20 associated with FIFO

`pub fn faf21(&self) -> FAF21_R`[src]

Bit 21 - Filter 21 associated with FIFO

`pub fn faf22(&self) -> FAF22_R`[src]

Bit 22 - Filter 22 associated with FIFO

`pub fn faf23(&self) -> FAF23_R`[src]

Bit 23 - Filter 23 associated with FIFO

`pub fn faf24(&self) -> FAF24_R`[src]

Bit 24 - Filter 24 associated with FIFO

`pub fn faf25(&self) -> FAF25_R`[src]

Bit 25 - Filter 25 associated with FIFO

`pub fn faf26(&self) -> FAF26_R`[src]

Bit 26 - Filter 26 associated with FIFO

`pub fn faf27(&self) -> FAF27_R`[src]

Bit 27 - Filter 27 associated with FIFO

`impl R<u32, Reg<u32, _FW>>`[src]

`pub fn fw0(&self) -> FW0_R`[src]

Bit 0 - Filter working

`pub fn fw1(&self) -> FW1_R`[src]

Bit 1 - Filter working

`pub fn fw2(&self) -> FW2_R`[src]

Bit 2 - Filter working

`pub fn fw3(&self) -> FW3_R`[src]

Bit 3 - Filter working

`pub fn fw4(&self) -> FW4_R`[src]

Bit 4 - Filter working

`pub fn fw5(&self) -> FW5_R`[src]

Bit 5 - Filter working

`pub fn fw6(&self) -> FW6_R`[src]

Bit 6 - Filter working

`pub fn fw7(&self) -> FW7_R`[src]

Bit 7 - Filter working

`pub fn fw8(&self) -> FW8_R`[src]

Bit 8 - Filter working

`pub fn fw9(&self) -> FW9_R`[src]

Bit 9 - Filter working

`pub fn fw10(&self) -> FW10_R`[src]

Bit 10 - Filter working

`pub fn fw11(&self) -> FW11_R`[src]

Bit 11 - Filter working

`pub fn fw12(&self) -> FW12_R`[src]

Bit 12 - Filter working

`pub fn fw13(&self) -> FW13_R`[src]

Bit 13 - Filter working

`pub fn fw14(&self) -> FW14_R`[src]

Bit 14 - Filter working

`pub fn fw15(&self) -> FW15_R`[src]

Bit 15 - Filter working

`pub fn fw16(&self) -> FW16_R`[src]

Bit 16 - Filter working

`pub fn fw17(&self) -> FW17_R`[src]

Bit 17 - Filter working

`pub fn fw18(&self) -> FW18_R`[src]

Bit 18 - Filter working

`pub fn fw19(&self) -> FW19_R`[src]

Bit 19 - Filter working

`pub fn fw20(&self) -> FW20_R`[src]

Bit 20 - Filter working

`pub fn fw21(&self) -> FW21_R`[src]

Bit 21 - Filter working

`pub fn fw22(&self) -> FW22_R`[src]

Bit 22 - Filter working

`pub fn fw23(&self) -> FW23_R`[src]

Bit 23 - Filter working

`pub fn fw24(&self) -> FW24_R`[src]

Bit 24 - Filter working

`pub fn fw25(&self) -> FW25_R`[src]

Bit 25 - Filter working

`pub fn fw26(&self) -> FW26_R`[src]

Bit 26 - Filter working

`pub fn fw27(&self) -> FW27_R`[src]

Bit 27 - Filter working

`impl R<u32, Reg<u32, _F0DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F0DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F1DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F1DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F2DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F2DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F3DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F3DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F4DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F4DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F5DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F5DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F6DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F6DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F7DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F7DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F8DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F8DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F9DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F9DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F10DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F10DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F11DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F11DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F12DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F12DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F13DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F13DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F14DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F14DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F15DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F15DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F16DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F16DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F17DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F17DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F18DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F18DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F19DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F19DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F20DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F20DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F21DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F21DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F22DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F22DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F23DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F23DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F24DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F24DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F25DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F25DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F26DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F26DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F27DATA0>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _F27DATA1>>`[src]

`pub fn fd0(&self) -> FD0_R`[src]

Bit 0 - Filter bits

`pub fn fd1(&self) -> FD1_R`[src]

Bit 1 - Filter bits

`pub fn fd2(&self) -> FD2_R`[src]

Bit 2 - Filter bits

`pub fn fd3(&self) -> FD3_R`[src]

Bit 3 - Filter bits

`pub fn fd4(&self) -> FD4_R`[src]

Bit 4 - Filter bits

`pub fn fd5(&self) -> FD5_R`[src]

Bit 5 - Filter bits

`pub fn fd6(&self) -> FD6_R`[src]

Bit 6 - Filter bits

`pub fn fd7(&self) -> FD7_R`[src]

Bit 7 - Filter bits

`pub fn fd8(&self) -> FD8_R`[src]

Bit 8 - Filter bits

`pub fn fd9(&self) -> FD9_R`[src]

Bit 9 - Filter bits

`pub fn fd10(&self) -> FD10_R`[src]

Bit 10 - Filter bits

`pub fn fd11(&self) -> FD11_R`[src]

Bit 11 - Filter bits

`pub fn fd12(&self) -> FD12_R`[src]

Bit 12 - Filter bits

`pub fn fd13(&self) -> FD13_R`[src]

Bit 13 - Filter bits

`pub fn fd14(&self) -> FD14_R`[src]

Bit 14 - Filter bits

`pub fn fd15(&self) -> FD15_R`[src]

Bit 15 - Filter bits

`pub fn fd16(&self) -> FD16_R`[src]

Bit 16 - Filter bits

`pub fn fd17(&self) -> FD17_R`[src]

Bit 17 - Filter bits

`pub fn fd18(&self) -> FD18_R`[src]

Bit 18 - Filter bits

`pub fn fd19(&self) -> FD19_R`[src]

Bit 19 - Filter bits

`pub fn fd20(&self) -> FD20_R`[src]

Bit 20 - Filter bits

`pub fn fd21(&self) -> FD21_R`[src]

Bit 21 - Filter bits

`pub fn fd22(&self) -> FD22_R`[src]

Bit 22 - Filter bits

`pub fn fd23(&self) -> FD23_R`[src]

Bit 23 - Filter bits

`pub fn fd24(&self) -> FD24_R`[src]

Bit 24 - Filter bits

`pub fn fd25(&self) -> FD25_R`[src]

Bit 25 - Filter bits

`pub fn fd26(&self) -> FD26_R`[src]

Bit 26 - Filter bits

`pub fn fd27(&self) -> FD27_R`[src]

Bit 27 - Filter bits

`pub fn fd28(&self) -> FD28_R`[src]

Bit 28 - Filter bits

`pub fn fd29(&self) -> FD29_R`[src]

Bit 29 - Filter bits

`pub fn fd30(&self) -> FD30_R`[src]

Bit 30 - Filter bits

`pub fn fd31(&self) -> FD31_R`[src]

Bit 31 - Filter bits

`impl R<u32, Reg<u32, _DATA>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:31 - CRC calculation result bits

`impl R<u32, Reg<u32, _FDATA>>`[src]

`pub fn fdata(&self) -> FDATA_R`[src]

Bits 0:7 - Free Data Register bits

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn rst(&self) -> RST_R`[src]

Bit 0 - reset bit

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn den0(&self) -> DEN0_R`[src]

Bit 0 - DAC0 enable

`pub fn dboff0(&self) -> DBOFF0_R`[src]

Bit 1 - DAC0 output buffer turn off

`pub fn dten0(&self) -> DTEN0_R`[src]

Bit 2 - DAC0 trigger enable

`pub fn dtsel0(&self) -> DTSEL0_R`[src]

Bits 3:5 - DAC0 trigger selection

`pub fn dwm0(&self) -> DWM0_R`[src]

Bits 6:7 - DAC0 noise wave mode

`pub fn dwbw0(&self) -> DWBW0_R`[src]

Bits 8:11 - DAC0 noise wave bit width

`pub fn ddmaen0(&self) -> DDMAEN0_R`[src]

Bit 12 - DAC0 DMA enable

`pub fn den1(&self) -> DEN1_R`[src]

Bit 16 - DAC1 enable

`pub fn dboff1(&self) -> DBOFF1_R`[src]

Bit 17 - DAC1 output buffer turn off

`pub fn dten1(&self) -> DTEN1_R`[src]

Bit 18 - DAC1 trigger enable

`pub fn dtsel1(&self) -> DTSEL1_R`[src]

Bits 19:21 - DAC1 trigger selection

`pub fn dwm1(&self) -> DWM1_R`[src]

Bits 22:23 - DAC1 noise wave mode

`pub fn dwbw1(&self) -> DWBW1_R`[src]

Bits 24:27 - DAC1 noise wave bit width

`pub fn ddmaen1(&self) -> DDMAEN1_R`[src]

Bit 28 - DAC1 DMA enable

`impl R<u32, Reg<u32, _DAC0_R12DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 0:11 - DAC0 12-bit right-aligned data

`impl R<u32, Reg<u32, _DAC0_L12DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 4:15 - DAC0 12-bit left-aligned data

`impl R<u32, Reg<u32, _DAC0_R8DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 0:7 - DAC0 8-bit right-aligned data

`impl R<u32, Reg<u32, _DAC1_R12DH>>`[src]

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 0:11 - DAC1 12-bit right-aligned data

`impl R<u32, Reg<u32, _DAC1_L12DH>>`[src]

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 4:15 - DAC1 12-bit left-aligned data

`impl R<u32, Reg<u32, _DAC1_R8DH>>`[src]

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 0:7 - DAC1 8-bit right-aligned data

`impl R<u32, Reg<u32, _DACC_R12DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 0:11 - DAC0 12-bit right-aligned data

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 16:27 - DAC1 12-bit right-aligned data

`impl R<u32, Reg<u32, _DACC_L12DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 4:15 - DAC0 12-bit left-aligned data

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 20:31 - DAC1 12-bit left-aligned data

`impl R<u32, Reg<u32, _DACC_R8DH>>`[src]

`pub fn dac0_dh(&self) -> DAC0_DH_R`[src]

Bits 0:7 - DAC0 8-bit right-aligned data

`pub fn dac1_dh(&self) -> DAC1_DH_R`[src]

Bits 8:15 - DAC1 8-bit right-aligned data

`impl R<u32, Reg<u32, _DAC0_DO>>`[src]

`pub fn dac0_do(&self) -> DAC0_DO_R`[src]

Bits 0:11 - DAC0 data output

`impl R<u32, Reg<u32, _DAC1_DO>>`[src]

`pub fn dac1_do(&self) -> DAC1_DO_R`[src]

Bits 0:11 - DAC1 data output

`impl R<u32, Reg<u32, _ID>>`[src]

`pub fn id_code(&self) -> ID_CODE_R`[src]

Bits 0:31 - DBG ID code register

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn slp_hold(&self) -> SLP_HOLD_R`[src]

Bit 0 - Sleep mode hold register

`pub fn dslp_hold(&self) -> DSLP_HOLD_R`[src]

Bit 1 - Deep-sleep mode hold register

`pub fn stb_hold(&self) -> STB_HOLD_R`[src]

Bit 2 - Standby mode hold register

`pub fn fwdgt_hold(&self) -> FWDGT_HOLD_R`[src]

Bit 8 - FWDGT hold bit

`pub fn wwdgt_hold(&self) -> WWDGT_HOLD_R`[src]

Bit 9 - WWDGT hold bit

`pub fn timer0_hold(&self) -> TIMER0_HOLD_R`[src]

Bit 10 - TIMER 0 hold bit

`pub fn timer1_hold(&self) -> TIMER1_HOLD_R`[src]

Bit 11 - TIMER 1 hold bit

`pub fn timer2_hold(&self) -> TIMER2_HOLD_R`[src]

Bit 12 - TIMER 2 hold bit

`pub fn timer3_hold(&self) -> TIMER3_HOLD_R`[src]

Bit 13 - TIMER 23 hold bit

`pub fn can0_hold(&self) -> CAN0_HOLD_R`[src]

Bit 14 - CAN0 hold bit

`pub fn i2c0_hold(&self) -> I2C0_HOLD_R`[src]

Bit 15 - I2C0 hold bit

`pub fn i2c1_hold(&self) -> I2C1_HOLD_R`[src]

Bit 16 - I2C1 hold bit

`pub fn timer4_hold(&self) -> TIMER4_HOLD_R`[src]

Bit 18 - TIMER4_HOLD

`pub fn timer5_hold(&self) -> TIMER5_HOLD_R`[src]

Bit 19 - TIMER 5 hold bit

`pub fn timer6_hold(&self) -> TIMER6_HOLD_R`[src]

Bit 20 - TIMER 6 hold bit

`pub fn can1_hold(&self) -> CAN1_HOLD_R`[src]

Bit 21 - CAN1 hold bit

`impl R<u32, Reg<u32, _INTF>>`[src]

`pub fn gif0(&self) -> GIF0_R`[src]

Bit 0 - Global interrupt flag of channel 0

`pub fn ftfif0(&self) -> FTFIF0_R`[src]

Bit 1 - Full Transfer finish flag of channe 0

`pub fn htfif0(&self) -> HTFIF0_R`[src]

Bit 2 - Half transfer finish flag of channel 0

`pub fn errif0(&self) -> ERRIF0_R`[src]

Bit 3 - Error flag of channel 0

`pub fn gif1(&self) -> GIF1_R`[src]

Bit 4 - Global interrupt flag of channel 1

`pub fn ftfif1(&self) -> FTFIF1_R`[src]

Bit 5 - Full Transfer finish flag of channe 1

`pub fn htfif1(&self) -> HTFIF1_R`[src]

Bit 6 - Half transfer finish flag of channel 1

`pub fn errif1(&self) -> ERRIF1_R`[src]

Bit 7 - Error flag of channel 1

`pub fn gif2(&self) -> GIF2_R`[src]

Bit 8 - Global interrupt flag of channel 2

`pub fn ftfif2(&self) -> FTFIF2_R`[src]

Bit 9 - Full Transfer finish flag of channe 2

`pub fn htfif2(&self) -> HTFIF2_R`[src]

Bit 10 - Half transfer finish flag of channel 2

`pub fn errif2(&self) -> ERRIF2_R`[src]

Bit 11 - Error flag of channel 2

`pub fn gif3(&self) -> GIF3_R`[src]

Bit 12 - Global interrupt flag of channel 3

`pub fn ftfif3(&self) -> FTFIF3_R`[src]

Bit 13 - Full Transfer finish flag of channe 3

`pub fn htfif3(&self) -> HTFIF3_R`[src]

Bit 14 - Half transfer finish flag of channel 3

`pub fn errif3(&self) -> ERRIF3_R`[src]

Bit 15 - Error flag of channel 3

`pub fn gif4(&self) -> GIF4_R`[src]

Bit 16 - Global interrupt flag of channel 4

`pub fn ftfif4(&self) -> FTFIF4_R`[src]

Bit 17 - Full Transfer finish flag of channe 4

`pub fn htfif4(&self) -> HTFIF4_R`[src]

Bit 18 - Half transfer finish flag of channel 4

`pub fn errif4(&self) -> ERRIF4_R`[src]

Bit 19 - Error flag of channel 4

`pub fn gif5(&self) -> GIF5_R`[src]

Bit 20 - Global interrupt flag of channel 5

`pub fn ftfif5(&self) -> FTFIF5_R`[src]

Bit 21 - Full Transfer finish flag of channe 5

`pub fn htfif5(&self) -> HTFIF5_R`[src]

Bit 22 - Half transfer finish flag of channel 5

`pub fn errif5(&self) -> ERRIF5_R`[src]

Bit 23 - Error flag of channel 5

`pub fn gif6(&self) -> GIF6_R`[src]

Bit 24 - Global interrupt flag of channel 6

`pub fn ftfif6(&self) -> FTFIF6_R`[src]

Bit 25 - Full Transfer finish flag of channe 6

`pub fn htfif6(&self) -> HTFIF6_R`[src]

Bit 26 - Half transfer finish flag of channel 6

`pub fn errif6(&self) -> ERRIF6_R`[src]

Bit 27 - Error flag of channel 6

`impl R<u32, Reg<u32, _CH0CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH0CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH0PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH0MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH1CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH1CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH1PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH1MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH2CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH2CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH2PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH2MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH3CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH3CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH3PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH3MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH4CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH4CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH4PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH4MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH5CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH5CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH5PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH5MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH6CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH6CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH6PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH6MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _INTF>>`[src]

`pub fn gif0(&self) -> GIF0_R`[src]

Bit 0 - Global interrupt flag of channel 0

`pub fn ftfif0(&self) -> FTFIF0_R`[src]

Bit 1 - Full Transfer finish flag of channe 0

`pub fn htfif0(&self) -> HTFIF0_R`[src]

Bit 2 - Half transfer finish flag of channel 0

`pub fn errif0(&self) -> ERRIF0_R`[src]

Bit 3 - Error flag of channel 0

`pub fn gif1(&self) -> GIF1_R`[src]

Bit 4 - Global interrupt flag of channel 1

`pub fn ftfif1(&self) -> FTFIF1_R`[src]

Bit 5 - Full Transfer finish flag of channe 1

`pub fn htfif1(&self) -> HTFIF1_R`[src]

Bit 6 - Half transfer finish flag of channel 1

`pub fn errif1(&self) -> ERRIF1_R`[src]

Bit 7 - Error flag of channel 1

`pub fn gif2(&self) -> GIF2_R`[src]

Bit 8 - Global interrupt flag of channel 2

`pub fn ftfif2(&self) -> FTFIF2_R`[src]

Bit 9 - Full Transfer finish flag of channe 2

`pub fn htfif2(&self) -> HTFIF2_R`[src]

Bit 10 - Half transfer finish flag of channel 2

`pub fn errif2(&self) -> ERRIF2_R`[src]

Bit 11 - Error flag of channel 2

`pub fn gif3(&self) -> GIF3_R`[src]

Bit 12 - Global interrupt flag of channel 3

`pub fn ftfif3(&self) -> FTFIF3_R`[src]

Bit 13 - Full Transfer finish flag of channe 3

`pub fn htfif3(&self) -> HTFIF3_R`[src]

Bit 14 - Half transfer finish flag of channel 3

`pub fn errif3(&self) -> ERRIF3_R`[src]

Bit 15 - Error flag of channel 3

`pub fn gif4(&self) -> GIF4_R`[src]

Bit 16 - Global interrupt flag of channel 4

`pub fn ftfif4(&self) -> FTFIF4_R`[src]

Bit 17 - Full Transfer finish flag of channe 4

`pub fn htfif4(&self) -> HTFIF4_R`[src]

Bit 18 - Half transfer finish flag of channel 4

`pub fn errif4(&self) -> ERRIF4_R`[src]

Bit 19 - Error flag of channel 4

`impl R<u32, Reg<u32, _CH0CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH0CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH0PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH0MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH1CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH1CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH1PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH1MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH2CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH2CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH2PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH2MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH3CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH3CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH3PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH3MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _CH4CTL>>`[src]

`pub fn chen(&self) -> CHEN_R`[src]

Bit 0 - Channel enable

`pub fn ftfie(&self) -> FTFIE_R`[src]

Bit 1 - Enable bit for channel full transfer finish interrupt

`pub fn htfie(&self) -> HTFIE_R`[src]

Bit 2 - Enable bit for channel half transfer finish interrupt

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 3 - Enable bit for channel error interrupt

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Transfer direction

`pub fn cmen(&self) -> CMEN_R`[src]

Bit 5 - Circular mode enable

`pub fn pnaga(&self) -> PNAGA_R`[src]

Bit 6 - Next address generation algorithm of peripheral

`pub fn mnaga(&self) -> MNAGA_R`[src]

Bit 7 - Next address generation algorithm of memory

`pub fn pwidth(&self) -> PWIDTH_R`[src]

Bits 8:9 - Transfer data size of peripheral

`pub fn mwidth(&self) -> MWIDTH_R`[src]

Bits 10:11 - Transfer data size of memory

`pub fn prio(&self) -> PRIO_R`[src]

Bits 12:13 - Priority level

`pub fn m2m(&self) -> M2M_R`[src]

Bit 14 - Memory to Memory Mode

`impl R<u32, Reg<u32, _CH4CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Transfer counter

`impl R<u32, Reg<u32, _CH4PADDR>>`[src]

`pub fn paddr(&self) -> PADDR_R`[src]

Bits 0:31 - Peripheral base address

`impl R<u32, Reg<u32, _CH4MADDR>>`[src]

`pub fn maddr(&self) -> MADDR_R`[src]

Bits 0:31 - Memory base address

`impl R<u32, Reg<u32, _SNCTL0>>`[src]

`pub fn asyncwait(&self) -> ASYNCWAIT_R`[src]

Bit 15 - Asynchronous wait

`pub fn nrwten(&self) -> NRWTEN_R`[src]

Bit 13 - NWAIT signal enable

`pub fn wren(&self) -> WREN_R`[src]

Bit 12 - Write enable

`pub fn nrwtpol(&self) -> NRWTPOL_R`[src]

Bit 9 - NWAIT signal polarity

`pub fn nren(&self) -> NREN_R`[src]

Bit 6 - NOR Flash access enable

`pub fn nrw(&self) -> NRW_R`[src]

Bits 4:5 - NOR bank memory data bus width

`pub fn nrtp(&self) -> NRTP_R`[src]

Bits 2:3 - NOR bank memory type

`pub fn nrmux(&self) -> NRMUX_R`[src]

Bit 1 - NOR bank memory address/data multiplexing

`pub fn nrbken(&self) -> NRBKEN_R`[src]

Bit 0 - NOR bank enable

`impl R<u32, Reg<u32, _SNTCFG0>>`[src]

`pub fn buslat(&self) -> BUSLAT_R`[src]

Bits 16:19 - Bus latency

`pub fn dset(&self) -> DSET_R`[src]

Bits 8:15 - Data setup time

`pub fn ahld(&self) -> AHLD_R`[src]

Bits 4:7 - Address hold time

`pub fn aset(&self) -> ASET_R`[src]

Bits 0:3 - Address setup time

`impl R<u32, Reg<u32, _SNCTL1>>`[src]

`pub fn asyncwait(&self) -> ASYNCWAIT_R`[src]

Bit 15 - Asynchronous wait

`pub fn nrwten(&self) -> NRWTEN_R`[src]

Bit 13 - NWAIT signal enable

`pub fn wren(&self) -> WREN_R`[src]

Bit 12 - Write enable

`pub fn nrwtpol(&self) -> NRWTPOL_R`[src]

Bit 9 - NWAIT signal polarity

`pub fn nren(&self) -> NREN_R`[src]

Bit 6 - NOR Flash access enable

`pub fn nrw(&self) -> NRW_R`[src]

Bits 4:5 - NOR bank memory data bus width

`pub fn nrtp(&self) -> NRTP_R`[src]

Bits 2:3 - NOR bank memory type

`pub fn nrmux(&self) -> NRMUX_R`[src]

Bit 1 - NOR bank memory address/data multiplexing

`pub fn nrbken(&self) -> NRBKEN_R`[src]

Bit 0 - NOR bank enable

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn inten0(&self) -> INTEN0_R`[src]

Bit 0 - Enable Interrupt on line 0

`pub fn inten1(&self) -> INTEN1_R`[src]

Bit 1 - Enable Interrupt on line 1

`pub fn inten2(&self) -> INTEN2_R`[src]

Bit 2 - Enable Interrupt on line 2

`pub fn inten3(&self) -> INTEN3_R`[src]

Bit 3 - Enable Interrupt on line 3

`pub fn inten4(&self) -> INTEN4_R`[src]

Bit 4 - Enable Interrupt on line 4

`pub fn inten5(&self) -> INTEN5_R`[src]

Bit 5 - Enable Interrupt on line 5

`pub fn inten6(&self) -> INTEN6_R`[src]

Bit 6 - Enable Interrupt on line 6

`pub fn inten7(&self) -> INTEN7_R`[src]

Bit 7 - Enable Interrupt on line 7

`pub fn inten8(&self) -> INTEN8_R`[src]

Bit 8 - Enable Interrupt on line 8

`pub fn inten9(&self) -> INTEN9_R`[src]

Bit 9 - Enable Interrupt on line 9

`pub fn inten10(&self) -> INTEN10_R`[src]

Bit 10 - Enable Interrupt on line 10

`pub fn inten11(&self) -> INTEN11_R`[src]

Bit 11 - Enable Interrupt on line 11

`pub fn inten12(&self) -> INTEN12_R`[src]

Bit 12 - Enable Interrupt on line 12

`pub fn inten13(&self) -> INTEN13_R`[src]

Bit 13 - Enable Interrupt on line 13

`pub fn inten14(&self) -> INTEN14_R`[src]

Bit 14 - Enable Interrupt on line 14

`pub fn inten15(&self) -> INTEN15_R`[src]

Bit 15 - Enable Interrupt on line 15

`pub fn inten16(&self) -> INTEN16_R`[src]

Bit 16 - Enable Interrupt on line 16

`pub fn inten17(&self) -> INTEN17_R`[src]

Bit 17 - Enable Interrupt on line 17

`pub fn inten18(&self) -> INTEN18_R`[src]

Bit 18 - Enable Interrupt on line 18

`impl R<u32, Reg<u32, _EVEN>>`[src]

`pub fn even0(&self) -> EVEN0_R`[src]

Bit 0 - Enable Event on line 0

`pub fn even1(&self) -> EVEN1_R`[src]

Bit 1 - Enable Event on line 1

`pub fn even2(&self) -> EVEN2_R`[src]

Bit 2 - Enable Event on line 2

`pub fn even3(&self) -> EVEN3_R`[src]

Bit 3 - Enable Event on line 3

`pub fn even4(&self) -> EVEN4_R`[src]

Bit 4 - Enable Event on line 4

`pub fn even5(&self) -> EVEN5_R`[src]

Bit 5 - Enable Event on line 5

`pub fn even6(&self) -> EVEN6_R`[src]

Bit 6 - Enable Event on line 6

`pub fn even7(&self) -> EVEN7_R`[src]

Bit 7 - Enable Event on line 7

`pub fn even8(&self) -> EVEN8_R`[src]

Bit 8 - Enable Event on line 8

`pub fn even9(&self) -> EVEN9_R`[src]

Bit 9 - Enable Event on line 9

`pub fn even10(&self) -> EVEN10_R`[src]

Bit 10 - Enable Event on line 10

`pub fn even11(&self) -> EVEN11_R`[src]

Bit 11 - Enable Event on line 11

`pub fn even12(&self) -> EVEN12_R`[src]

Bit 12 - Enable Event on line 12

`pub fn even13(&self) -> EVEN13_R`[src]

Bit 13 - Enable Event on line 13

`pub fn even14(&self) -> EVEN14_R`[src]

Bit 14 - Enable Event on line 14

`pub fn even15(&self) -> EVEN15_R`[src]

Bit 15 - Enable Event on line 15

`pub fn even16(&self) -> EVEN16_R`[src]

Bit 16 - Enable Event on line 16

`pub fn even17(&self) -> EVEN17_R`[src]

Bit 17 - Enable Event on line 17

`pub fn even18(&self) -> EVEN18_R`[src]

Bit 18 - Enable Event on line 18

`impl R<u32, Reg<u32, _RTEN>>`[src]

`pub fn rten0(&self) -> RTEN0_R`[src]

Bit 0 - Rising edge trigger enable of line 0

`pub fn rten1(&self) -> RTEN1_R`[src]

Bit 1 - Rising edge trigger enable of line 1

`pub fn rten2(&self) -> RTEN2_R`[src]

Bit 2 - Rising edge trigger enable of line 2

`pub fn rten3(&self) -> RTEN3_R`[src]

Bit 3 - Rising edge trigger enable of line 3

`pub fn rten4(&self) -> RTEN4_R`[src]

Bit 4 - Rising edge trigger enable of line 4

`pub fn rten5(&self) -> RTEN5_R`[src]

Bit 5 - Rising edge trigger enable of line 5

`pub fn rten6(&self) -> RTEN6_R`[src]

Bit 6 - Rising edge trigger enable of line 6

`pub fn rten7(&self) -> RTEN7_R`[src]

Bit 7 - Rising edge trigger enable of line 7

`pub fn rten8(&self) -> RTEN8_R`[src]

Bit 8 - Rising edge trigger enable of line 8

`pub fn rten9(&self) -> RTEN9_R`[src]

Bit 9 - Rising edge trigger enable of line 9

`pub fn rten10(&self) -> RTEN10_R`[src]

Bit 10 - Rising edge trigger enable of line 10

`pub fn rten11(&self) -> RTEN11_R`[src]

Bit 11 - Rising edge trigger enable of line 11

`pub fn rten12(&self) -> RTEN12_R`[src]

Bit 12 - Rising edge trigger enable of line 12

`pub fn rten13(&self) -> RTEN13_R`[src]

Bit 13 - Rising edge trigger enable of line 13

`pub fn rten14(&self) -> RTEN14_R`[src]

Bit 14 - Rising edge trigger enable of line 14

`pub fn rten15(&self) -> RTEN15_R`[src]

Bit 15 - Rising edge trigger enable of line 15

`pub fn rten16(&self) -> RTEN16_R`[src]

Bit 16 - Rising edge trigger enable of line 16

`pub fn rten17(&self) -> RTEN17_R`[src]

Bit 17 - Rising edge trigger enable of line 17

`pub fn rten18(&self) -> RTEN18_R`[src]

Bit 18 - Rising edge trigger enable of line 18

`impl R<u32, Reg<u32, _FTEN>>`[src]

`pub fn ften0(&self) -> FTEN0_R`[src]

Bit 0 - Falling edge trigger enable of line 0

`pub fn ften1(&self) -> FTEN1_R`[src]

Bit 1 - Falling edge trigger enable of line 1

`pub fn ften2(&self) -> FTEN2_R`[src]

Bit 2 - Falling edge trigger enable of line 2

`pub fn ften3(&self) -> FTEN3_R`[src]

Bit 3 - Falling edge trigger enable of line 3

`pub fn ften4(&self) -> FTEN4_R`[src]

Bit 4 - Falling edge trigger enable of line 4

`pub fn ften5(&self) -> FTEN5_R`[src]

Bit 5 - Falling edge trigger enable of line 5

`pub fn ften6(&self) -> FTEN6_R`[src]

Bit 6 - Falling edge trigger enable of line 6

`pub fn ften7(&self) -> FTEN7_R`[src]

Bit 7 - Falling edge trigger enable of line 7

`pub fn ften8(&self) -> FTEN8_R`[src]

Bit 8 - Falling edge trigger enable of line 8

`pub fn ften9(&self) -> FTEN9_R`[src]

Bit 9 - Falling edge trigger enable of line 9

`pub fn ften10(&self) -> FTEN10_R`[src]

Bit 10 - Falling edge trigger enable of line 10

`pub fn ften11(&self) -> FTEN11_R`[src]

Bit 11 - Falling edge trigger enable of line 11

`pub fn ften12(&self) -> FTEN12_R`[src]

Bit 12 - Falling edge trigger enable of line 12

`pub fn ften13(&self) -> FTEN13_R`[src]

Bit 13 - Falling edge trigger enable of line 13

`pub fn ften14(&self) -> FTEN14_R`[src]

Bit 14 - Falling edge trigger enable of line 14

`pub fn ften15(&self) -> FTEN15_R`[src]

Bit 15 - Falling edge trigger enable of line 15

`pub fn ften16(&self) -> FTEN16_R`[src]

Bit 16 - Falling edge trigger enable of line 16

`pub fn ften17(&self) -> FTEN17_R`[src]

Bit 17 - Falling edge trigger enable of line 17

`pub fn ften18(&self) -> FTEN18_R`[src]

Bit 18 - Falling edge trigger enable of line 18

`impl R<u32, Reg<u32, _SWIEV>>`[src]

`pub fn swiev0(&self) -> SWIEV0_R`[src]

Bit 0 - Interrupt/Event software trigger on line 0

`pub fn swiev1(&self) -> SWIEV1_R`[src]

Bit 1 - Interrupt/Event software trigger on line 1

`pub fn swiev2(&self) -> SWIEV2_R`[src]

Bit 2 - Interrupt/Event software trigger on line 2

`pub fn swiev3(&self) -> SWIEV3_R`[src]

Bit 3 - Interrupt/Event software trigger on line 3

`pub fn swiev4(&self) -> SWIEV4_R`[src]

Bit 4 - Interrupt/Event software trigger on line 4

`pub fn swiev5(&self) -> SWIEV5_R`[src]

Bit 5 - Interrupt/Event software trigger on line 5

`pub fn swiev6(&self) -> SWIEV6_R`[src]

Bit 6 - Interrupt/Event software trigger on line 6

`pub fn swiev7(&self) -> SWIEV7_R`[src]

Bit 7 - Interrupt/Event software trigger on line 7

`pub fn swiev8(&self) -> SWIEV8_R`[src]

Bit 8 - Interrupt/Event software trigger on line 8

`pub fn swiev9(&self) -> SWIEV9_R`[src]

Bit 9 - Interrupt/Event software trigger on line 9

`pub fn swiev10(&self) -> SWIEV10_R`[src]

Bit 10 - Interrupt/Event software trigger on line 10

`pub fn swiev11(&self) -> SWIEV11_R`[src]

Bit 11 - Interrupt/Event software trigger on line 11

`pub fn swiev12(&self) -> SWIEV12_R`[src]

Bit 12 - Interrupt/Event software trigger on line 12

`pub fn swiev13(&self) -> SWIEV13_R`[src]

Bit 13 - Interrupt/Event software trigger on line 13

`pub fn swiev14(&self) -> SWIEV14_R`[src]

Bit 14 - Interrupt/Event software trigger on line 14

`pub fn swiev15(&self) -> SWIEV15_R`[src]

Bit 15 - Interrupt/Event software trigger on line 15

`pub fn swiev16(&self) -> SWIEV16_R`[src]

Bit 16 - Interrupt/Event software trigger on line 16

`pub fn swiev17(&self) -> SWIEV17_R`[src]

Bit 17 - Interrupt/Event software trigger on line 17

`pub fn swiev18(&self) -> SWIEV18_R`[src]

Bit 18 - Interrupt/Event software trigger on line 18

`impl R<u32, Reg<u32, _PD>>`[src]

`pub fn pd0(&self) -> PD0_R`[src]

Bit 0 - Interrupt pending status of line 0

`pub fn pd1(&self) -> PD1_R`[src]

Bit 1 - Interrupt pending status of line 1

`pub fn pd2(&self) -> PD2_R`[src]

Bit 2 - Interrupt pending status of line 2

`pub fn pd3(&self) -> PD3_R`[src]

Bit 3 - Interrupt pending status of line 3

`pub fn pd4(&self) -> PD4_R`[src]

Bit 4 - Interrupt pending status of line 4

`pub fn pd5(&self) -> PD5_R`[src]

Bit 5 - Interrupt pending status of line 5

`pub fn pd6(&self) -> PD6_R`[src]

Bit 6 - Interrupt pending status of line 6

`pub fn pd7(&self) -> PD7_R`[src]

Bit 7 - Interrupt pending status of line 7

`pub fn pd8(&self) -> PD8_R`[src]

Bit 8 - Interrupt pending status of line 8

`pub fn pd9(&self) -> PD9_R`[src]

Bit 9 - Interrupt pending status of line 9

`pub fn pd10(&self) -> PD10_R`[src]

Bit 10 - Interrupt pending status of line 10

`pub fn pd11(&self) -> PD11_R`[src]

Bit 11 - Interrupt pending status of line 11

`pub fn pd12(&self) -> PD12_R`[src]

Bit 12 - Interrupt pending status of line 12

`pub fn pd13(&self) -> PD13_R`[src]

Bit 13 - Interrupt pending status of line 13

`pub fn pd14(&self) -> PD14_R`[src]

Bit 14 - Interrupt pending status of line 14

`pub fn pd15(&self) -> PD15_R`[src]

Bit 15 - Interrupt pending status of line 15

`pub fn pd16(&self) -> PD16_R`[src]

Bit 16 - Interrupt pending status of line 16

`pub fn pd17(&self) -> PD17_R`[src]

Bit 17 - Interrupt pending status of line 17

`pub fn pd18(&self) -> PD18_R`[src]

Bit 18 - Interrupt pending status of line 18

`impl R<u32, Reg<u32, _WS>>`[src]

`pub fn wscnt(&self) -> WSCNT_R`[src]

Bits 0:2 - wait state counter register

`impl R<u32, Reg<u32, _STAT0>>`[src]

`pub fn endf(&self) -> ENDF_R`[src]

Bit 5 - End of operation flag bit

`pub fn wperr(&self) -> WPERR_R`[src]

Bit 4 - Erase/Program protection error flag bit

`pub fn pgerr(&self) -> PGERR_R`[src]

Bit 2 - Program error flag bit

`pub fn busy(&self) -> BUSY_R`[src]

Bit 0 - The flash is busy bit

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn endie(&self) -> ENDIE_R`[src]

Bit 12 - End of operation interrupt enable bit

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 10 - Error interrupt enable bit

`pub fn obwen(&self) -> OBWEN_R`[src]

Bit 9 - Option byte erase/program enable bit

`pub fn lk(&self) -> LK_R`[src]

Bit 7 - FMC_CTL0 lock bit

`pub fn start(&self) -> START_R`[src]

Bit 6 - Send erase command to FMC bit

`pub fn ober(&self) -> OBER_R`[src]

Bit 5 - Option bytes erase command bit

`pub fn obpg(&self) -> OBPG_R`[src]

Bit 4 - Option bytes program command bit

`pub fn mer(&self) -> MER_R`[src]

Bit 2 - Main flash mass erase for bank0 command bit

`pub fn per(&self) -> PER_R`[src]

Bit 1 - Main flash page erase for bank0 command bit

`pub fn pg(&self) -> PG_R`[src]

Bit 0 - Main flash program for bank0 command bit

`impl R<u32, Reg<u32, _OBSTAT>>`[src]

`pub fn oberr(&self) -> OBERR_R`[src]

Bit 0 - Option bytes read error bit

`pub fn spc(&self) -> SPC_R`[src]

Bit 1 - Option bytes security protection code

`pub fn user(&self) -> USER_R`[src]

Bits 2:9 - Store USER of option bytes block after system reset

`pub fn data(&self) -> DATA_R`[src]

Bits 10:25 - Store DATA[15:0] of option bytes block after system reset

`impl R<u32, Reg<u32, _WP>>`[src]

`pub fn wp(&self) -> WP_R`[src]

Bits 0:31 - Store WP[31:0] of option bytes block after system reset

`impl R<u32, Reg<u32, _PID>>`[src]

`pub fn pid(&self) -> PID_R`[src]

Bits 0:31 - Product reserved ID code register

`impl R<u32, Reg<u32, _PSC>>`[src]

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:2 - Free watchdog timer prescaler selection

`impl R<u32, Reg<u32, _RLD>>`[src]

`pub fn rld(&self) -> RLD_R`[src]

Bits 0:11 - Free watchdog timer counter reload value

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn pud(&self) -> PUD_R`[src]

Bit 0 - Free watchdog timer prescaler value update

`pub fn rud(&self) -> RUD_R`[src]

Bit 1 - Free watchdog timer counter reload value update

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn ctl7(&self) -> CTL7_R`[src]

Bits 30:31 - Port x configuration bits (x = 7)

`pub fn md7(&self) -> MD7_R`[src]

Bits 28:29 - Port x mode bits (x = 7)

`pub fn ctl6(&self) -> CTL6_R`[src]

Bits 26:27 - Port x configuration bits (x = 6)

`pub fn md6(&self) -> MD6_R`[src]

Bits 24:25 - Port x mode bits (x = 6)

`pub fn ctl5(&self) -> CTL5_R`[src]

Bits 22:23 - Port x configuration bits (x = 5)

`pub fn md5(&self) -> MD5_R`[src]

Bits 20:21 - Port x mode bits (x = 5)

`pub fn ctl4(&self) -> CTL4_R`[src]

Bits 18:19 - Port x configuration bits (x = 4)

`pub fn md4(&self) -> MD4_R`[src]

Bits 16:17 - Port x mode bits (x = 4)

`pub fn ctl3(&self) -> CTL3_R`[src]

Bits 14:15 - Port x configuration bits (x = 3)

`pub fn md3(&self) -> MD3_R`[src]

Bits 12:13 - Port x mode bits (x = 3 )

`pub fn ctl2(&self) -> CTL2_R`[src]

Bits 10:11 - Port x configuration bits (x = 2)

`pub fn md2(&self) -> MD2_R`[src]

Bits 8:9 - Port x mode bits (x = 2 )

`pub fn ctl1(&self) -> CTL1_R`[src]

Bits 6:7 - Port x configuration bits (x = 1)

`pub fn md1(&self) -> MD1_R`[src]

Bits 4:5 - Port x mode bits (x = 1)

`pub fn ctl0(&self) -> CTL0_R`[src]

Bits 2:3 - Port x configuration bits (x = 0)

`pub fn md0(&self) -> MD0_R`[src]

Bits 0:1 - Port x mode bits (x = 0)

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn ctl15(&self) -> CTL15_R`[src]

Bits 30:31 - Port x configuration bits (x = 15)

`pub fn md15(&self) -> MD15_R`[src]

Bits 28:29 - Port x mode bits (x = 15)

`pub fn ctl14(&self) -> CTL14_R`[src]

Bits 26:27 - Port x configuration bits (x = 14)

`pub fn md14(&self) -> MD14_R`[src]

Bits 24:25 - Port x mode bits (x = 14)

`pub fn ctl13(&self) -> CTL13_R`[src]

Bits 22:23 - Port x configuration bits (x = 13)

`pub fn md13(&self) -> MD13_R`[src]

Bits 20:21 - Port x mode bits (x = 13)

`pub fn ctl12(&self) -> CTL12_R`[src]

Bits 18:19 - Port x configuration bits (x = 12)

`pub fn md12(&self) -> MD12_R`[src]

Bits 16:17 - Port x mode bits (x = 12)

`pub fn ctl11(&self) -> CTL11_R`[src]

Bits 14:15 - Port x configuration bits (x = 11)

`pub fn md11(&self) -> MD11_R`[src]

Bits 12:13 - Port x mode bits (x = 11 )

`pub fn ctl10(&self) -> CTL10_R`[src]

Bits 10:11 - Port x configuration bits (x = 10)

`pub fn md10(&self) -> MD10_R`[src]

Bits 8:9 - Port x mode bits (x = 10 )

`pub fn ctl9(&self) -> CTL9_R`[src]

Bits 6:7 - Port x configuration bits (x = 9)

`pub fn md9(&self) -> MD9_R`[src]

Bits 4:5 - Port x mode bits (x = 9)

`pub fn ctl8(&self) -> CTL8_R`[src]

Bits 2:3 - Port x configuration bits (x = 8)

`pub fn md8(&self) -> MD8_R`[src]

Bits 0:1 - Port x mode bits (x = 8)

`impl R<u32, Reg<u32, _ISTAT>>`[src]

`pub fn istat15(&self) -> ISTAT15_R`[src]

Bit 15 - Port input status

`pub fn istat14(&self) -> ISTAT14_R`[src]

Bit 14 - Port input status

`pub fn istat13(&self) -> ISTAT13_R`[src]

Bit 13 - Port input status

`pub fn istat12(&self) -> ISTAT12_R`[src]

Bit 12 - Port input status

`pub fn istat11(&self) -> ISTAT11_R`[src]

Bit 11 - Port input status

`pub fn istat10(&self) -> ISTAT10_R`[src]

Bit 10 - Port input status

`pub fn istat9(&self) -> ISTAT9_R`[src]

Bit 9 - Port input status

`pub fn istat8(&self) -> ISTAT8_R`[src]

Bit 8 - Port input status

`pub fn istat7(&self) -> ISTAT7_R`[src]

Bit 7 - Port input status

`pub fn istat6(&self) -> ISTAT6_R`[src]

Bit 6 - Port input status

`pub fn istat5(&self) -> ISTAT5_R`[src]

Bit 5 - Port input status

`pub fn istat4(&self) -> ISTAT4_R`[src]

Bit 4 - Port input status

`pub fn istat3(&self) -> ISTAT3_R`[src]

Bit 3 - Port input status

`pub fn istat2(&self) -> ISTAT2_R`[src]

Bit 2 - Port input status

`pub fn istat1(&self) -> ISTAT1_R`[src]

Bit 1 - Port input status

`pub fn istat0(&self) -> ISTAT0_R`[src]

Bit 0 - Port input status

`impl R<u32, Reg<u32, _OCTL>>`[src]

`pub fn octl15(&self) -> OCTL15_R`[src]

Bit 15 - Port output control

`pub fn octl14(&self) -> OCTL14_R`[src]

Bit 14 - Port output control

`pub fn octl13(&self) -> OCTL13_R`[src]

Bit 13 - Port output control

`pub fn octl12(&self) -> OCTL12_R`[src]

Bit 12 - Port output control

`pub fn octl11(&self) -> OCTL11_R`[src]

Bit 11 - Port output control

`pub fn octl10(&self) -> OCTL10_R`[src]

Bit 10 - Port output control

`pub fn octl9(&self) -> OCTL9_R`[src]

Bit 9 - Port output control

`pub fn octl8(&self) -> OCTL8_R`[src]

Bit 8 - Port output control

`pub fn octl7(&self) -> OCTL7_R`[src]

Bit 7 - Port output control

`pub fn octl6(&self) -> OCTL6_R`[src]

Bit 6 - Port output control

`pub fn octl5(&self) -> OCTL5_R`[src]

Bit 5 - Port output control

`pub fn octl4(&self) -> OCTL4_R`[src]

Bit 4 - Port output control

`pub fn octl3(&self) -> OCTL3_R`[src]

Bit 3 - Port output control

`pub fn octl2(&self) -> OCTL2_R`[src]

Bit 2 - Port output control

`pub fn octl1(&self) -> OCTL1_R`[src]

Bit 1 - Port output control

`pub fn octl0(&self) -> OCTL0_R`[src]

Bit 0 - Port output control

`impl R<u32, Reg<u32, _LOCK>>`[src]

`pub fn lkk(&self) -> LKK_R`[src]

Bit 16 - Lock sequence key

`pub fn lk15(&self) -> LK15_R`[src]

Bit 15 - Port Lock bit 15

`pub fn lk14(&self) -> LK14_R`[src]

Bit 14 - Port Lock bit 14

`pub fn lk13(&self) -> LK13_R`[src]

Bit 13 - Port Lock bit 13

`pub fn lk12(&self) -> LK12_R`[src]

Bit 12 - Port Lock bit 12

`pub fn lk11(&self) -> LK11_R`[src]

Bit 11 - Port Lock bit 11

`pub fn lk10(&self) -> LK10_R`[src]

Bit 10 - Port Lock bit 10

`pub fn lk9(&self) -> LK9_R`[src]

Bit 9 - Port Lock bit 9

`pub fn lk8(&self) -> LK8_R`[src]

Bit 8 - Port Lock bit 8

`pub fn lk7(&self) -> LK7_R`[src]

Bit 7 - Port Lock bit 7

`pub fn lk6(&self) -> LK6_R`[src]

Bit 6 - Port Lock bit 6

`pub fn lk5(&self) -> LK5_R`[src]

Bit 5 - Port Lock bit 5

`pub fn lk4(&self) -> LK4_R`[src]

Bit 4 - Port Lock bit 4

`pub fn lk3(&self) -> LK3_R`[src]

Bit 3 - Port Lock bit 3

`pub fn lk2(&self) -> LK2_R`[src]

Bit 2 - Port Lock bit 2

`pub fn lk1(&self) -> LK1_R`[src]

Bit 1 - Port Lock bit 1

`pub fn lk0(&self) -> LK0_R`[src]

Bit 0 - Port Lock bit 0

`impl R<u16, Reg<u16, _CTL0>>`[src]

`pub fn sreset(&self) -> SRESET_R`[src]

Bit 15 - Software reset

`pub fn salt(&self) -> SALT_R`[src]

Bit 13 - SMBus alert

`pub fn pectrans(&self) -> PECTRANS_R`[src]

Bit 12 - PEC Transfer

`pub fn poap(&self) -> POAP_R`[src]

Bit 11 - Position of ACK and PEC when receiving

`pub fn acken(&self) -> ACKEN_R`[src]

Bit 10 - Whether or not to send an ACK

`pub fn stop(&self) -> STOP_R`[src]

Bit 9 - Generate a STOP condition on I2C bus

`pub fn start(&self) -> START_R`[src]

Bit 8 - Generate a START condition on I2C bus

`pub fn ss(&self) -> SS_R`[src]

Bit 7 - Whether to stretch SCL low when data is not ready in slave mode

`pub fn gcen(&self) -> GCEN_R`[src]

Bit 6 - Whether or not to response to a General Call (0x00)

`pub fn pecen(&self) -> PECEN_R`[src]

Bit 5 - PEC Calculation Switch

`pub fn arpen(&self) -> ARPEN_R`[src]

Bit 4 - ARP protocol in SMBus switch

`pub fn smbsel(&self) -> SMBSEL_R`[src]

Bit 3 - SMBusType Selection

`pub fn smben(&self) -> SMBEN_R`[src]

Bit 1 - SMBus/I2C mode switch

`pub fn i2cen(&self) -> I2CEN_R`[src]

Bit 0 - I2C peripheral enable

`impl R<u16, Reg<u16, _CTL1>>`[src]

`pub fn dmalst(&self) -> DMALST_R`[src]

Bit 12 - Flag indicating DMA last transfer

`pub fn dmaon(&self) -> DMAON_R`[src]

Bit 11 - DMA mode switch

`pub fn bufie(&self) -> BUFIE_R`[src]

Bit 10 - Buffer interrupt enable

`pub fn evie(&self) -> EVIE_R`[src]

Bit 9 - Event interrupt enable

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 8 - Error interrupt enable

`pub fn i2cclk(&self) -> I2CCLK_R`[src]

Bits 0:5 - I2C Peripheral clock frequency

`impl R<u16, Reg<u16, _SADDR0>>`[src]

`pub fn addformat(&self) -> ADDFORMAT_R`[src]

Bit 15 - Address mode for the I2C slave

`pub fn address9_8(&self) -> ADDRESS9_8_R`[src]

Bits 8:9 - Highest two bits of a 10-bit address

`pub fn address7_1(&self) -> ADDRESS7_1_R`[src]

Bits 1:7 - 7-bit address or bits 7:1 of a 10-bit address

`pub fn address0(&self) -> ADDRESS0_R`[src]

Bit 0 - Bit 0 of a 10-bit address

`impl R<u16, Reg<u16, _SADDR1>>`[src]

`pub fn address2(&self) -> ADDRESS2_R`[src]

Bits 1:7 - Second I2C address for the slave in Dual-Address mode

`pub fn duaden(&self) -> DUADEN_R`[src]

Bit 0 - Dual-Address mode switch

`impl R<u16, Reg<u16, _DATA>>`[src]

`pub fn trb(&self) -> TRB_R`[src]

Bits 0:7 - Transmission or reception data buffer register

`impl R<u16, Reg<u16, _STAT0>>`[src]

`pub fn smbalt(&self) -> SMBALT_R`[src]

Bit 15 - SMBus Alert status

`pub fn smbto(&self) -> SMBTO_R`[src]

Bit 14 - Timeout signal in SMBus mode

`pub fn pecerr(&self) -> PECERR_R`[src]

Bit 12 - PEC error when receiving data

`pub fn ouerr(&self) -> OUERR_R`[src]

Bit 11 - Over-run or under-run situation occurs in slave mode

`pub fn aerr(&self) -> AERR_R`[src]

Bit 10 - Acknowledge error

`pub fn lostarb(&self) -> LOSTARB_R`[src]

Bit 9 - Arbitration Lost in master mode

`pub fn berr(&self) -> BERR_R`[src]

Bit 8 - A bus error occurs indication a unexpected START or STOP condition on I2C bus

`pub fn tbe(&self) -> TBE_R`[src]

Bit 7 - I2C_DATA is Empty during transmitting

`pub fn rbne(&self) -> RBNE_R`[src]

Bit 6 - I2C_DATA is not Empty during receiving

`pub fn stpdet(&self) -> STPDET_R`[src]

Bit 4 - STOP condition detected in slave mode

`pub fn add10send(&self) -> ADD10SEND_R`[src]

Bit 3 - Header of 10-bit address is sent in master mode

`pub fn btc(&self) -> BTC_R`[src]

Bit 2 - Byte transmission completed

`pub fn addsend(&self) -> ADDSEND_R`[src]

Bit 1 - Address is sent in master mode or received and matches in slave mode

`pub fn sbsend(&self) -> SBSEND_R`[src]

Bit 0 - START condition sent out in master mode

`impl R<u16, Reg<u16, _STAT1>>`[src]

`pub fn pecv(&self) -> PECV_R`[src]

Bits 8:15 - Packet Error Checking Value that calculated by hardware when PEC is enabled

`pub fn dumodf(&self) -> DUMODF_R`[src]

Bit 7 - Dual Flag in slave mode

`pub fn hstsmb(&self) -> HSTSMB_R`[src]

Bit 6 - SMBus Host Header detected in slave mode

`pub fn defsmb(&self) -> DEFSMB_R`[src]

Bit 5 - Default address of SMBusDevice

`pub fn rxgc(&self) -> RXGC_R`[src]

Bit 4 - General call address (00h) received

`pub fn tr(&self) -> TR_R`[src]

Bit 2 - Whether the I2C is a transmitter or a receiver

`pub fn i2cbsy(&self) -> I2CBSY_R`[src]

Bit 1 - Busy flag

`pub fn master(&self) -> MASTER_R`[src]

Bit 0 - A flag indicating whether I2C block is in master or slave mode

`impl R<u16, Reg<u16, _CKCFG>>`[src]

`pub fn fast(&self) -> FAST_R`[src]

Bit 15 - I2C speed selection in master mode

`pub fn dtcy(&self) -> DTCY_R`[src]

Bit 14 - Duty cycle in fast mode

`pub fn clkc(&self) -> CLKC_R`[src]

Bits 0:11 - I2C Clock control in master mode

`impl R<u16, Reg<u16, _RT>>`[src]

`pub fn risetime(&self) -> RISETIME_R`[src]

Bits 0:5 - Maximum rise time in master mode

`impl R<u16, Reg<u16, _FMPCFG>>`[src]

`pub fn fmpen(&self) -> FMPEN_R`[src]

Bit 0 - Fast mode plus enable

`impl R<u8, Reg<u8, _CLICINTIP>>`[src]

`pub fn ip(&self) -> IP_R`[src]

Bit 0 - IP

`impl R<u8, Reg<u8, _CLICINTIE>>`[src]

`pub fn ie(&self) -> IE_R`[src]

Bit 0 - IE

`impl R<u8, Reg<u8, _CLICINTATTR>>`[src]

`pub fn shv(&self) -> SHV_R`[src]

Bit 0 - SHV

`pub fn trig(&self) -> TRIG_R`[src]

Bits 1:2 - TRIG

`impl R<u8, Reg<u8, _CLICINTCTL>>`[src]

`pub fn level_priority(&self) -> LEVEL_PRIORITY_R`[src]

Bits 0:7 - LEVEL_PRIORITY

`impl R<u8, Reg<u8, _CLICCFG>>`[src]

`pub fn nlbits(&self) -> NLBITS_R`[src]

Bits 1:4 - NLBITS

`impl R<u32, Reg<u32, _CLICINFO>>`[src]

`pub fn num_interrupt(&self) -> NUM_INTERRUPT_R`[src]

Bits 0:12 - NUM_INTERRUPT

`pub fn version(&self) -> VERSION_R`[src]

Bits 13:20 - VERSION

`pub fn clicintctlbits(&self) -> CLICINTCTLBITS_R`[src]

Bits 21:24 - CLICINTCTLBITS

`impl R<u8, Reg<u8, _MTH>>`[src]

`pub fn mth(&self) -> MTH_R`[src]

Bits 0:7 - MTH

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn bkpwen(&self) -> BKPWEN_R`[src]

Bit 8 - Backup Domain Write Enable

`pub fn lvdt(&self) -> LVDT_R`[src]

Bits 5:7 - Low Voltage Detector Threshold

`pub fn lvden(&self) -> LVDEN_R`[src]

Bit 4 - Low Voltage Detector Enable

`pub fn stbrst(&self) -> STBRST_R`[src]

Bit 3 - Standby Flag Reset

`pub fn wurst(&self) -> WURST_R`[src]

Bit 2 - Wakeup Flag Reset

`pub fn stbmod(&self) -> STBMOD_R`[src]

Bit 1 - Standby Mode

`pub fn ldolp(&self) -> LDOLP_R`[src]

Bit 0 - LDO Low Power Mode

`impl R<u32, Reg<u32, _CS>>`[src]

`pub fn wupen(&self) -> WUPEN_R`[src]

Bit 8 - Enable WKUP pin

`pub fn lvdf(&self) -> LVDF_R`[src]

Bit 2 - Low Voltage Detector Status Flag

`pub fn stbf(&self) -> STBF_R`[src]

Bit 1 - Standby flag

`pub fn wuf(&self) -> WUF_R`[src]

Bit 0 - Wakeup flag

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn irc8men(&self) -> IRC8MEN_R`[src]

Bit 0 - Internal 8MHz RC oscillator Enable

`pub fn irc8mstb(&self) -> IRC8MSTB_R`[src]

Bit 1 - IRC8M Internal 8MHz RC Oscillator stabilization Flag

`pub fn irc8madj(&self) -> IRC8MADJ_R`[src]

Bits 3:7 - Internal 8MHz RC Oscillator clock trim adjust value

`pub fn irc8mcalib(&self) -> IRC8MCALIB_R`[src]

Bits 8:15 - Internal 8MHz RC Oscillator calibration value register

`pub fn hxtalen(&self) -> HXTALEN_R`[src]

Bit 16 - External High Speed oscillator Enable

`pub fn hxtalstb(&self) -> HXTALSTB_R`[src]

Bit 17 - External crystal oscillator (HXTAL) clock stabilization flag

`pub fn hxtalbps(&self) -> HXTALBPS_R`[src]

Bit 18 - External crystal oscillator (HXTAL) clock bypass mode enable

`pub fn ckmen(&self) -> CKMEN_R`[src]

Bit 19 - HXTAL Clock Monitor Enable

`pub fn pllen(&self) -> PLLEN_R`[src]

Bit 24 - PLL enable

`pub fn pllstb(&self) -> PLLSTB_R`[src]

Bit 25 - PLL Clock Stabilization Flag

`pub fn pll1en(&self) -> PLL1EN_R`[src]

Bit 26 - PLL1 enable

`pub fn pll1stb(&self) -> PLL1STB_R`[src]

Bit 27 - PLL1 Clock Stabilization Flag

`pub fn pll2en(&self) -> PLL2EN_R`[src]

Bit 28 - PLL2 enable

`pub fn pll2stb(&self) -> PLL2STB_R`[src]

Bit 29 - PLL2 Clock Stabilization Flag

`impl R<u32, Reg<u32, _CFG0>>`[src]

`pub fn scs(&self) -> SCS_R`[src]

Bits 0:1 - System clock switch

`pub fn scss(&self) -> SCSS_R`[src]

Bits 2:3 - System clock switch status

`pub fn ahbpsc(&self) -> AHBPSC_R`[src]

Bits 4:7 - AHB prescaler selection

`pub fn apb1psc(&self) -> APB1PSC_R`[src]

Bits 8:10 - APB1 prescaler selection

`pub fn apb2psc(&self) -> APB2PSC_R`[src]

Bits 11:13 - APB2 prescaler selection

`pub fn adcpsc_1_0(&self) -> ADCPSC_1_0_R`[src]

Bits 14:15 - ADC clock prescaler selection

`pub fn pllsel(&self) -> PLLSEL_R`[src]

Bit 16 - PLL Clock Source Selection

`pub fn predv0_lsb(&self) -> PREDV0_LSB_R`[src]

Bit 17 - The LSB of PREDV0 division factor

`pub fn pllmf_3_0(&self) -> PLLMF_3_0_R`[src]

Bits 18:21 - The PLL clock multiplication factor

`pub fn usbfspsc(&self) -> USBFSPSC_R`[src]

Bits 22:23 - USBFS clock prescaler selection

`pub fn ckout0sel(&self) -> CKOUT0SEL_R`[src]

Bits 24:27 - CKOUT0 Clock Source Selection

`pub fn adcpsc_2(&self) -> ADCPSC_2_R`[src]

Bit 28 - Bit 2 of ADCPSC

`pub fn pllmf_4(&self) -> PLLMF_4_R`[src]

Bit 29 - Bit 4 of PLLMF

`impl R<u32, Reg<u32, _INT>>`[src]

`pub fn irc40kstbif(&self) -> IRC40KSTBIF_R`[src]

Bit 0 - IRC40K stabilization interrupt flag

`pub fn lxtalstbif(&self) -> LXTALSTBIF_R`[src]

Bit 1 - LXTAL stabilization interrupt flag

`pub fn irc8mstbif(&self) -> IRC8MSTBIF_R`[src]

Bit 2 - IRC8M stabilization interrupt flag

`pub fn hxtalstbif(&self) -> HXTALSTBIF_R`[src]

Bit 3 - HXTAL stabilization interrupt flag

`pub fn pllstbif(&self) -> PLLSTBIF_R`[src]

Bit 4 - PLL stabilization interrupt flag

`pub fn pll1stbif(&self) -> PLL1STBIF_R`[src]

Bit 5 - PLL1 stabilization interrupt flag

`pub fn pll2stbif(&self) -> PLL2STBIF_R`[src]

Bit 6 - PLL2 stabilization interrupt flag

`pub fn ckmif(&self) -> CKMIF_R`[src]

Bit 7 - HXTAL Clock Stuck Interrupt Flag

`pub fn irc40kstbie(&self) -> IRC40KSTBIE_R`[src]

Bit 8 - IRC40K Stabilization interrupt enable

`pub fn lxtalstbie(&self) -> LXTALSTBIE_R`[src]

Bit 9 - LXTAL Stabilization Interrupt Enable

`pub fn irc8mstbie(&self) -> IRC8MSTBIE_R`[src]

Bit 10 - IRC8M Stabilization Interrupt Enable

`pub fn hxtalstbie(&self) -> HXTALSTBIE_R`[src]

Bit 11 - HXTAL Stabilization Interrupt Enable

`pub fn pllstbie(&self) -> PLLSTBIE_R`[src]

Bit 12 - PLL Stabilization Interrupt Enable

`pub fn pll1stbie(&self) -> PLL1STBIE_R`[src]

Bit 13 - PLL1 Stabilization Interrupt Enable

`pub fn pll2stbie(&self) -> PLL2STBIE_R`[src]

Bit 14 - PLL2 Stabilization Interrupt Enable

`impl R<u32, Reg<u32, _APB2RST>>`[src]

`pub fn afrst(&self) -> AFRST_R`[src]

Bit 0 - Alternate function I/O reset

`pub fn parst(&self) -> PARST_R`[src]

Bit 2 - GPIO port A reset

`pub fn pbrst(&self) -> PBRST_R`[src]

Bit 3 - GPIO port B reset

`pub fn pcrst(&self) -> PCRST_R`[src]

Bit 4 - GPIO port C reset

`pub fn pdrst(&self) -> PDRST_R`[src]

Bit 5 - GPIO port D reset

`pub fn perst(&self) -> PERST_R`[src]

Bit 6 - GPIO port E reset

`pub fn adc0rst(&self) -> ADC0RST_R`[src]

Bit 9 - ADC0 reset

`pub fn adc1rst(&self) -> ADC1RST_R`[src]

Bit 10 - ADC1 reset

`pub fn timer0rst(&self) -> TIMER0RST_R`[src]

Bit 11 - Timer 0 reset

`pub fn spi0rst(&self) -> SPI0RST_R`[src]

Bit 12 - SPI0 reset

`pub fn usart0rst(&self) -> USART0RST_R`[src]

Bit 14 - USART0 Reset

`impl R<u32, Reg<u32, _APB1RST>>`[src]

`pub fn timer1rst(&self) -> TIMER1RST_R`[src]

Bit 0 - TIMER1 timer reset

`pub fn timer2rst(&self) -> TIMER2RST_R`[src]

Bit 1 - TIMER2 timer reset

`pub fn timer3rst(&self) -> TIMER3RST_R`[src]

Bit 2 - TIMER3 timer reset

`pub fn timer4rst(&self) -> TIMER4RST_R`[src]

Bit 3 - TIMER4 timer reset

`pub fn timer5rst(&self) -> TIMER5RST_R`[src]

Bit 4 - TIMER5 timer reset

`pub fn timer6rst(&self) -> TIMER6RST_R`[src]

Bit 5 - TIMER6 timer reset

`pub fn wwdgtrst(&self) -> WWDGTRST_R`[src]

Bit 11 - Window watchdog timer reset

`pub fn spi1rst(&self) -> SPI1RST_R`[src]

Bit 14 - SPI1 reset

`pub fn spi2rst(&self) -> SPI2RST_R`[src]

Bit 15 - SPI2 reset

`pub fn usart1rst(&self) -> USART1RST_R`[src]

Bit 17 - USART1 reset

`pub fn usart2rst(&self) -> USART2RST_R`[src]

Bit 18 - USART2 reset

`pub fn uart3rst(&self) -> UART3RST_R`[src]

Bit 19 - UART3 reset

`pub fn uart4rst(&self) -> UART4RST_R`[src]

Bit 20 - UART4 reset

`pub fn i2c0rst(&self) -> I2C0RST_R`[src]

Bit 21 - I2C0 reset

`pub fn i2c1rst(&self) -> I2C1RST_R`[src]

Bit 22 - I2C1 reset

`pub fn can0rst(&self) -> CAN0RST_R`[src]

Bit 25 - CAN0 reset

`pub fn can1rst(&self) -> CAN1RST_R`[src]

Bit 26 - CAN1 reset

`pub fn bkpirst(&self) -> BKPIRST_R`[src]

Bit 27 - Backup interface reset

`pub fn pmurst(&self) -> PMURST_R`[src]

Bit 28 - Power control reset

`pub fn dacrst(&self) -> DACRST_R`[src]

Bit 29 - DAC reset

`impl R<u32, Reg<u32, _AHBEN>>`[src]

`pub fn dma0en(&self) -> DMA0EN_R`[src]

Bit 0 - DMA0 clock enable

`pub fn dma1en(&self) -> DMA1EN_R`[src]

Bit 1 - DMA1 clock enable

`pub fn sramspen(&self) -> SRAMSPEN_R`[src]

Bit 2 - SRAM interface clock enable when sleep mode

`pub fn fmcspen(&self) -> FMCSPEN_R`[src]

Bit 4 - FMC clock enable when sleep mode

`pub fn crcen(&self) -> CRCEN_R`[src]

Bit 6 - CRC clock enable

`pub fn exmcen(&self) -> EXMCEN_R`[src]

Bit 8 - EXMC clock enable

`pub fn usbfsen(&self) -> USBFSEN_R`[src]

Bit 12 - USBFS clock enable

`impl R<u32, Reg<u32, _APB2EN>>`[src]

`pub fn afen(&self) -> AFEN_R`[src]

Bit 0 - Alternate function IO clock enable

`pub fn paen(&self) -> PAEN_R`[src]

Bit 2 - GPIO port A clock enable

`pub fn pben(&self) -> PBEN_R`[src]

Bit 3 - GPIO port B clock enable

`pub fn pcen(&self) -> PCEN_R`[src]

Bit 4 - GPIO port C clock enable

`pub fn pden(&self) -> PDEN_R`[src]

Bit 5 - GPIO port D clock enable

`pub fn peen(&self) -> PEEN_R`[src]

Bit 6 - GPIO port E clock enable

`pub fn adc0en(&self) -> ADC0EN_R`[src]

Bit 9 - ADC0 clock enable

`pub fn adc1en(&self) -> ADC1EN_R`[src]

Bit 10 - ADC1 clock enable

`pub fn timer0en(&self) -> TIMER0EN_R`[src]

Bit 11 - TIMER0 clock enable

`pub fn spi0en(&self) -> SPI0EN_R`[src]

Bit 12 - SPI0 clock enable

`pub fn usart0en(&self) -> USART0EN_R`[src]

Bit 14 - USART0 clock enable

`impl R<u32, Reg<u32, _APB1EN>>`[src]

`pub fn timer1en(&self) -> TIMER1EN_R`[src]

Bit 0 - TIMER1 timer clock enable

`pub fn timer2en(&self) -> TIMER2EN_R`[src]

Bit 1 - TIMER2 timer clock enable

`pub fn timer3en(&self) -> TIMER3EN_R`[src]

Bit 2 - TIMER3 timer clock enable

`pub fn timer4en(&self) -> TIMER4EN_R`[src]

Bit 3 - TIMER4 timer clock enable

`pub fn timer5en(&self) -> TIMER5EN_R`[src]

Bit 4 - TIMER5 timer clock enable

`pub fn timer6en(&self) -> TIMER6EN_R`[src]

Bit 5 - TIMER6 timer clock enable

`pub fn wwdgten(&self) -> WWDGTEN_R`[src]

Bit 11 - Window watchdog timer clock enable

`pub fn spi1en(&self) -> SPI1EN_R`[src]

Bit 14 - SPI1 clock enable

`pub fn spi2en(&self) -> SPI2EN_R`[src]

Bit 15 - SPI2 clock enable

`pub fn usart1en(&self) -> USART1EN_R`[src]

Bit 17 - USART1 clock enable

`pub fn usart2en(&self) -> USART2EN_R`[src]

Bit 18 - USART2 clock enable

`pub fn uart3en(&self) -> UART3EN_R`[src]

Bit 19 - UART3 clock enable

`pub fn uart4en(&self) -> UART4EN_R`[src]

Bit 20 - UART4 clock enable

`pub fn i2c0en(&self) -> I2C0EN_R`[src]

Bit 21 - I2C0 clock enable

`pub fn i2c1en(&self) -> I2C1EN_R`[src]

Bit 22 - I2C1 clock enable

`pub fn can0en(&self) -> CAN0EN_R`[src]

Bit 25 - CAN0 clock enable

`pub fn can1en(&self) -> CAN1EN_R`[src]

Bit 26 - CAN1 clock enable

`pub fn bkpien(&self) -> BKPIEN_R`[src]

Bit 27 - Backup interface clock enable

`pub fn pmuen(&self) -> PMUEN_R`[src]

Bit 28 - Power control clock enable

`pub fn dacen(&self) -> DACEN_R`[src]

Bit 29 - DAC clock enable

`impl R<u32, Reg<u32, _BDCTL>>`[src]

`pub fn lxtalen(&self) -> LXTALEN_R`[src]

Bit 0 - LXTAL enable

`pub fn lxtalstb(&self) -> LXTALSTB_R`[src]

Bit 1 - External low-speed oscillator stabilization

`pub fn lxtalbps(&self) -> LXTALBPS_R`[src]

Bit 2 - LXTAL bypass mode enable

`pub fn rtcsrc(&self) -> RTCSRC_R`[src]

Bits 8:9 - RTC clock entry selection

`pub fn rtcen(&self) -> RTCEN_R`[src]

Bit 15 - RTC clock enable

`pub fn bkprst(&self) -> BKPRST_R`[src]

Bit 16 - Backup domain reset

`impl R<u32, Reg<u32, _RSTSCK>>`[src]

`pub fn irc40ken(&self) -> IRC40KEN_R`[src]

Bit 0 - IRC40K enable

`pub fn irc40kstb(&self) -> IRC40KSTB_R`[src]

Bit 1 - IRC40K stabilization

`pub fn rstfc(&self) -> RSTFC_R`[src]

Bit 24 - Reset flag clear

`pub fn eprstf(&self) -> EPRSTF_R`[src]

Bit 26 - External PIN reset flag

`pub fn porrstf(&self) -> PORRSTF_R`[src]

Bit 27 - Power reset flag

`pub fn swrstf(&self) -> SWRSTF_R`[src]

Bit 28 - Software reset flag

`pub fn fwdgtrstf(&self) -> FWDGTRSTF_R`[src]

Bit 29 - Free Watchdog timer reset flag

`pub fn wwdgtrstf(&self) -> WWDGTRSTF_R`[src]

Bit 30 - Window watchdog timer reset flag

`pub fn lprstf(&self) -> LPRSTF_R`[src]

Bit 31 - Low-power reset flag

`impl R<u32, Reg<u32, _AHBRST>>`[src]

`pub fn usbfsrst(&self) -> USBFSRST_R`[src]

Bit 12 - USBFS reset

`impl R<u32, Reg<u32, _CFG1>>`[src]

`pub fn predv0(&self) -> PREDV0_R`[src]

Bits 0:3 - PREDV0 division factor

`pub fn predv1(&self) -> PREDV1_R`[src]

Bits 4:7 - PREDV1 division factor

`pub fn pll1mf(&self) -> PLL1MF_R`[src]

Bits 8:11 - The PLL1 clock multiplication factor

`pub fn pll2mf(&self) -> PLL2MF_R`[src]

Bits 12:15 - The PLL2 clock multiplication factor

`pub fn predv0sel(&self) -> PREDV0SEL_R`[src]

Bit 16 - PREDV0 input Clock Source Selection

`pub fn i2s1sel(&self) -> I2S1SEL_R`[src]

Bit 17 - I2S1 Clock Source Selection

`pub fn i2s2sel(&self) -> I2S2SEL_R`[src]

Bit 18 - I2S2 Clock Source Selection

`impl R<u32, Reg<u32, _DSV>>`[src]

`pub fn dslpvs(&self) -> DSLPVS_R`[src]

Bits 0:1 - Deep-sleep mode voltage select

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn ovie(&self) -> OVIE_R`[src]

Bit 2 - Overflow interrupt enable

`pub fn alrmie(&self) -> ALRMIE_R`[src]

Bit 1 - Alarm interrupt enable

`pub fn scie(&self) -> SCIE_R`[src]

Bit 0 - Second interrupt

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn lwoff(&self) -> LWOFF_R`[src]

Bit 5 - Last write operation finished flag

`pub fn cmf(&self) -> CMF_R`[src]

Bit 4 - Configuration mode flag

`pub fn rsynf(&self) -> RSYNF_R`[src]

Bit 3 - Registers synchronized flag

`pub fn ovif(&self) -> OVIF_R`[src]

Bit 2 - Overflow interrupt flag

`pub fn alrmif(&self) -> ALRMIF_R`[src]

Bit 1 - Alarm interrupt flag

`pub fn scif(&self) -> SCIF_R`[src]

Bit 0 - Sencond interrupt flag

`impl R<u32, Reg<u32, _DIVH>>`[src]

`pub fn div(&self) -> DIV_R`[src]

Bits 0:3 - RTC divider value high

`impl R<u32, Reg<u32, _DIVL>>`[src]

`pub fn div(&self) -> DIV_R`[src]

Bits 0:15 - RTC divider value low

`impl R<u32, Reg<u32, _CNTH>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - RTC counter value high

`impl R<u32, Reg<u32, _CNTL>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - RTC counter value low

`impl R<u16, Reg<u16, _CTL0>>`[src]

`pub fn bden(&self) -> BDEN_R`[src]

Bit 15 - Bidirectional enable

`pub fn bdoen(&self) -> BDOEN_R`[src]

Bit 14 - Bidirectional Transmit output enable

`pub fn crcen(&self) -> CRCEN_R`[src]

Bit 13 - CRC Calculation Enable

`pub fn crcnt(&self) -> CRCNT_R`[src]

Bit 12 - CRC Next Transfer

`pub fn ff16(&self) -> FF16_R`[src]

Bit 11 - Data frame format

`pub fn ro(&self) -> RO_R`[src]

Bit 10 - Receive only

`pub fn swnssen(&self) -> SWNSSEN_R`[src]

Bit 9 - NSS Software Mode Selection

`pub fn swnss(&self) -> SWNSS_R`[src]

Bit 8 - NSS Pin Selection In NSS Software Mode

`pub fn lf(&self) -> LF_R`[src]

Bit 7 - LSB First Mode

`pub fn spien(&self) -> SPIEN_R`[src]

Bit 6 - SPI enable

`pub fn psc(&self) -> PSC_R`[src]

Bits 3:5 - Master Clock Prescaler Selection

`pub fn mstmod(&self) -> MSTMOD_R`[src]

Bit 2 - Master Mode Enable

`pub fn ckpl(&self) -> CKPL_R`[src]

Bit 1 - Clock polarity Selection

`pub fn ckph(&self) -> CKPH_R`[src]

Bit 0 - Clock Phase Selection

`impl R<u16, Reg<u16, _CTL1>>`[src]

`pub fn tbeie(&self) -> TBEIE_R`[src]

Bit 7 - Tx buffer empty interrupt enable

`pub fn rbneie(&self) -> RBNEIE_R`[src]

Bit 6 - RX buffer not empty interrupt enable

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 5 - Error interrupt enable

`pub fn tmod(&self) -> TMOD_R`[src]

Bit 4 - SPI TI mode enable

`pub fn nssp(&self) -> NSSP_R`[src]

Bit 3 - SPI NSS pulse mode enable

`pub fn nssdrv(&self) -> NSSDRV_R`[src]

Bit 2 - Drive NSS Output

`pub fn dmaten(&self) -> DMATEN_R`[src]

Bit 1 - Transmit Buffer DMA Enable

`pub fn dmaren(&self) -> DMAREN_R`[src]

Bit 0 - Rx buffer DMA enable

`impl R<u16, Reg<u16, _STAT>>`[src]

`pub fn ferr(&self) -> FERR_R`[src]

Bit 8 - Format error

`pub fn trans(&self) -> TRANS_R`[src]

Bit 7 - Transmitting On-going Bit

`pub fn rxorerr(&self) -> RXORERR_R`[src]

Bit 6 - Reception Overrun Error Bit

`pub fn conferr(&self) -> CONFERR_R`[src]

Bit 5 - SPI Configuration error

`pub fn crcerr(&self) -> CRCERR_R`[src]

Bit 4 - SPI CRC Error Bit

`pub fn txurerr(&self) -> TXURERR_R`[src]

Bit 3 - Transmission underrun error bit

`pub fn i2sch(&self) -> I2SCH_R`[src]

Bit 2 - I2S channel side

`pub fn tbe(&self) -> TBE_R`[src]

Bit 1 - Transmit Buffer Empty

`pub fn rbne(&self) -> RBNE_R`[src]

Bit 0 - Receive Buffer Not Empty

`impl R<u16, Reg<u16, _DATA>>`[src]

`pub fn spi_data(&self) -> SPI_DATA_R`[src]

Bits 0:15 - Data transfer register

`impl R<u16, Reg<u16, _CRCPOLY>>`[src]

`pub fn crcpoly(&self) -> CRCPOLY_R`[src]

Bits 0:15 - CRC polynomial value

`impl R<u16, Reg<u16, _RCRC>>`[src]

`pub fn rcrc(&self) -> RCRC_R`[src]

Bits 0:15 - RX CRC value

`impl R<u16, Reg<u16, _TCRC>>`[src]

`pub fn tcrc(&self) -> TCRC_R`[src]

Bits 0:15 - Tx CRC value

`impl R<u16, Reg<u16, _I2SCTL>>`[src]

`pub fn i2ssel(&self) -> I2SSEL_R`[src]

Bit 11 - I2S mode selection

`pub fn i2sen(&self) -> I2SEN_R`[src]

Bit 10 - I2S Enable

`pub fn i2sopmod(&self) -> I2SOPMOD_R`[src]

Bits 8:9 - I2S operation mode

`pub fn pcmsmod(&self) -> PCMSMOD_R`[src]

Bit 7 - PCM frame synchronization mode

`pub fn i2sstd(&self) -> I2SSTD_R`[src]

Bits 4:5 - I2S standard selection

`pub fn ckpl(&self) -> CKPL_R`[src]

Bit 3 - Idle state clock polarity

`pub fn dtlen(&self) -> DTLEN_R`[src]

Bits 1:2 - Data length

`pub fn chlen(&self) -> CHLEN_R`[src]

Bit 0 - Channel length (number of bits per audio channel)

`impl R<u16, Reg<u16, _I2SPSC>>`[src]

`pub fn mckoen(&self) -> MCKOEN_R`[src]

Bit 9 - I2S_MCK output enable

`pub fn of(&self) -> OF_R`[src]

Bit 8 - Odd factor for the prescaler

`pub fn div(&self) -> DIV_R`[src]

Bits 0:7 - Dividing factor for the prescaler

`impl R<u16, Reg<u16, _CTL0>>`[src]

`pub fn ckdiv(&self) -> CKDIV_R`[src]

Bits 8:9 - Clock division

`pub fn arse(&self) -> ARSE_R`[src]

Bit 7 - Auto-reload shadow enable

`pub fn cam(&self) -> CAM_R`[src]

Bits 5:6 - Counter aligns mode selection

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Direction

`pub fn spm(&self) -> SPM_R`[src]

Bit 3 - Single pulse mode

`pub fn ups(&self) -> UPS_R`[src]

Bit 2 - Update source

`pub fn updis(&self) -> UPDIS_R`[src]

Bit 1 - Update disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 0 - Counter enable

`impl R<u16, Reg<u16, _CTL1>>`[src]

`pub fn iso3(&self) -> ISO3_R`[src]

Bit 14 - Idle state of channel 3 output

`pub fn iso2n(&self) -> ISO2N_R`[src]

Bit 13 - Idle state of channel 2 complementary output

`pub fn iso2(&self) -> ISO2_R`[src]

Bit 12 - Idle state of channel 2 output

`pub fn iso1n(&self) -> ISO1N_R`[src]

Bit 11 - Idle state of channel 1 complementary output

`pub fn iso1(&self) -> ISO1_R`[src]

Bit 10 - Idle state of channel 1 output

`pub fn iso0n(&self) -> ISO0N_R`[src]

Bit 9 - Idle state of channel 0 complementary output

`pub fn iso0(&self) -> ISO0_R`[src]

Bit 8 - Idle state of channel 0 output

`pub fn ti0s(&self) -> TI0S_R`[src]

Bit 7 - Channel 0 trigger input selection

`pub fn mmc(&self) -> MMC_R`[src]

Bits 4:6 - Master mode control

`pub fn dmas(&self) -> DMAS_R`[src]

Bit 3 - DMA request source selection

`pub fn ccuc(&self) -> CCUC_R`[src]

Bit 2 - Commutation control shadow register update control

`pub fn ccse(&self) -> CCSE_R`[src]

Bit 0 - Commutation control shadow enable

`impl R<u16, Reg<u16, _SMCFG>>`[src]

`pub fn etp(&self) -> ETP_R`[src]

Bit 15 - External trigger polarity

`pub fn smc1(&self) -> SMC1_R`[src]

Bit 14 - Part of SMC for enable External clock mode1

`pub fn etpsc(&self) -> ETPSC_R`[src]

Bits 12:13 - External trigger prescaler

`pub fn etfc(&self) -> ETFC_R`[src]

Bits 8:11 - External trigger filter control

`pub fn msm(&self) -> MSM_R`[src]

Bit 7 - Master/Slave mode

`pub fn trgs(&self) -> TRGS_R`[src]

Bits 4:6 - Trigger selection

`pub fn smc(&self) -> SMC_R`[src]

Bits 0:2 - Slave mode selection

`impl R<u16, Reg<u16, _DMAINTEN>>`[src]

`pub fn trgden(&self) -> TRGDEN_R`[src]

Bit 14 - Trigger DMA request enable

`pub fn cmtden(&self) -> CMTDEN_R`[src]

Bit 13 - Commutation DMA request enable

`pub fn ch3den(&self) -> CH3DEN_R`[src]

Bit 12 - Channel 3 capture/compare DMA request enable

`pub fn ch2den(&self) -> CH2DEN_R`[src]

Bit 11 - Channel 2 capture/compare DMA request enable

`pub fn ch1den(&self) -> CH1DEN_R`[src]

Bit 10 - Channel 1 capture/compare DMA request enable

`pub fn ch0den(&self) -> CH0DEN_R`[src]

Bit 9 - Channel 0 capture/compare DMA request enable

`pub fn upden(&self) -> UPDEN_R`[src]

Bit 8 - Update DMA request enable

`pub fn brkie(&self) -> BRKIE_R`[src]

Bit 7 - Break interrupt enable

`pub fn trgie(&self) -> TRGIE_R`[src]

Bit 6 - Trigger interrupt enable

`pub fn cmtie(&self) -> CMTIE_R`[src]

Bit 5 - commutation interrupt enable

`pub fn ch3ie(&self) -> CH3IE_R`[src]

Bit 4 - Channel 3 capture/compare interrupt enable

`pub fn ch2ie(&self) -> CH2IE_R`[src]

Bit 3 - Channel 2 capture/compare interrupt enable

`pub fn ch1ie(&self) -> CH1IE_R`[src]

Bit 2 - Channel 1 capture/compare interrupt enable

`pub fn ch0ie(&self) -> CH0IE_R`[src]

Bit 1 - Channel 0 capture/compare interrupt enable

`pub fn upie(&self) -> UPIE_R`[src]

Bit 0 - Update interrupt enable

`impl R<u16, Reg<u16, _INTF>>`[src]

`pub fn ch3of(&self) -> CH3OF_R`[src]

Bit 12 - Channel 3 over capture flag

`pub fn ch2of(&self) -> CH2OF_R`[src]

Bit 11 - Channel 2 over capture flag

`pub fn ch1of(&self) -> CH1OF_R`[src]

Bit 10 - Channel 1 over capture flag

`pub fn ch0of(&self) -> CH0OF_R`[src]

Bit 9 - Channel 0 over capture flag

`pub fn brkif(&self) -> BRKIF_R`[src]

Bit 7 - Break interrupt flag

`pub fn trgif(&self) -> TRGIF_R`[src]

Bit 6 - Trigger interrupt flag

`pub fn cmtif(&self) -> CMTIF_R`[src]

Bit 5 - Channel commutation interrupt flag

`pub fn ch3if(&self) -> CH3IF_R`[src]

Bit 4 - Channel 3 capture/compare interrupt flag

`pub fn ch2if(&self) -> CH2IF_R`[src]

Bit 3 - Channel 2 capture/compare interrupt flag

`pub fn ch1if(&self) -> CH1IF_R`[src]

Bit 2 - Channel 1 capture/compare interrupt flag

`pub fn ch0if(&self) -> CH0IF_R`[src]

Bit 1 - Channel 0 capture/compare interrupt flag

`pub fn upif(&self) -> UPIF_R`[src]

Bit 0 - Update interrupt flag

`impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>`[src]

`pub fn ch1comcen(&self) -> CH1COMCEN_R`[src]

Bit 15 - Channel 1 output compare clear enable

`pub fn ch1comctl(&self) -> CH1COMCTL_R`[src]

Bits 12:14 - Channel 1 compare output control

`pub fn ch1comsen(&self) -> CH1COMSEN_R`[src]

Bit 11 - Channel 1 output compare shadow enable

`pub fn ch1comfen(&self) -> CH1COMFEN_R`[src]

Bit 10 - Channel 1 output compare fast enable

`pub fn ch1ms(&self) -> CH1MS_R`[src]

Bits 8:9 - Channel 1 mode selection

`pub fn ch0comcen(&self) -> CH0COMCEN_R`[src]

Bit 7 - Channel 0 output compare clear enable

`pub fn ch0comctl(&self) -> CH0COMCTL_R`[src]

Bits 4:6 - Channel 0 compare output control

`pub fn ch0comsen(&self) -> CH0COMSEN_R`[src]

Bit 3 - Channel 0 compare output shadow enable

`pub fn ch0comfen(&self) -> CH0COMFEN_R`[src]

Bit 2 - Channel 0 output compare fast enable

`pub fn ch0ms(&self) -> CH0MS_R`[src]

Bits 0:1 - Channel 0 I/O mode selection

`impl R<u16, Reg<u16, _CHCTL0_INPUT>>`[src]

`pub fn ch1capflt(&self) -> CH1CAPFLT_R`[src]

Bits 12:15 - Channel 1 input capture filter control

`pub fn ch1cappsc(&self) -> CH1CAPPSC_R`[src]

Bits 10:11 - Channel 1 input capture prescaler

`pub fn ch1ms(&self) -> CH1MS_R`[src]

Bits 8:9 - Channel 1 mode selection

`pub fn ch0capflt(&self) -> CH0CAPFLT_R`[src]

Bits 4:7 - Channel 0 input capture filter control

`pub fn ch0cappsc(&self) -> CH0CAPPSC_R`[src]

Bits 2:3 - Channel 0 input capture prescaler

`pub fn ch0ms(&self) -> CH0MS_R`[src]

Bits 0:1 - Channel 0 mode selection

`impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>`[src]

`pub fn ch3comcen(&self) -> CH3COMCEN_R`[src]

Bit 15 - Channel 3 output compare clear enable

`pub fn ch3comctl(&self) -> CH3COMCTL_R`[src]

Bits 12:14 - Channel 3 compare output control

`pub fn ch3comsen(&self) -> CH3COMSEN_R`[src]

Bit 11 - Channel 3 output compare shadow enable

`pub fn ch3comfen(&self) -> CH3COMFEN_R`[src]

Bit 10 - Channel 3 output compare fast enable

`pub fn ch3ms(&self) -> CH3MS_R`[src]

Bits 8:9 - Channel 3 mode selection

`pub fn ch2comcen(&self) -> CH2COMCEN_R`[src]

Bit 7 - Channel 2 output compare clear enable

`pub fn ch2comctl(&self) -> CH2COMCTL_R`[src]

Bits 4:6 - Channel 2 compare output control

`pub fn ch2comsen(&self) -> CH2COMSEN_R`[src]

Bit 3 - Channel 2 compare output shadow enable

`pub fn ch2comfen(&self) -> CH2COMFEN_R`[src]

Bit 2 - Channel 2 output compare fast enable

`pub fn ch2ms(&self) -> CH2MS_R`[src]

Bits 0:1 - Channel 2 I/O mode selection

`impl R<u16, Reg<u16, _CHCTL1_INPUT>>`[src]

`pub fn ch3capflt(&self) -> CH3CAPFLT_R`[src]

Bits 12:15 - Channel 3 input capture filter control

`pub fn ch3cappsc(&self) -> CH3CAPPSC_R`[src]

Bits 10:11 - Channel 3 input capture prescaler

`pub fn ch3ms(&self) -> CH3MS_R`[src]

Bits 8:9 - Channel 3 mode selection

`pub fn ch2capflt(&self) -> CH2CAPFLT_R`[src]

Bits 4:7 - Channel 2 input capture filter control

`pub fn ch2cappsc(&self) -> CH2CAPPSC_R`[src]

Bits 2:3 - Channel 2 input capture prescaler

`pub fn ch2ms(&self) -> CH2MS_R`[src]

Bits 0:1 - Channel 2 mode selection

`impl R<u16, Reg<u16, _CHCTL2>>`[src]

`pub fn ch3p(&self) -> CH3P_R`[src]

Bit 13 - Channel 3 capture/compare function polarity

`pub fn ch3en(&self) -> CH3EN_R`[src]

Bit 12 - Channel 3 capture/compare function enable

`pub fn ch2np(&self) -> CH2NP_R`[src]

Bit 11 - Channel 2 complementary output polarity

`pub fn ch2nen(&self) -> CH2NEN_R`[src]

Bit 10 - Channel 2 complementary output enable

`pub fn ch2p(&self) -> CH2P_R`[src]

Bit 9 - Channel 2 capture/compare function polarity

`pub fn ch2en(&self) -> CH2EN_R`[src]

Bit 8 - Channel 2 capture/compare function enable

`pub fn ch1np(&self) -> CH1NP_R`[src]

Bit 7 - Channel 1 complementary output polarity

`pub fn ch1nen(&self) -> CH1NEN_R`[src]

Bit 6 - Channel 1 complementary output enable

`pub fn ch1p(&self) -> CH1P_R`[src]

Bit 5 - Channel 1 capture/compare function polarity

`pub fn ch1en(&self) -> CH1EN_R`[src]

Bit 4 - Channel 1 capture/compare function enable

`pub fn ch0np(&self) -> CH0NP_R`[src]

Bit 3 - Channel 0 complementary output polarity

`pub fn ch0nen(&self) -> CH0NEN_R`[src]

Bit 2 - Channel 0 complementary output enable

`pub fn ch0p(&self) -> CH0P_R`[src]

Bit 1 - Channel 0 capture/compare function polarity

`pub fn ch0en(&self) -> CH0EN_R`[src]

Bit 0 - Channel 0 capture/compare function enable

`impl R<u16, Reg<u16, _CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - current counter value

`impl R<u16, Reg<u16, _PSC>>`[src]

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:15 - Prescaler value of the counter clock

`impl R<u16, Reg<u16, _CAR>>`[src]

`pub fn carl(&self) -> CARL_R`[src]

Bits 0:15 - Counter auto reload value

`impl R<u16, Reg<u16, _CREP>>`[src]

`pub fn crep(&self) -> CREP_R`[src]

Bits 0:7 - Counter repetition value

`impl R<u16, Reg<u16, _CH0CV>>`[src]

`pub fn ch0val(&self) -> CH0VAL_R`[src]

Bits 0:15 - Capture or compare value of channel0

`impl R<u16, Reg<u16, _CH1CV>>`[src]

`pub fn ch1val(&self) -> CH1VAL_R`[src]

Bits 0:15 - Capture or compare value of channel1

`impl R<u16, Reg<u16, _CH2CV>>`[src]

`pub fn ch2val(&self) -> CH2VAL_R`[src]

Bits 0:15 - Capture or compare value of channel 2

`impl R<u16, Reg<u16, _CH3CV>>`[src]

`pub fn ch3val(&self) -> CH3VAL_R`[src]

Bits 0:15 - Capture or compare value of channel 3

`impl R<u16, Reg<u16, _CCHP>>`[src]

`pub fn poen(&self) -> POEN_R`[src]

Bit 15 - Primary output enable

`pub fn oaen(&self) -> OAEN_R`[src]

Bit 14 - Output automatic enable

`pub fn brkp(&self) -> BRKP_R`[src]

Bit 13 - Break polarity

`pub fn brken(&self) -> BRKEN_R`[src]

Bit 12 - Break enable

`pub fn ros(&self) -> ROS_R`[src]

Bit 11 - Run mode off-state configure

`pub fn ios(&self) -> IOS_R`[src]

Bit 10 - Idle mode off-state configure

`pub fn prot(&self) -> PROT_R`[src]

Bits 8:9 - Complementary register protect control

`pub fn dtcfg(&self) -> DTCFG_R`[src]

Bits 0:7 - Dead time configure

`impl R<u16, Reg<u16, _DMACFG>>`[src]

`pub fn dmatc(&self) -> DMATC_R`[src]

Bits 8:12 - DMA transfer count

`pub fn dmata(&self) -> DMATA_R`[src]

Bits 0:4 - DMA transfer access start address

`impl R<u16, Reg<u16, _DMATB>>`[src]

`pub fn dmatb(&self) -> DMATB_R`[src]

Bits 0:15 - DMA transfer buffer

`impl R<u16, Reg<u16, _CTL0>>`[src]

`pub fn ckdiv(&self) -> CKDIV_R`[src]

Bits 8:9 - Clock division

`pub fn arse(&self) -> ARSE_R`[src]

Bit 7 - Auto-reload shadow enable

`pub fn cam(&self) -> CAM_R`[src]

Bits 5:6 - Counter aligns mode selection

`pub fn dir(&self) -> DIR_R`[src]

Bit 4 - Direction

`pub fn spm(&self) -> SPM_R`[src]

Bit 3 - Single pulse mode

`pub fn ups(&self) -> UPS_R`[src]

Bit 2 - Update source

`pub fn updis(&self) -> UPDIS_R`[src]

Bit 1 - Update disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 0 - Counter enable

`impl R<u16, Reg<u16, _CTL1>>`[src]

`pub fn ti0s(&self) -> TI0S_R`[src]

Bit 7 - Channel 0 trigger input selection

`pub fn mmc(&self) -> MMC_R`[src]

Bits 4:6 - Master mode control

`pub fn dmas(&self) -> DMAS_R`[src]

Bit 3 - DMA request source selection

`impl R<u16, Reg<u16, _SMCFG>>`[src]

`pub fn etp(&self) -> ETP_R`[src]

Bit 15 - External trigger polarity

`pub fn smc1(&self) -> SMC1_R`[src]

Bit 14 - Part of SMC for enable External clock mode1

`pub fn etpsc(&self) -> ETPSC_R`[src]

Bits 12:13 - External trigger prescaler

`pub fn etfc(&self) -> ETFC_R`[src]

Bits 8:11 - External trigger filter control

`pub fn msm(&self) -> MSM_R`[src]

Bit 7 - Master-slave mode

`pub fn trgs(&self) -> TRGS_R`[src]

Bits 4:6 - Trigger selection

`pub fn smc(&self) -> SMC_R`[src]

Bits 0:2 - Slave mode control

`impl R<u16, Reg<u16, _DMAINTEN>>`[src]

`pub fn trgden(&self) -> TRGDEN_R`[src]

Bit 14 - Trigger DMA request enable

`pub fn ch3den(&self) -> CH3DEN_R`[src]

Bit 12 - Channel 3 capture/compare DMA request enable

`pub fn ch2den(&self) -> CH2DEN_R`[src]

Bit 11 - Channel 2 capture/compare DMA request enable

`pub fn ch1den(&self) -> CH1DEN_R`[src]

Bit 10 - Channel 1 capture/compare DMA request enable

`pub fn ch0den(&self) -> CH0DEN_R`[src]

Bit 9 - Channel 0 capture/compare DMA request enable

`pub fn upden(&self) -> UPDEN_R`[src]

Bit 8 - Update DMA request enable

`pub fn trgie(&self) -> TRGIE_R`[src]

Bit 6 - Trigger interrupt enable

`pub fn ch3ie(&self) -> CH3IE_R`[src]

Bit 4 - Channel 3 capture/compare interrupt enable

`pub fn ch2ie(&self) -> CH2IE_R`[src]

Bit 3 - Channel 2 capture/compare interrupt enable

`pub fn ch1ie(&self) -> CH1IE_R`[src]

Bit 2 - Channel 1 capture/compare interrupt enable

`pub fn ch0ie(&self) -> CH0IE_R`[src]

Bit 1 - Channel 0 capture/compare interrupt enable

`pub fn upie(&self) -> UPIE_R`[src]

Bit 0 - Update interrupt enable

`impl R<u16, Reg<u16, _INTF>>`[src]

`pub fn ch3of(&self) -> CH3OF_R`[src]

Bit 12 - Channel 3 over capture flag

`pub fn ch2of(&self) -> CH2OF_R`[src]

Bit 11 - Channel 2 over capture flag

`pub fn ch1of(&self) -> CH1OF_R`[src]

Bit 10 - Channel 1 over capture flag

`pub fn ch0of(&self) -> CH0OF_R`[src]

Bit 9 - Channel 0 over capture flag

`pub fn trgif(&self) -> TRGIF_R`[src]

Bit 6 - Trigger interrupt flag

`pub fn ch3if(&self) -> CH3IF_R`[src]

Bit 4 - Channel 3 capture/compare interrupt enable

`pub fn ch2if(&self) -> CH2IF_R`[src]

Bit 3 - Channel 2 capture/compare interrupt enable

`pub fn ch1if(&self) -> CH1IF_R`[src]

Bit 2 - Channel 1 capture/compare interrupt flag

`pub fn ch0if(&self) -> CH0IF_R`[src]

Bit 1 - Channel 0 capture/compare interrupt flag

`pub fn upif(&self) -> UPIF_R`[src]

Bit 0 - Update interrupt flag

`impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>`[src]

`pub fn ch1comcen(&self) -> CH1COMCEN_R`[src]

Bit 15 - Channel 1 output compare clear enable

`pub fn ch1comctl(&self) -> CH1COMCTL_R`[src]

Bits 12:14 - Channel 1 compare output control

`pub fn ch1comsen(&self) -> CH1COMSEN_R`[src]

Bit 11 - Channel 1 output compare shadow enable

`pub fn ch1comfen(&self) -> CH1COMFEN_R`[src]

Bit 10 - Channel 1 output compare fast enable

`pub fn ch1ms(&self) -> CH1MS_R`[src]

Bits 8:9 - Channel 1 mode selection

`pub fn ch0comcen(&self) -> CH0COMCEN_R`[src]

Bit 7 - Channel 0 output compare clear enable

`pub fn ch0comctl(&self) -> CH0COMCTL_R`[src]

Bits 4:6 - Channel 0 compare output control

`pub fn ch0comsen(&self) -> CH0COMSEN_R`[src]

Bit 3 - Channel 0 compare output shadow enable

`pub fn ch0comfen(&self) -> CH0COMFEN_R`[src]

Bit 2 - Channel 0 output compare fast enable

`pub fn ch0ms(&self) -> CH0MS_R`[src]

Bits 0:1 - Channel 0 I/O mode selection

`impl R<u16, Reg<u16, _CHCTL0_INPUT>>`[src]

`pub fn ch1capflt(&self) -> CH1CAPFLT_R`[src]

Bits 12:15 - Channel 1 input capture filter control

`pub fn ch1cappsc(&self) -> CH1CAPPSC_R`[src]

Bits 10:11 - Channel 1 input capture prescaler

`pub fn ch1ms(&self) -> CH1MS_R`[src]

Bits 8:9 - Channel 1 mode selection

`pub fn ch0capflt(&self) -> CH0CAPFLT_R`[src]

Bits 4:7 - Channel 0 input capture filter control

`pub fn ch0cappsc(&self) -> CH0CAPPSC_R`[src]

Bits 2:3 - Channel 0 input capture prescaler

`pub fn ch0ms(&self) -> CH0MS_R`[src]

Bits 0:1 - Channel 0 mode selection

`impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>`[src]

`pub fn ch3comcen(&self) -> CH3COMCEN_R`[src]

Bit 15 - Channel 3 output compare clear enable

`pub fn ch3comctl(&self) -> CH3COMCTL_R`[src]

Bits 12:14 - Channel 3 compare output control

`pub fn ch3comsen(&self) -> CH3COMSEN_R`[src]

Bit 11 - Channel 3 output compare shadow enable

`pub fn ch3comfen(&self) -> CH3COMFEN_R`[src]

Bit 10 - Channel 3 output compare fast enable

`pub fn ch3ms(&self) -> CH3MS_R`[src]

Bits 8:9 - Channel 3 mode selection

`pub fn ch2comcen(&self) -> CH2COMCEN_R`[src]

Bit 7 - Channel 2 output compare clear enable

`pub fn ch2comctl(&self) -> CH2COMCTL_R`[src]

Bits 4:6 - Channel 2 compare output control

`pub fn ch2comsen(&self) -> CH2COMSEN_R`[src]

Bit 3 - Channel 2 compare output shadow enable

`pub fn ch2comfen(&self) -> CH2COMFEN_R`[src]

Bit 2 - Channel 2 output compare fast enable

`pub fn ch2ms(&self) -> CH2MS_R`[src]

Bits 0:1 - Channel 2 I/O mode selection

`impl R<u16, Reg<u16, _CHCTL1_INPUT>>`[src]

`pub fn ch3capflt(&self) -> CH3CAPFLT_R`[src]

Bits 12:15 - Channel 3 input capture filter control

`pub fn ch3cappsc(&self) -> CH3CAPPSC_R`[src]

Bits 10:11 - Channel 3 input capture prescaler

`pub fn ch3ms(&self) -> CH3MS_R`[src]

Bits 8:9 - Channel 3 mode selection

`pub fn ch2capflt(&self) -> CH2CAPFLT_R`[src]

Bits 4:7 - Channel 2 input capture filter control

`pub fn ch2cappsc(&self) -> CH2CAPPSC_R`[src]

Bits 2:3 - Channel 2 input capture prescaler

`pub fn ch2ms(&self) -> CH2MS_R`[src]

Bits 0:1 - Channel 2 mode selection

`impl R<u16, Reg<u16, _CHCTL2>>`[src]

`pub fn ch3p(&self) -> CH3P_R`[src]

Bit 13 - Channel 3 capture/compare function polarity

`pub fn ch3en(&self) -> CH3EN_R`[src]

Bit 12 - Channel 3 capture/compare function enable

`pub fn ch2p(&self) -> CH2P_R`[src]

Bit 9 - Channel 2 capture/compare function polarity

`pub fn ch2en(&self) -> CH2EN_R`[src]

Bit 8 - Channel 2 capture/compare function enable

`pub fn ch1p(&self) -> CH1P_R`[src]

Bit 5 - Channel 1 capture/compare function polarity

`pub fn ch1en(&self) -> CH1EN_R`[src]

Bit 4 - Channel 1 capture/compare function enable

`pub fn ch0p(&self) -> CH0P_R`[src]

Bit 1 - Channel 0 capture/compare function polarity

`pub fn ch0en(&self) -> CH0EN_R`[src]

Bit 0 - Channel 0 capture/compare function enable

`impl R<u16, Reg<u16, _CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - counter value

`impl R<u16, Reg<u16, _PSC>>`[src]

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:15 - Prescaler value of the counter clock

`impl R<u16, Reg<u16, _CAR>>`[src]

`pub fn carl(&self) -> CARL_R`[src]

Bits 0:15 - Counter auto reload value

`impl R<u16, Reg<u16, _CH0CV>>`[src]

`pub fn ch0val(&self) -> CH0VAL_R`[src]

Bits 0:15 - Capture or compare value of channel 0

`impl R<u16, Reg<u16, _CH1CV>>`[src]

`pub fn ch1val(&self) -> CH1VAL_R`[src]

Bits 0:15 - Capture or compare value of channel1

`impl R<u16, Reg<u16, _CH2CV>>`[src]

`pub fn ch2val(&self) -> CH2VAL_R`[src]

Bits 0:15 - Capture or compare value of channel 2

`impl R<u16, Reg<u16, _CH3CV>>`[src]

`pub fn ch3val(&self) -> CH3VAL_R`[src]

Bits 0:15 - Capture or compare value of channel 3

`impl R<u16, Reg<u16, _DMACFG>>`[src]

`pub fn dmatc(&self) -> DMATC_R`[src]

Bits 8:12 - DMA transfer count

`pub fn dmata(&self) -> DMATA_R`[src]

Bits 0:4 - DMA transfer access start address

`impl R<u16, Reg<u16, _DMATB>>`[src]

`pub fn dmatb(&self) -> DMATB_R`[src]

Bits 0:15 - DMA transfer buffer

`impl R<u16, Reg<u16, _CTL0>>`[src]

`pub fn arse(&self) -> ARSE_R`[src]

Bit 7 - Auto-reload shadow enable

`pub fn spm(&self) -> SPM_R`[src]

Bit 3 - Single pulse mode

`pub fn ups(&self) -> UPS_R`[src]

Bit 2 - Update source

`pub fn updis(&self) -> UPDIS_R`[src]

Bit 1 - Update disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 0 - Counter enable

`impl R<u16, Reg<u16, _CTL1>>`[src]

`pub fn mmc(&self) -> MMC_R`[src]

Bits 4:6 - Master mode control

`impl R<u16, Reg<u16, _DMAINTEN>>`[src]

`pub fn upden(&self) -> UPDEN_R`[src]

Bit 8 - Update DMA request enable

`pub fn upie(&self) -> UPIE_R`[src]

Bit 0 - Update interrupt enable

`impl R<u16, Reg<u16, _INTF>>`[src]

`pub fn upif(&self) -> UPIF_R`[src]

Bit 0 - Update interrupt flag

`impl R<u16, Reg<u16, _CNT>>`[src]

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:15 - Low counter value

`impl R<u16, Reg<u16, _PSC>>`[src]

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:15 - Prescaler value of the counter clock

`impl R<u16, Reg<u16, _CAR>>`[src]

`pub fn carl(&self) -> CARL_R`[src]

Bits 0:15 - Counter auto reload value

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn ctsf(&self) -> CTSF_R`[src]

Bit 9 - CTS change flag

`pub fn lbdf(&self) -> LBDF_R`[src]

Bit 8 - LIN break detection flag

`pub fn tbe(&self) -> TBE_R`[src]

Bit 7 - Transmit data buffer empty

`pub fn tc(&self) -> TC_R`[src]

Bit 6 - Transmission complete

`pub fn rbne(&self) -> RBNE_R`[src]

Bit 5 - Read data buffer not empty

`pub fn idlef(&self) -> IDLEF_R`[src]

Bit 4 - IDLE frame detected flag

`pub fn orerr(&self) -> ORERR_R`[src]

Bit 3 - Overrun error

`pub fn nerr(&self) -> NERR_R`[src]

Bit 2 - Noise error flag

`pub fn ferr(&self) -> FERR_R`[src]

Bit 1 - Frame error flag

`pub fn perr(&self) -> PERR_R`[src]

Bit 0 - Parity error flag

`impl R<u32, Reg<u32, _DATA>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:8 - Transmit or read data value

`impl R<u32, Reg<u32, _BAUD>>`[src]

`pub fn intdiv(&self) -> INTDIV_R`[src]

Bits 4:15 - Integer part of baud-rate divider

`pub fn fradiv(&self) -> FRADIV_R`[src]

Bits 0:3 - Fraction part of baud-rate divider

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn uen(&self) -> UEN_R`[src]

Bit 13 - USART enable

`pub fn wl(&self) -> WL_R`[src]

Bit 12 - Word length

`pub fn wm(&self) -> WM_R`[src]

Bit 11 - Wakeup method in mute mode

`pub fn pcen(&self) -> PCEN_R`[src]

Bit 10 - Parity check function enable

`pub fn pm(&self) -> PM_R`[src]

Bit 9 - Parity mode

`pub fn perrie(&self) -> PERRIE_R`[src]

Bit 8 - Parity error interrupt enable

`pub fn tbeie(&self) -> TBEIE_R`[src]

Bit 7 - Transmitter buffer empty interrupt enable

`pub fn tcie(&self) -> TCIE_R`[src]

Bit 6 - Transmission complete interrupt enable

`pub fn rbneie(&self) -> RBNEIE_R`[src]

Bit 5 - Read data buffer not empty interrupt and overrun error interrupt enable

`pub fn idleie(&self) -> IDLEIE_R`[src]

Bit 4 - IDLE line detected interrupt enable

`pub fn ten(&self) -> TEN_R`[src]

Bit 3 - Transmitter enable

`pub fn ren(&self) -> REN_R`[src]

Bit 2 - Receiver enable

`pub fn rwu(&self) -> RWU_R`[src]

Bit 1 - Receiver wakeup from mute mode

`pub fn sbkcmd(&self) -> SBKCMD_R`[src]

Bit 0 - Send break command

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn lmen(&self) -> LMEN_R`[src]

Bit 14 - LIN mode enable

`pub fn stb(&self) -> STB_R`[src]

Bits 12:13 - STOP bits length

`pub fn cken(&self) -> CKEN_R`[src]

Bit 11 - CK pin enable

`pub fn cpl(&self) -> CPL_R`[src]

Bit 10 - Clock polarity

`pub fn cph(&self) -> CPH_R`[src]

Bit 9 - Clock phase

`pub fn clen(&self) -> CLEN_R`[src]

Bit 8 - CK Length

`pub fn lbdie(&self) -> LBDIE_R`[src]

Bit 6 - LIN break detection interrupt enable

`pub fn lblen(&self) -> LBLEN_R`[src]

Bit 5 - LIN break frame length

`pub fn addr(&self) -> ADDR_R`[src]

Bits 0:3 - Address of the USART

`impl R<u32, Reg<u32, _CTL2>>`[src]

`pub fn ctsie(&self) -> CTSIE_R`[src]

Bit 10 - CTS interrupt enable

`pub fn ctsen(&self) -> CTSEN_R`[src]

Bit 9 - CTS enable

`pub fn rtsen(&self) -> RTSEN_R`[src]

Bit 8 - RTS enable

`pub fn dent(&self) -> DENT_R`[src]

Bit 7 - DMA request enable for transmission

`pub fn denr(&self) -> DENR_R`[src]

Bit 6 - DMA request enable for reception

`pub fn scen(&self) -> SCEN_R`[src]

Bit 5 - Smartcard mode enable

`pub fn nken(&self) -> NKEN_R`[src]

Bit 4 - Smartcard NACK enable

`pub fn hden(&self) -> HDEN_R`[src]

Bit 3 - Half-duplex selection

`pub fn irlp(&self) -> IRLP_R`[src]

Bit 2 - IrDA low-power

`pub fn iren(&self) -> IREN_R`[src]

Bit 1 - IrDA mode enable

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 0 - Error interrupt enable

`impl R<u32, Reg<u32, _GP>>`[src]

`pub fn guat(&self) -> GUAT_R`[src]

Bits 8:15 - Guard time value in Smartcard mode

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:7 - Prescaler value

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn lbdf(&self) -> LBDF_R`[src]

Bit 8 - LIN break detection flag

`pub fn tbe(&self) -> TBE_R`[src]

Bit 7 - Transmit data buffer empty

`pub fn tc(&self) -> TC_R`[src]

Bit 6 - Transmission complete

`pub fn rbne(&self) -> RBNE_R`[src]

Bit 5 - Read data buffer not empty

`pub fn idlef(&self) -> IDLEF_R`[src]

Bit 4 - IDLE frame detected flag

`pub fn orerr(&self) -> ORERR_R`[src]

Bit 3 - Overrun error

`pub fn nerr(&self) -> NERR_R`[src]

Bit 2 - Noise error flag

`pub fn ferr(&self) -> FERR_R`[src]

Bit 1 - Frame error flag

`pub fn perr(&self) -> PERR_R`[src]

Bit 0 - Parity error flag

`impl R<u32, Reg<u32, _DATA>>`[src]

`pub fn data(&self) -> DATA_R`[src]

Bits 0:8 - Transmit or read data value

`impl R<u32, Reg<u32, _BAUD>>`[src]

`pub fn intdiv(&self) -> INTDIV_R`[src]

Bits 4:15 - Integer part of baud-rate divider

`pub fn fradiv(&self) -> FRADIV_R`[src]

Bits 0:3 - Fraction part of baud-rate divider

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn uen(&self) -> UEN_R`[src]

Bit 13 - USART enable

`pub fn wl(&self) -> WL_R`[src]

Bit 12 - Word length

`pub fn wm(&self) -> WM_R`[src]

Bit 11 - Wakeup method in mute mode

`pub fn pcen(&self) -> PCEN_R`[src]

Bit 10 - Parity check function enable

`pub fn pm(&self) -> PM_R`[src]

Bit 9 - Parity mode

`pub fn perrie(&self) -> PERRIE_R`[src]

Bit 8 - Parity error interrupt enable

`pub fn tbeie(&self) -> TBEIE_R`[src]

Bit 7 - Transmitter buffer empty interrupt enable

`pub fn tcie(&self) -> TCIE_R`[src]

Bit 6 - Transmission complete interrupt enable

`pub fn rbneie(&self) -> RBNEIE_R`[src]

Bit 5 - Read data buffer not empty interrupt and overrun error interrupt enable

`pub fn idleie(&self) -> IDLEIE_R`[src]

Bit 4 - IDLE line detected interrupt enable

`pub fn ten(&self) -> TEN_R`[src]

Bit 3 - Transmitter enable

`pub fn ren(&self) -> REN_R`[src]

Bit 2 - Receiver enable

`pub fn rwu(&self) -> RWU_R`[src]

Bit 1 - Receiver wakeup from mute mode

`pub fn sbkcmd(&self) -> SBKCMD_R`[src]

Bit 0 - Send break command

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn lmen(&self) -> LMEN_R`[src]

Bit 14 - LIN mode enable

`pub fn stb(&self) -> STB_R`[src]

Bits 12:13 - STOP bits length

`pub fn lbdie(&self) -> LBDIE_R`[src]

Bit 6 - LIN break detection interrupt enable

`pub fn lblen(&self) -> LBLEN_R`[src]

Bit 5 - LIN break frame length

`pub fn addr(&self) -> ADDR_R`[src]

Bits 0:3 - Address of the USART

`impl R<u32, Reg<u32, _CTL2>>`[src]

`pub fn dent(&self) -> DENT_R`[src]

Bit 7 - DMA request enable for transmission

`pub fn denr(&self) -> DENR_R`[src]

Bit 6 - DMA request enable for reception

`pub fn hden(&self) -> HDEN_R`[src]

Bit 3 - Half-duplex selection

`pub fn irlp(&self) -> IRLP_R`[src]

Bit 2 - IrDA low-power

`pub fn iren(&self) -> IREN_R`[src]

Bit 1 - IrDA mode enable

`pub fn errie(&self) -> ERRIE_R`[src]

Bit 0 - Error interrupt enable

`impl R<u32, Reg<u32, _GP>>`[src]

`pub fn psc(&self) -> PSC_R`[src]

Bits 0:7 - Prescaler value

`impl R<u32, Reg<u32, _GOTGCS>>`[src]

`pub fn srps(&self) -> SRPS_R`[src]

Bit 0 - SRP success

`pub fn srpreq(&self) -> SRPREQ_R`[src]

Bit 1 - SRP request

`pub fn hnps(&self) -> HNPS_R`[src]

Bit 8 - Host success

`pub fn hnpreq(&self) -> HNPREQ_R`[src]

Bit 9 - HNP request

`pub fn hhnpen(&self) -> HHNPEN_R`[src]

Bit 10 - Host HNP enable

`pub fn dhnpen(&self) -> DHNPEN_R`[src]

Bit 11 - Device HNP enabled

`pub fn idps(&self) -> IDPS_R`[src]

Bit 16 - ID pin status

`pub fn di(&self) -> DI_R`[src]

Bit 17 - Debounce interval

`pub fn asv(&self) -> ASV_R`[src]

Bit 18 - A-session valid

`pub fn bsv(&self) -> BSV_R`[src]

Bit 19 - B-session valid

`impl R<u32, Reg<u32, _GOTGINTF>>`[src]

`pub fn sesend(&self) -> SESEND_R`[src]

Bit 2 - Session end

`pub fn srpend(&self) -> SRPEND_R`[src]

Bit 8 - Session request success status change

`pub fn hnpend(&self) -> HNPEND_R`[src]

Bit 9 - HNP end

`pub fn hnpdet(&self) -> HNPDET_R`[src]

Bit 17 - Host negotiation request detected

`pub fn adto(&self) -> ADTO_R`[src]

Bit 18 - A-device timeout

`pub fn df(&self) -> DF_R`[src]

Bit 19 - Debounce finish

`impl R<u32, Reg<u32, _GAHBCS>>`[src]

`pub fn ginten(&self) -> GINTEN_R`[src]

Bit 0 - Global interrupt enable

`pub fn txfth(&self) -> TXFTH_R`[src]

Bit 7 - Tx FIFO threshold

`pub fn ptxfth(&self) -> PTXFTH_R`[src]

Bit 8 - Periodic Tx FIFO threshold

`impl R<u32, Reg<u32, _GUSBCS>>`[src]

`pub fn toc(&self) -> TOC_R`[src]

Bits 0:2 - Timeout calibration

`pub fn srpcen(&self) -> SRPCEN_R`[src]

Bit 8 - SRP capability enable

`pub fn hnpcen(&self) -> HNPCEN_R`[src]

Bit 9 - HNP capability enable

`pub fn utt(&self) -> UTT_R`[src]

Bits 10:13 - USB turnaround time

`pub fn fhm(&self) -> FHM_R`[src]

Bit 29 - Force host mode

`pub fn fdm(&self) -> FDM_R`[src]

Bit 30 - Force device mode

`impl R<u32, Reg<u32, _GRSTCTL>>`[src]

`pub fn csrst(&self) -> CSRST_R`[src]

Bit 0 - Core soft reset

`pub fn hcsrst(&self) -> HCSRST_R`[src]

Bit 1 - HCLK soft reset

`pub fn hfcrst(&self) -> HFCRST_R`[src]

Bit 2 - Host frame counter reset

`pub fn rxff(&self) -> RXFF_R`[src]

Bit 4 - RxFIFO flush

`pub fn txff(&self) -> TXFF_R`[src]

Bit 5 - TxFIFO flush

`pub fn txfnum(&self) -> TXFNUM_R`[src]

Bits 6:10 - TxFIFO number

`impl R<u32, Reg<u32, _GINTF>>`[src]

`pub fn copm(&self) -> COPM_R`[src]

Bit 0 - Current operation mode

`pub fn mfif(&self) -> MFIF_R`[src]

Bit 1 - Mode fault interrupt flag

`pub fn otgif(&self) -> OTGIF_R`[src]

Bit 2 - OTG interrupt flag

`pub fn sof(&self) -> SOF_R`[src]

Bit 3 - Start of frame

`pub fn rxfneif(&self) -> RXFNEIF_R`[src]

Bit 4 - RxFIFO non-empty interrupt flag

`pub fn nptxfeif(&self) -> NPTXFEIF_R`[src]

Bit 5 - Non-periodic TxFIFO empty interrupt flag

`pub fn gnpinak(&self) -> GNPINAK_R`[src]

Bit 6 - Global Non-Periodic IN NAK effective

`pub fn gonak(&self) -> GONAK_R`[src]

Bit 7 - Global OUT NAK effective

`pub fn esp(&self) -> ESP_R`[src]

Bit 10 - Early suspend

`pub fn sp(&self) -> SP_R`[src]

Bit 11 - USB suspend

`pub fn rst(&self) -> RST_R`[src]

Bit 12 - USB reset

`pub fn enumf(&self) -> ENUMF_R`[src]

Bit 13 - Enumeration finished

`pub fn isoopdif(&self) -> ISOOPDIF_R`[src]

Bit 14 - Isochronous OUT packet dropped interrupt

`pub fn eopfif(&self) -> EOPFIF_R`[src]

Bit 15 - End of periodic frame interrupt flag

`pub fn iepif(&self) -> IEPIF_R`[src]

Bit 18 - IN endpoint interrupt flag

`pub fn oepif(&self) -> OEPIF_R`[src]

Bit 19 - OUT endpoint interrupt flag

`pub fn isoincif(&self) -> ISOINCIF_R`[src]

Bit 20 - Isochronous IN transfer Not Complete Interrupt Flag

`pub fn pxncif_isooncif(&self) -> PXNCIF_ISOONCIF_R`[src]

Bit 21 - periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)

`pub fn hpif(&self) -> HPIF_R`[src]

Bit 24 - Host port interrupt flag

`pub fn hcif(&self) -> HCIF_R`[src]

Bit 25 - Host channels interrupt flag

`pub fn ptxfeif(&self) -> PTXFEIF_R`[src]

Bit 26 - Periodic TxFIFO empty interrupt flag

`pub fn idpsc(&self) -> IDPSC_R`[src]

Bit 28 - ID pin status change

`pub fn discif(&self) -> DISCIF_R`[src]

Bit 29 - Disconnect interrupt flag

`pub fn sesif(&self) -> SESIF_R`[src]

Bit 30 - Session interrupt flag

`pub fn wkupif(&self) -> WKUPIF_R`[src]

Bit 31 - Wakeup interrupt flag

`impl R<u32, Reg<u32, _GINTEN>>`[src]

`pub fn mfie(&self) -> MFIE_R`[src]

Bit 1 - Mode fault interrupt enable

`pub fn otgie(&self) -> OTGIE_R`[src]

Bit 2 - OTG interrupt enable

`pub fn sofie(&self) -> SOFIE_R`[src]

Bit 3 - Start of frame interrupt enable

`pub fn rxfneie(&self) -> RXFNEIE_R`[src]

Bit 4 - Receive FIFO non-empty interrupt enable

`pub fn nptxfeie(&self) -> NPTXFEIE_R`[src]

Bit 5 - Non-periodic TxFIFO empty interrupt enable

`pub fn gnpinakie(&self) -> GNPINAKIE_R`[src]

Bit 6 - Global non-periodic IN NAK effective interrupt enable

`pub fn gonakie(&self) -> GONAKIE_R`[src]

Bit 7 - Global OUT NAK effective interrupt enable

`pub fn espie(&self) -> ESPIE_R`[src]

Bit 10 - Early suspend interrupt enable

`pub fn spie(&self) -> SPIE_R`[src]

Bit 11 - USB suspend interrupt enable

`pub fn rstie(&self) -> RSTIE_R`[src]

Bit 12 - USB reset interrupt enable

`pub fn enumfie(&self) -> ENUMFIE_R`[src]

Bit 13 - Enumeration finish interrupt enable

`pub fn isoopdie(&self) -> ISOOPDIE_R`[src]

Bit 14 - Isochronous OUT packet dropped interrupt enable

`pub fn eopfie(&self) -> EOPFIE_R`[src]

Bit 15 - End of periodic frame interrupt enable

`pub fn iepie(&self) -> IEPIE_R`[src]

Bit 18 - IN endpoints interrupt enable

`pub fn oepie(&self) -> OEPIE_R`[src]

Bit 19 - OUT endpoints interrupt enable

`pub fn isoincie(&self) -> ISOINCIE_R`[src]

Bit 20 - isochronous IN transfer not complete interrupt enable

`pub fn pxncie_isooncie(&self) -> PXNCIE_ISOONCIE_R`[src]

Bit 21 - periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)

`pub fn hpie(&self) -> HPIE_R`[src]

Bit 24 - Host port interrupt enable

`pub fn hcie(&self) -> HCIE_R`[src]

Bit 25 - Host channels interrupt enable

`pub fn ptxfeie(&self) -> PTXFEIE_R`[src]

Bit 26 - Periodic TxFIFO empty interrupt enable

`pub fn idpscie(&self) -> IDPSCIE_R`[src]

Bit 28 - ID pin status change interrupt enable

`pub fn discie(&self) -> DISCIE_R`[src]

Bit 29 - Disconnect interrupt enable

`pub fn sesie(&self) -> SESIE_R`[src]

Bit 30 - Session interrupt enable

`pub fn wkupie(&self) -> WKUPIE_R`[src]

Bit 31 - Wakeup interrupt enable

`impl R<u32, Reg<u32, _GRSTATR_DEVICE>>`[src]

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 0:3 - Endpoint number

`pub fn bcount(&self) -> BCOUNT_R`[src]

Bits 4:14 - Byte count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 15:16 - Data PID

`pub fn rpckst(&self) -> RPCKST_R`[src]

Bits 17:20 - Recieve packet status

`impl R<u32, Reg<u32, _GRSTATR_HOST>>`[src]

`pub fn cnum(&self) -> CNUM_R`[src]

Bits 0:3 - Channel number

`pub fn bcount(&self) -> BCOUNT_R`[src]

Bits 4:14 - Byte count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 15:16 - Data PID

`pub fn rpckst(&self) -> RPCKST_R`[src]

Bits 17:20 - Reivece packet status

`impl R<u32, Reg<u32, _GRSTATP_DEVICE>>`[src]

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 0:3 - Endpoint number

`pub fn bcount(&self) -> BCOUNT_R`[src]

Bits 4:14 - Byte count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 15:16 - Data PID

`pub fn rpckst(&self) -> RPCKST_R`[src]

Bits 17:20 - Recieve packet status

`impl R<u32, Reg<u32, _GRSTATP_HOST>>`[src]

`pub fn cnum(&self) -> CNUM_R`[src]

Bits 0:3 - Channel number

`pub fn bcount(&self) -> BCOUNT_R`[src]

Bits 4:14 - Byte count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 15:16 - Data PID

`pub fn rpckst(&self) -> RPCKST_R`[src]

Bits 17:20 - Reivece packet status

`impl R<u32, Reg<u32, _GRFLEN>>`[src]

`pub fn rxfd(&self) -> RXFD_R`[src]

Bits 0:15 - Rx FIFO depth

`impl R<u32, Reg<u32, _HNPTFLEN>>`[src]

`pub fn hnptxrsar(&self) -> HNPTXRSAR_R`[src]

Bits 0:15 - host non-periodic transmit Tx RAM start address

`pub fn hnptxfd(&self) -> HNPTXFD_R`[src]

Bits 16:31 - host non-periodic TxFIFO depth

`impl R<u32, Reg<u32, _DIEP0TFLEN>>`[src]

`pub fn iep0txfd(&self) -> IEP0TXFD_R`[src]

Bits 16:31 - in endpoint 0 Tx FIFO depth

`pub fn iep0txrsar(&self) -> IEP0TXRSAR_R`[src]

Bits 0:15 - in endpoint 0 Tx RAM start address

`impl R<u32, Reg<u32, _HNPTFQSTAT>>`[src]

`pub fn nptxfs(&self) -> NPTXFS_R`[src]

Bits 0:15 - Non-periodic TxFIFO space

`pub fn nptxrqs(&self) -> NPTXRQS_R`[src]

Bits 16:23 - Non-periodic transmit request queue space

`pub fn nptxrqtop(&self) -> NPTXRQTOP_R`[src]

Bits 24:30 - Top of the non-periodic transmit request queue

`impl R<u32, Reg<u32, _GCCFG>>`[src]

`pub fn pwron(&self) -> PWRON_R`[src]

Bit 16 - Power on

`pub fn vbusacen(&self) -> VBUSACEN_R`[src]

Bit 18 - The VBUS A-device Comparer enable

`pub fn vbusbcen(&self) -> VBUSBCEN_R`[src]

Bit 19 - The VBUS B-device Comparer enable

`pub fn sofoen(&self) -> SOFOEN_R`[src]

Bit 20 - SOF output enable

`pub fn vbusig(&self) -> VBUSIG_R`[src]

Bit 21 - VBUS ignored

`impl R<u32, Reg<u32, _CID>>`[src]

`pub fn cid(&self) -> CID_R`[src]

Bits 0:31 - Core ID

`impl R<u32, Reg<u32, _HPTFLEN>>`[src]

`pub fn hptxfsar(&self) -> HPTXFSAR_R`[src]

Bits 0:15 - Host periodic TxFIFO start address

`pub fn hptxfd(&self) -> HPTXFD_R`[src]

Bits 16:31 - Host periodic TxFIFO depth

`impl R<u32, Reg<u32, _DIEP1TFLEN>>`[src]

`pub fn ieptxrsar(&self) -> IEPTXRSAR_R`[src]

Bits 0:15 - IN endpoint FIFO transmit RAM start address

`pub fn ieptxfd(&self) -> IEPTXFD_R`[src]

Bits 16:31 - IN endpoint TxFIFO depth

`impl R<u32, Reg<u32, _DIEP2TFLEN>>`[src]

`pub fn ieptxrsar(&self) -> IEPTXRSAR_R`[src]

Bits 0:15 - IN endpoint FIFO transmit RAM start address

`pub fn ieptxfd(&self) -> IEPTXFD_R`[src]

Bits 16:31 - IN endpoint TxFIFO depth

`impl R<u32, Reg<u32, _DIEP3TFLEN>>`[src]

`pub fn ieptxrsar(&self) -> IEPTXRSAR_R`[src]

Bits 0:15 - IN endpoint FIFO4 transmit RAM start address

`pub fn ieptxfd(&self) -> IEPTXFD_R`[src]

Bits 16:31 - IN endpoint TxFIFO depth

`impl R<u32, Reg<u32, _HCTL>>`[src]

`pub fn clksel(&self) -> CLKSEL_R`[src]

Bits 0:1 - clock select for USB clock

`impl R<u32, Reg<u32, _HFT>>`[src]

`pub fn fri(&self) -> FRI_R`[src]

Bits 0:15 - Frame interval

`impl R<u32, Reg<u32, _HFINFR>>`[src]

`pub fn frnum(&self) -> FRNUM_R`[src]

Bits 0:15 - Frame number

`pub fn frt(&self) -> FRT_R`[src]

Bits 16:31 - Frame remaining time

`impl R<u32, Reg<u32, _HPTFQSTAT>>`[src]

`pub fn ptxfs(&self) -> PTXFS_R`[src]

Bits 0:15 - Periodic transmit data FIFO space available

`pub fn ptxreqs(&self) -> PTXREQS_R`[src]

Bits 16:23 - Periodic transmit request queue space available

`pub fn ptxreqt(&self) -> PTXREQT_R`[src]

Bits 24:31 - Top of the periodic transmit request queue

`impl R<u32, Reg<u32, _HACHINT>>`[src]

`pub fn hachint(&self) -> HACHINT_R`[src]

Bits 0:7 - Host all channel interrupts

`impl R<u32, Reg<u32, _HACHINTEN>>`[src]

`pub fn cinten(&self) -> CINTEN_R`[src]

Bits 0:7 - Channel interrupt enable

`impl R<u32, Reg<u32, _HPCS>>`[src]

`pub fn pcst(&self) -> PCST_R`[src]

Bit 0 - Port connect status

`pub fn pcd(&self) -> PCD_R`[src]

Bit 1 - Port connect detected

`pub fn pe(&self) -> PE_R`[src]

Bit 2 - Port enable

`pub fn pedc(&self) -> PEDC_R`[src]

Bit 3 - Port enable/disable change

`pub fn prem(&self) -> PREM_R`[src]

Bit 6 - Port resume

`pub fn psp(&self) -> PSP_R`[src]

Bit 7 - Port suspend

`pub fn prst(&self) -> PRST_R`[src]

Bit 8 - Port reset

`pub fn plst(&self) -> PLST_R`[src]

Bits 10:11 - Port line status

`pub fn pp(&self) -> PP_R`[src]

Bit 12 - Port power

`pub fn ps(&self) -> PS_R`[src]

Bits 17:18 - Port speed

`impl R<u32, Reg<u32, _HCH0CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH1CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH2CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH3CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH4CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH5CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH6CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH7CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - Maximum packet size

`pub fn epnum(&self) -> EPNUM_R`[src]

Bits 11:14 - Endpoint number

`pub fn epdir(&self) -> EPDIR_R`[src]

Bit 15 - Endpoint direction

`pub fn lsd(&self) -> LSD_R`[src]

Bit 17 - Low-speed device

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn dar(&self) -> DAR_R`[src]

Bits 22:28 - Device address

`pub fn oddfrm(&self) -> ODDFRM_R`[src]

Bit 29 - Odd frame

`pub fn cdis(&self) -> CDIS_R`[src]

Bit 30 - Channel disable

`pub fn cen(&self) -> CEN_R`[src]

Bit 31 - Channel enable

`impl R<u32, Reg<u32, _HCH0INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH1INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH2INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH3INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH4INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH5INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH6INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH7INTF>>`[src]

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`pub fn ch(&self) -> CH_R`[src]

Bit 1 - Channel halted

`pub fn stall(&self) -> STALL_R`[src]

Bit 3 - STALL response received interrupt

`pub fn nak(&self) -> NAK_R`[src]

Bit 4 - NAK response received interrupt

`pub fn ack(&self) -> ACK_R`[src]

Bit 5 - ACK response received/transmitted interrupt

`pub fn usber(&self) -> USBER_R`[src]

Bit 7 - USB bus error

`pub fn bber(&self) -> BBER_R`[src]

Bit 8 - Babble error

`pub fn reqovr(&self) -> REQOVR_R`[src]

Bit 9 - Request queue overrun

`pub fn dter(&self) -> DTER_R`[src]

Bit 10 - Data toggle error

`impl R<u32, Reg<u32, _HCH0INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH1INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH2INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH3INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH4INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH5INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH6INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH7INTEN>>`[src]

`pub fn tfie(&self) -> TFIE_R`[src]

Bit 0 - Transfer completed interrupt enable

`pub fn chie(&self) -> CHIE_R`[src]

Bit 1 - Channel halted interrupt enable

`pub fn stallie(&self) -> STALLIE_R`[src]

Bit 3 - STALL interrupt enable

`pub fn nakie(&self) -> NAKIE_R`[src]

Bit 4 - NAK interrupt enable

`pub fn ackie(&self) -> ACKIE_R`[src]

Bit 5 - ACK interrupt enable

`pub fn usberie(&self) -> USBERIE_R`[src]

Bit 7 - USB bus error interrupt enable

`pub fn bberie(&self) -> BBERIE_R`[src]

Bit 8 - Babble error interrupt enable

`pub fn reqovrie(&self) -> REQOVRIE_R`[src]

Bit 9 - request queue overrun interrupt enable

`pub fn dterie(&self) -> DTERIE_R`[src]

Bit 10 - Data toggle error interrupt enable

`impl R<u32, Reg<u32, _HCH0LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH1LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH2LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH3LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH4LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH5LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH6LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _HCH7LEN>>`[src]

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn dpid(&self) -> DPID_R`[src]

Bits 29:30 - Data PID

`impl R<u32, Reg<u32, _DCFG>>`[src]

`pub fn ds(&self) -> DS_R`[src]

Bits 0:1 - Device speed

`pub fn nzlsoh(&self) -> NZLSOH_R`[src]

Bit 2 - Non-zero-length status OUT handshake

`pub fn dar(&self) -> DAR_R`[src]

Bits 4:10 - Device address

`pub fn eopft(&self) -> EOPFT_R`[src]

Bits 11:12 - end of periodic frame time

`impl R<u32, Reg<u32, _DCTL>>`[src]

`pub fn rwkup(&self) -> RWKUP_R`[src]

Bit 0 - Remote wakeup

`pub fn sd(&self) -> SD_R`[src]

Bit 1 - Soft disconnect

`pub fn gins(&self) -> GINS_R`[src]

Bit 2 - Global IN NAK status

`pub fn gons(&self) -> GONS_R`[src]

Bit 3 - Global OUT NAK status

`pub fn poif(&self) -> POIF_R`[src]

Bit 11 - Power-on initialization flag

`impl R<u32, Reg<u32, _DSTAT>>`[src]

`pub fn spst(&self) -> SPST_R`[src]

Bit 0 - Suspend status

`pub fn es(&self) -> ES_R`[src]

Bits 1:2 - Enumerated speed

`pub fn fnrsof(&self) -> FNRSOF_R`[src]

Bits 8:21 - Frame number of the received SOF

`impl R<u32, Reg<u32, _DIEPINTEN>>`[src]

`pub fn tfen(&self) -> TFEN_R`[src]

Bit 0 - Transfer finished interrupt enable

`pub fn epdisen(&self) -> EPDISEN_R`[src]

Bit 1 - Endpoint disabled interrupt enable

`pub fn citoen(&self) -> CITOEN_R`[src]

Bit 3 - Control IN timeout condition interrupt enable (Non-isochronous endpoints)

`pub fn eptxfuden(&self) -> EPTXFUDEN_R`[src]

Bit 4 - Endpoint Tx FIFO underrun interrupt enable bit

`pub fn iepneen(&self) -> IEPNEEN_R`[src]

Bit 6 - IN endpoint NAK effective interrupt enable

`impl R<u32, Reg<u32, _DOEPINTEN>>`[src]

`pub fn tfen(&self) -> TFEN_R`[src]

Bit 0 - Transfer finished interrupt enable

`pub fn epdisen(&self) -> EPDISEN_R`[src]

Bit 1 - Endpoint disabled interrupt enable

`pub fn stpfen(&self) -> STPFEN_R`[src]

Bit 3 - SETUP phase finished interrupt enable

`pub fn eprxfovren(&self) -> EPRXFOVREN_R`[src]

Bit 4 - Endpoint Rx FIFO overrun interrupt enable

`pub fn btbstpen(&self) -> BTBSTPEN_R`[src]

Bit 6 - Back-to-back SETUP packets interrupt enable

`impl R<u32, Reg<u32, _DAEPINT>>`[src]

`pub fn iepitb(&self) -> IEPITB_R`[src]

Bits 0:3 - Device all IN endpoint interrupt bits

`pub fn oepitb(&self) -> OEPITB_R`[src]

Bits 16:19 - Device all OUT endpoint interrupt bits

`impl R<u32, Reg<u32, _DAEPINTEN>>`[src]

`pub fn iepie(&self) -> IEPIE_R`[src]

Bits 0:3 - IN EP interrupt interrupt enable bits

`pub fn oepie(&self) -> OEPIE_R`[src]

Bits 16:19 - OUT endpoint interrupt enable bits

`impl R<u32, Reg<u32, _DVBUSDT>>`[src]

`pub fn dvbusdt(&self) -> DVBUSDT_R`[src]

Bits 0:15 - Device VBUS discharge time

`impl R<u32, Reg<u32, _DVBUSPT>>`[src]

`pub fn dvbuspt(&self) -> DVBUSPT_R`[src]

Bits 0:11 - Device VBUS pulsing time

`impl R<u32, Reg<u32, _DIEPFEINTEN>>`[src]

`pub fn ieptxfeie(&self) -> IEPTXFEIE_R`[src]

Bits 0:3 - IN EP Tx FIFO empty interrupt enable bits

`impl R<u32, Reg<u32, _DIEP0CTL>>`[src]

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:1 - Maximum packet length

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - endpoint active

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn txfnum(&self) -> TXFNUM_R`[src]

Bits 22:25 - TxFIFO number

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`impl R<u32, Reg<u32, _DIEP1CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn txfnum(&self) -> TXFNUM_R`[src]

Bits 22:25 - Tx FIFO number

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DIEP2CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn txfnum(&self) -> TXFNUM_R`[src]

Bits 22:25 - Tx FIFO number

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DIEP3CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn txfnum(&self) -> TXFNUM_R`[src]

Bits 22:25 - Tx FIFO number

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DOEP0CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn snoop(&self) -> SNOOP_R`[src]

Bit 20 - Snoop mode

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:1 - Maximum packet length

`impl R<u32, Reg<u32, _DOEP1CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn snoop(&self) -> SNOOP_R`[src]

Bit 20 - Snoop mode

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DOEP2CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn snoop(&self) -> SNOOP_R`[src]

Bit 20 - Snoop mode

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DOEP3CTL>>`[src]

`pub fn epen(&self) -> EPEN_R`[src]

Bit 31 - Endpoint enable

`pub fn epd(&self) -> EPD_R`[src]

Bit 30 - Endpoint disable

`pub fn stall(&self) -> STALL_R`[src]

Bit 21 - STALL handshake

`pub fn snoop(&self) -> SNOOP_R`[src]

Bit 20 - Snoop mode

`pub fn eptype(&self) -> EPTYPE_R`[src]

Bits 18:19 - Endpoint type

`pub fn naks(&self) -> NAKS_R`[src]

Bit 17 - NAK status

`pub fn eofrm_dpid(&self) -> EOFRM_DPID_R`[src]

Bit 16 - EOFRM/DPID

`pub fn epact(&self) -> EPACT_R`[src]

Bit 15 - Endpoint active

`pub fn mpl(&self) -> MPL_R`[src]

Bits 0:10 - maximum packet length

`impl R<u32, Reg<u32, _DIEP0INTF>>`[src]

`pub fn txfe(&self) -> TXFE_R`[src]

Bit 7 - Transmit FIFO empty

`pub fn iepne(&self) -> IEPNE_R`[src]

Bit 6 - IN endpoint NAK effective

`pub fn eptxfud(&self) -> EPTXFUD_R`[src]

Bit 4 - Endpoint Tx FIFO underrun

`pub fn cito(&self) -> CITO_R`[src]

Bit 3 - Control in timeout interrupt

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint finished

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DIEP1INTF>>`[src]

`pub fn txfe(&self) -> TXFE_R`[src]

Bit 7 - Transmit FIFO empty

`pub fn iepne(&self) -> IEPNE_R`[src]

Bit 6 - IN endpoint NAK effective

`pub fn eptxfud(&self) -> EPTXFUD_R`[src]

Bit 4 - Endpoint Tx FIFO underrun

`pub fn cito(&self) -> CITO_R`[src]

Bit 3 - Control in timeout interrupt

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint finished

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DIEP2INTF>>`[src]

`pub fn txfe(&self) -> TXFE_R`[src]

Bit 7 - Transmit FIFO empty

`pub fn iepne(&self) -> IEPNE_R`[src]

Bit 6 - IN endpoint NAK effective

`pub fn eptxfud(&self) -> EPTXFUD_R`[src]

Bit 4 - Endpoint Tx FIFO underrun

`pub fn cito(&self) -> CITO_R`[src]

Bit 3 - Control in timeout interrupt

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint finished

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DIEP3INTF>>`[src]

`pub fn txfe(&self) -> TXFE_R`[src]

Bit 7 - Transmit FIFO empty

`pub fn iepne(&self) -> IEPNE_R`[src]

Bit 6 - IN endpoint NAK effective

`pub fn eptxfud(&self) -> EPTXFUD_R`[src]

Bit 4 - Endpoint Tx FIFO underrun

`pub fn cito(&self) -> CITO_R`[src]

Bit 3 - Control in timeout interrupt

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint finished

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DOEP0INTF>>`[src]

`pub fn btbstp(&self) -> BTBSTP_R`[src]

Bit 6 - Back-to-back SETUP packets

`pub fn eprxfovr(&self) -> EPRXFOVR_R`[src]

Bit 4 - Endpoint Rx FIFO overrun

`pub fn stpf(&self) -> STPF_R`[src]

Bit 3 - Setup phase finished

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint disabled

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DOEP1INTF>>`[src]

`pub fn btbstp(&self) -> BTBSTP_R`[src]

Bit 6 - Back-to-back SETUP packets

`pub fn eprxfovr(&self) -> EPRXFOVR_R`[src]

Bit 4 - Endpoint Rx FIFO overrun

`pub fn stpf(&self) -> STPF_R`[src]

Bit 3 - Setup phase finished

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint disabled

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DOEP2INTF>>`[src]

`pub fn btbstp(&self) -> BTBSTP_R`[src]

Bit 6 - Back-to-back SETUP packets

`pub fn eprxfovr(&self) -> EPRXFOVR_R`[src]

Bit 4 - Endpoint Rx FIFO overrun

`pub fn stpf(&self) -> STPF_R`[src]

Bit 3 - Setup phase finished

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint disabled

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DOEP3INTF>>`[src]

`pub fn btbstp(&self) -> BTBSTP_R`[src]

Bit 6 - Back-to-back SETUP packets

`pub fn eprxfovr(&self) -> EPRXFOVR_R`[src]

Bit 4 - Endpoint Rx FIFO overrun

`pub fn stpf(&self) -> STPF_R`[src]

Bit 3 - Setup phase finished

`pub fn epdis(&self) -> EPDIS_R`[src]

Bit 1 - Endpoint disabled

`pub fn tf(&self) -> TF_R`[src]

Bit 0 - Transfer finished

`impl R<u32, Reg<u32, _DIEP0LEN>>`[src]

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:20 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:6 - Transfer length

`impl R<u32, Reg<u32, _DOEP0LEN>>`[src]

`pub fn stpcnt(&self) -> STPCNT_R`[src]

Bits 29:30 - SETUP packet count

`pub fn pcnt(&self) -> PCNT_R`[src]

Bit 19 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:6 - Transfer length

`impl R<u32, Reg<u32, _DIEP1LEN>>`[src]

`pub fn mcpf(&self) -> MCPF_R`[src]

Bits 29:30 - Multi packet count per frame

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DIEP2LEN>>`[src]

`pub fn mcpf(&self) -> MCPF_R`[src]

Bits 29:30 - Multi packet count per frame

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DIEP3LEN>>`[src]

`pub fn mcpf(&self) -> MCPF_R`[src]

Bits 29:30 - Multi packet count per frame

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DOEP1LEN>>`[src]

`pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R`[src]

Bits 29:30 - SETUP packet count/Received data PID

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DOEP2LEN>>`[src]

`pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R`[src]

Bits 29:30 - SETUP packet count/Received data PID

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DOEP3LEN>>`[src]

`pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R`[src]

Bits 29:30 - SETUP packet count/Received data PID

`pub fn pcnt(&self) -> PCNT_R`[src]

Bits 19:28 - Packet count

`pub fn tlen(&self) -> TLEN_R`[src]

Bits 0:18 - Transfer length

`impl R<u32, Reg<u32, _DIEP0TFSTAT>>`[src]

`pub fn ieptfs(&self) -> IEPTFS_R`[src]

Bits 0:15 - IN endpoint TxFIFO space remaining

`impl R<u32, Reg<u32, _DIEP1TFSTAT>>`[src]

`pub fn ieptfs(&self) -> IEPTFS_R`[src]

Bits 0:15 - IN endpoint TxFIFO space remaining

`impl R<u32, Reg<u32, _DIEP2TFSTAT>>`[src]

`pub fn ieptfs(&self) -> IEPTFS_R`[src]

Bits 0:15 - IN endpoint TxFIFO space remaining

`impl R<u32, Reg<u32, _DIEP3TFSTAT>>`[src]

`pub fn ieptfs(&self) -> IEPTFS_R`[src]

Bits 0:15 - IN endpoint TxFIFO space remaining

`impl R<u32, Reg<u32, _PWRCLKCTL>>`[src]

`pub fn suclk(&self) -> SUCLK_R`[src]

Bit 0 - Stop the USB clock

`pub fn shclk(&self) -> SHCLK_R`[src]

Bit 1 - Stop HCLK

`impl R<u32, Reg<u32, _CTL>>`[src]

`pub fn wdgten(&self) -> WDGTEN_R`[src]

Bit 7 - Activation bit

`pub fn cnt(&self) -> CNT_R`[src]

Bits 0:6 - 7-bit counter

`impl R<u32, Reg<u32, _CFG>>`[src]

`pub fn ewie(&self) -> EWIE_R`[src]

Bit 9 - Early wakeup interrupt

`pub fn psc(&self) -> PSC_R`[src]

Bits 7:8 - Prescaler

`pub fn win(&self) -> WIN_R`[src]

Bits 0:6 - 7-bit window value

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn ewif(&self) -> EWIF_R`[src]

Bit 0 - Early wakeup interrupt flag

`impl R<u32, Reg<u32, _MSTOP>>`[src]

`pub fn timestop(&self) -> TIMESTOP_R`[src]

Bit 0 - Pause (1) or run (0) the timer

`impl R<u32, Reg<u32, _MSIP>>`[src]

`pub fn msip(&self) -> MSIP_R`[src]

Bit 0 - Generate software interrupts

Trait Implementations

`impl<U, T, FI> PartialEq<FI> for R<U, T> where U: PartialEq, FI: Copy + Into,` [src]

`fn eq(&self, other: &FI) -> bool`[src]

`#[must_use]fn ne(&self, other: &Rhs) -> bool`1.0.0[src]

Auto Trait Implementations

`impl<U, T> Send for R<U, T> where T: Send, U: Send,`

`impl<U, T> Sync for R<U, T> where T: Sync, U: Sync,`

`impl<U, T> Unpin for R<U, T> where T: Unpin, U: Unpin,`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

[−][src]Struct gd32vf103_pac::generic::R

Implementations

impl<U, T> R<U, T> where U: Copy, [src]

pub fn bits(&self) -> U[src]

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

pub fn bit_is_clear(&self) -> bool[src]

pub fn bit_is_set(&self) -> bool[src]

impl R<u32, Reg<u32, _STAT>>[src]

pub fn strc(&self) -> STRC_R[src]

pub fn stic(&self) -> STIC_R[src]

pub fn eoic(&self) -> EOIC_R[src]

pub fn eoc(&self) -> EOC_R[src]

pub fn wde(&self) -> WDE_R[src]

impl R<u32, Reg<u32, _CTL0>>[src]

pub fn rwden(&self) -> RWDEN_R[src]

pub fn iwden(&self) -> IWDEN_R[src]

pub fn syncm(&self) -> SYNCM_R[src]

pub fn disnum(&self) -> DISNUM_R[src]

pub fn disic(&self) -> DISIC_R[src]

pub fn disrc(&self) -> DISRC_R[src]

pub fn ica(&self) -> ICA_R[src]

pub fn wdsc(&self) -> WDSC_R[src]

pub fn sm(&self) -> SM_R[src]

pub fn eoicie(&self) -> EOICIE_R[src]

pub fn wdeie(&self) -> WDEIE_R[src]

pub fn eocie(&self) -> EOCIE_R[src]

pub fn wdchsel(&self) -> WDCHSEL_R[src]

impl R<u32, Reg<u32, _CTL1>>[src]

pub fn tsvren(&self) -> TSVREN_R[src]

pub fn swrcst(&self) -> SWRCST_R[src]

pub fn swicst(&self) -> SWICST_R[src]

pub fn eterc(&self) -> ETERC_R[src]

pub fn etsrc(&self) -> ETSRC_R[src]

pub fn eteic(&self) -> ETEIC_R[src]

pub fn etsic(&self) -> ETSIC_R[src]

pub fn dal(&self) -> DAL_R[src]

pub fn dma(&self) -> DMA_R[src]

pub fn rstclb(&self) -> RSTCLB_R[src]

pub fn clb(&self) -> CLB_R[src]

pub fn ctn(&self) -> CTN_R[src]

pub fn adcon(&self) -> ADCON_R[src]

impl R<u32, Reg<u32, _SAMPT0>>[src]

pub fn spt10(&self) -> SPT10_R[src]

pub fn spt11(&self) -> SPT11_R[src]

pub fn spt12(&self) -> SPT12_R[src]

pub fn spt13(&self) -> SPT13_R[src]

pub fn spt14(&self) -> SPT14_R[src]

pub fn spt15(&self) -> SPT15_R[src]

pub fn spt16(&self) -> SPT16_R[src]

pub fn spt17(&self) -> SPT17_R[src]

impl R<u32, Reg<u32, _SAMPT1>>[src]

pub fn spt0(&self) -> SPT0_R[src]

pub fn spt1(&self) -> SPT1_R[src]

pub fn spt2(&self) -> SPT2_R[src]

pub fn spt3(&self) -> SPT3_R[src]

pub fn spt4(&self) -> SPT4_R[src]

pub fn spt5(&self) -> SPT5_R[src]

pub fn spt6(&self) -> SPT6_R[src]

pub fn spt7(&self) -> SPT7_R[src]

pub fn spt8(&self) -> SPT8_R[src]

pub fn spt9(&self) -> SPT9_R[src]

impl R<u32, Reg<u32, _IOFF0>>[src]

pub fn ioff(&self) -> IOFF_R[src]

impl R<u32, Reg<u32, _IOFF1>>[src]

pub fn ioff(&self) -> IOFF_R[src]

impl R<u32, Reg<u32, _IOFF2>>[src]

pub fn ioff(&self) -> IOFF_R[src]

impl R<u32, Reg<u32, _IOFF3>>[src]

pub fn ioff(&self) -> IOFF_R[src]

impl R<u32, Reg<u32, _WDHT>>[src]

pub fn wdht(&self) -> WDHT_R[src]

impl R<u32, Reg<u32, _WDLT>>[src]

pub fn wdlt(&self) -> WDLT_R[src]

impl R<u32, Reg<u32, _RSQ0>>[src]

pub fn rl(&self) -> RL_R[src]

pub fn rsq15(&self) -> RSQ15_R[src]

pub fn rsq14(&self) -> RSQ14_R[src]

pub fn rsq13(&self) -> RSQ13_R[src]

pub fn rsq12(&self) -> RSQ12_R[src]

`impl<U, T> R<U, T> where U: Copy,` [src]

`pub fn bits(&self) -> U`[src]

`impl<FI> R<bool, FI>`[src]

`pub fn bit(&self) -> bool`[src]

`pub fn bit_is_clear(&self) -> bool`[src]

`pub fn bit_is_set(&self) -> bool`[src]

`impl R<u32, Reg<u32, _STAT>>`[src]

`pub fn strc(&self) -> STRC_R`[src]

`pub fn stic(&self) -> STIC_R`[src]

`pub fn eoic(&self) -> EOIC_R`[src]

`pub fn eoc(&self) -> EOC_R`[src]

`pub fn wde(&self) -> WDE_R`[src]

`impl R<u32, Reg<u32, _CTL0>>`[src]

`pub fn rwden(&self) -> RWDEN_R`[src]

`pub fn iwden(&self) -> IWDEN_R`[src]

`pub fn syncm(&self) -> SYNCM_R`[src]

`pub fn disnum(&self) -> DISNUM_R`[src]

`pub fn disic(&self) -> DISIC_R`[src]

`pub fn disrc(&self) -> DISRC_R`[src]

`pub fn ica(&self) -> ICA_R`[src]

`pub fn wdsc(&self) -> WDSC_R`[src]

`pub fn sm(&self) -> SM_R`[src]

`pub fn eoicie(&self) -> EOICIE_R`[src]

`pub fn wdeie(&self) -> WDEIE_R`[src]

`pub fn eocie(&self) -> EOCIE_R`[src]

`pub fn wdchsel(&self) -> WDCHSEL_R`[src]

`impl R<u32, Reg<u32, _CTL1>>`[src]

`pub fn tsvren(&self) -> TSVREN_R`[src]

`pub fn swrcst(&self) -> SWRCST_R`[src]

`pub fn swicst(&self) -> SWICST_R`[src]

`pub fn eterc(&self) -> ETERC_R`[src]

`pub fn etsrc(&self) -> ETSRC_R`[src]

`pub fn eteic(&self) -> ETEIC_R`[src]

`pub fn etsic(&self) -> ETSIC_R`[src]

`pub fn dal(&self) -> DAL_R`[src]

`pub fn dma(&self) -> DMA_R`[src]

`pub fn rstclb(&self) -> RSTCLB_R`[src]

`pub fn clb(&self) -> CLB_R`[src]

`pub fn ctn(&self) -> CTN_R`[src]

`pub fn adcon(&self) -> ADCON_R`[src]

`impl R<u32, Reg<u32, _SAMPT0>>`[src]

`pub fn spt10(&self) -> SPT10_R`[src]

`pub fn spt11(&self) -> SPT11_R`[src]

`pub fn spt12(&self) -> SPT12_R`[src]

`pub fn spt13(&self) -> SPT13_R`[src]

`pub fn spt14(&self) -> SPT14_R`[src]

`pub fn spt15(&self) -> SPT15_R`[src]

`pub fn spt16(&self) -> SPT16_R`[src]

`pub fn spt17(&self) -> SPT17_R`[src]

`impl R<u32, Reg<u32, _SAMPT1>>`[src]

`pub fn spt0(&self) -> SPT0_R`[src]

`pub fn spt1(&self) -> SPT1_R`[src]

`pub fn spt2(&self) -> SPT2_R`[src]

`pub fn spt3(&self) -> SPT3_R`[src]

`pub fn spt4(&self) -> SPT4_R`[src]

`pub fn spt5(&self) -> SPT5_R`[src]

`pub fn spt6(&self) -> SPT6_R`[src]

`pub fn spt7(&self) -> SPT7_R`[src]

`pub fn spt8(&self) -> SPT8_R`[src]

`pub fn spt9(&self) -> SPT9_R`[src]

`impl R<u32, Reg<u32, _IOFF0>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

`impl R<u32, Reg<u32, _IOFF1>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

`impl R<u32, Reg<u32, _IOFF2>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

`impl R<u32, Reg<u32, _IOFF3>>`[src]

`pub fn ioff(&self) -> IOFF_R`[src]

`impl R<u32, Reg<u32, _WDHT>>`[src]

`pub fn wdht(&self) -> WDHT_R`[src]

`impl R<u32, Reg<u32, _WDLT>>`[src]

`pub fn wdlt(&self) -> WDLT_R`[src]

`impl R<u32, Reg<u32, _RSQ0>>`[src]

`pub fn rl(&self) -> RL_R`[src]

`pub fn rsq15(&self) -> RSQ15_R`[src]

`pub fn rsq14(&self) -> RSQ14_R`[src]

`pub fn rsq13(&self) -> RSQ13_R`[src]

`pub fn rsq12(&self) -> RSQ12_R`[src]

`impl R<u32, Reg<u32, _RSQ1>>`[src]

`pub fn rsq11(&self) -> RSQ11_R`[src]