[][src]Type Definition gd32vf103_pac::dma1::CH0PADDR

type CH0PADDR = Reg<u32, _CH0PADDR>;

Channel 0 peripheral base address register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see ch0paddr module

Trait Implementations

impl Readable for CH0PADDR[src]

read() method returns ch0paddr::R reader structure

impl ResetValue for CH0PADDR[src]

Register CH0PADDR reset()'s with value 0

type Type = u32

Register size

impl Writable for CH0PADDR[src]

write(|w| ..) method takes ch0paddr::W writer structure