RegisterBlock

gd32f3x0_pac::timer13

Struct RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub ctl0: Reg<CTL0_SPEC>,
    pub dmainten: Reg<DMAINTEN_SPEC>,
    pub intf: Reg<INTF_SPEC>,
    pub swevg: Reg<SWEVG_SPEC>,
    pub chctl2: Reg<CHCTL2_SPEC>,
    pub cnt: Reg<CNT_SPEC>,
    pub psc: Reg<PSC_SPEC>,
    pub car: Reg<CAR_SPEC>,
    pub ch0cv: Reg<CH0CV_SPEC>,
    pub irmp: Reg<IRMP_SPEC>,
    pub cfg: Reg<CFG_SPEC>,
    /* private fields */
}

Expand description

Register block

Fields§

§ctl0: Reg<CTL0_SPEC>

0x00 - control register 1

§dmainten: Reg<DMAINTEN_SPEC>

0x0c - DMA/Interrupt enable register

§intf: Reg<INTF_SPEC>

0x10 - interrupt flag register

§swevg: Reg<SWEVG_SPEC>

0x14 - event generation register

§chctl2: Reg<CHCTL2_SPEC>

0x20 - capture/compare enable register

§cnt: Reg<CNT_SPEC>

0x24 - counter

§psc: Reg<PSC_SPEC>

0x28 - prescaler

§car: Reg<CAR_SPEC>

0x2c - auto-reload register

§ch0cv: Reg<CH0CV_SPEC>

0x34 - capture/compare register 0

§irmp: Reg<IRMP_SPEC>

0x50 - channel input remap register

§cfg: Reg<CFG_SPEC>

0xfc - configuration register

Implementations§

impl RegisterBlock

pub fn chctl0_input(&self) -> &Reg<CHCTL0_INPUT_SPEC>

0x18 - capture/compare mode register (input mode)

pub fn chctl0_output(&self) -> &Reg<CHCTL0_OUTPUT_SPEC>

0x18 - capture/compare mode register (output mode)

Auto Trait Implementations§

impl !Freeze for RegisterBlock

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations§

impl<T> Any for T
where T: 'static + ?Sized,

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impl<T> From<T> for T

fn from(t: T) -> T

Returns the argument unchanged.

impl<T, U> Into<U> for T
where U: From<T>,

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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.