Enum gd32f1x0_hal::pac::timer1::smcfg::SMC_A

#[repr(u8)]
pub enum SMC_A {
    DISABLED,
    QUADRATUREDECODERMODE0,
    QUADRATUREDECODERMODE1,
    QUADRATUREDECODERMODE2,
    RESTARTMODE,
    PAUSEMODE,
    EVENTMODE,
    EXTERNALCLOCKMODE,
}

Slave mode control

Value on reset: 0

Variants

DISABLED

0: Slave mode disabled - if CEN=1 then the prescaler is clocked directly by the internal clock.

QUADRATUREDECODERMODE0

1: Quadrature decoder mode 0 - Counter counts up/down on CI1FE1 edge depending on CI0FE0 level.

QUADRATUREDECODERMODE1

2: Quadrature decoder mode 1 - Counter counts up/down on CI0FE0 edge depending on CI1FE1 level.

QUADRATUREDECODERMODE2

3: Quadrature decoder mode 2 - Counter counts up/down on both CI0FE0 and CI1FE1 edges depending on the level of the other input.

RESTARTMODE

4: Restart Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers.

PAUSEMODE

5: Pause Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled.

EVENTMODE

6: Event Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled.

EXTERNALCLOCKMODE

7: External Clock Mode 0 - Rising edges of the selected trigger (TRGI) clock the counter.

Trait Implementations

impl Clone for SMC_A

fn clone(&self) -> SMC_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SMC_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq<SMC_A> for SMC_A

fn eq(&self, other: &SMC_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for SMC_A

impl StructuralPartialEq for SMC_A