Type Definition gd32f1::gd32f130::dma::CH1PADDR

type CH1PADDR = Reg<u32, _CH1PADDR>;

DMA channel 1 peripheral base address register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see ch1paddr module

Trait Implementations

impl Readable for CH1PADDR

read() method returns ch1paddr::R reader structure

impl ResetValue for CH1PADDR

Register CH1PADDR reset()’s with value 0

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register

impl Writable for CH1PADDR

write(|w| ..) method takes ch1paddr::W writer structure