Enum Operand 

pub enum Operand {
    Register(u8),
    FpRegister(u8),
    Immediate(i16),
    Immediate32(i32),
    Address(u32),
    Condition(u8),
    SpecialRegister(u16),
    ShiftAmount(u8),
    Mask(u32),
}

PowerPC instruction operand representation.

Memory Optimization

Uses appropriate integer sizes:

• Register indices: u8 (PowerPC has 32 GPRs, fits in 5 bits)
• Immediate values: i16 for 16-bit immediates, i32 for 32-bit
• Addresses: u32 (full 32-bit address space)
• Special registers: u16 (SPR encoding uses 10 bits)

Variants

Register(u8)

General-purpose register (GPR) - 32 registers (r0-r31), stored as u8

FpRegister(u8)

Floating-point register (FPR) - 32 registers (f0-f31), stored as u8

Immediate(i16)

16-bit signed immediate value (SI field in instruction)

Immediate32(i32)

32-bit signed immediate value (used for branch targets, etc.)

Address(u32)

32-bit address (absolute or relative)

Condition(u8)

Condition register field (4 bits, stored as u8)

SpecialRegister(u16)

Special-purpose register (SPR) - 10-bit encoding, stored as u16

ShiftAmount(u8)

Shift amount (5 bits, stored as u8)

Mask(u32)

Rotate mask (32 bits, stored as u32)

Trait Implementations

impl Clone for Operand

fn clone(&self) -> Operand

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Operand

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for Operand

fn eq(&self, other: &Operand) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Operand

impl Eq for Operand

impl StructuralPartialEq for Operand