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FrameHostOperands

gam_solve::gpu_kernels::arrow_schur

Struct FrameHostOperands 

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pub struct FrameHostOperands {
Show 27 fields
    pub s_off: Vec<i32>,
    pub s_m: Vec<i32>,
    pub s_r: Vec<i32>,
    pub s_ptr: Vec<i32>,
    pub s_data: Vec<f64>,
    pub s_blocks: usize,
    pub g_off_i: Vec<i32>,
    pub g_off_j: Vec<i32>,
    pub g_ri: Vec<i32>,
    pub g_rj: Vec<i32>,
    pub g_mj: Vec<i32>,
    pub g_ptr: Vec<i32>,
    pub g_data: Vec<f64>,
    pub w_ptr: Vec<i32>,
    pub w_data: Vec<f64>,
    pub g_group_ptr: Vec<i32>,
    pub g_group_blocks: Vec<i32>,
    pub g_group_off: Vec<i32>,
    pub g_group_width: Vec<i32>,
    pub g_groups: usize,
    pub g_max_work: usize,
    pub htb_ptr: Vec<i32>,
    pub htb: Vec<f64>,
    pub q_of: Vec<i32>,
    pub n_rows: usize,
    pub k: usize,
    pub max_q: usize,

}
Expand description

The ridge-INDEPENDENT host operands of the framed SAE reduced-Schur system, marshalled into the contiguous upload layout flatten_device_sae_frame_data consumes. Split out (with compute_ainv_host, the sole ridge-DEPENDENT buffer) so a single source builds both the per-trial flatten and the resident frame, and so the host-marshalling cost is measurable off-device. Every field here is a pure function of (sys, data, frame) — invariant across the ridge ladder — which is exactly why the resident frame can upload them once.

Fields§

§s_off: Vec<i32>§s_m: Vec<i32>§s_r: Vec<i32>§s_ptr: Vec<i32>§s_data: Vec<f64>§s_blocks: usize§g_off_i: Vec<i32>§g_off_j: Vec<i32>§g_ri: Vec<i32>§g_rj: Vec<i32>§g_mj: Vec<i32>§g_ptr: Vec<i32>§g_data: Vec<f64>§w_ptr: Vec<i32>§w_data: Vec<f64>§g_group_ptr: Vec<i32>

CSR over disjoint output spans. g_group_blocks[g_group_ptr[g]..] lists, in original block order, every G block contributing to the scalar output range [g_group_off[g], g_group_off[g] + g_group_width[g]).

§g_group_blocks: Vec<i32>§g_group_off: Vec<i32>§g_group_width: Vec<i32>§g_groups: usize§g_max_work: usize§htb_ptr: Vec<i32>§htb: Vec<f64>§q_of: Vec<i32>§n_rows: usize§k: usize§max_q: usize

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