pub enum RegOp {
Show 50 variants
Output(u8, u32),
Input(u8, u32),
CopyReg(u8, u8),
CopyImm(u8, f32),
NegReg(u8, u8),
AbsReg(u8, u8),
RecipReg(u8, u8),
SqrtReg(u8, u8),
SquareReg(u8, u8),
FloorReg(u8, u8),
CeilReg(u8, u8),
RoundReg(u8, u8),
SinReg(u8, u8),
CosReg(u8, u8),
TanReg(u8, u8),
AsinReg(u8, u8),
AcosReg(u8, u8),
AtanReg(u8, u8),
ExpReg(u8, u8),
LnReg(u8, u8),
NotReg(u8, u8),
AddRegImm(u8, u8, f32),
MulRegImm(u8, u8, f32),
DivRegImm(u8, u8, f32),
DivImmReg(u8, u8, f32),
SubImmReg(u8, u8, f32),
SubRegImm(u8, u8, f32),
ModRegReg(u8, u8, u8),
ModRegImm(u8, u8, f32),
AtanRegImm(u8, u8, f32),
CompareRegImm(u8, u8, f32),
MinRegImm(u8, u8, f32),
MaxRegImm(u8, u8, f32),
AndRegImm(u8, u8, f32),
OrRegImm(u8, u8, f32),
ModImmReg(u8, u8, f32),
AtanImmReg(u8, u8, f32),
CompareImmReg(u8, u8, f32),
AddRegReg(u8, u8, u8),
MulRegReg(u8, u8, u8),
DivRegReg(u8, u8, u8),
SubRegReg(u8, u8, u8),
CompareRegReg(u8, u8, u8),
AtanRegReg(u8, u8, u8),
MinRegReg(u8, u8, u8),
MaxRegReg(u8, u8, u8),
AndRegReg(u8, u8, u8),
OrRegReg(u8, u8, u8),
Load(u8, u32),
Store(u8, u32),
}
Expand description
Operations used in register-allocated tapes
Arguments, in order, are
- Output register
- LHS register (or input slot for
Input
) - RHS register (or immediate for
*Imm
)
We have a maximum of 256 registers, though some tapes (e.g. ones targeting physical hardware) may choose to use fewer.
Variants§
Output(u8, u32)
Writes an output variable by index
Input(u8, u32)
Read an input variable by index
CopyReg(u8, u8)
Copies the given register
CopyImm(u8, f32)
Copy an immediate to a register
NegReg(u8, u8)
Negate the given register
AbsReg(u8, u8)
Take the absolute value of the given register
RecipReg(u8, u8)
Take the reciprocal of the given register (1.0 / value)
SqrtReg(u8, u8)
Take the square root of the given register
SquareReg(u8, u8)
Square the given register
FloorReg(u8, u8)
Returns the largest integer less than or equal to self
CeilReg(u8, u8)
Returns the smallest integer greater than or equal to self
RoundReg(u8, u8)
Returns the nearest integer to self
. If a value is half-way between two integers, round away from 0.0
.
SinReg(u8, u8)
Computes the sine of the given register (in radians)
CosReg(u8, u8)
Computes the cosine of the given register (in radians)
TanReg(u8, u8)
Computes the tangent of the given register (in radians)
AsinReg(u8, u8)
Computes the arcsin of the given register (in radians)
AcosReg(u8, u8)
Computes the arccos of the given register (in radians)
AtanReg(u8, u8)
Computes the arctangent of the given register (in radians)
ExpReg(u8, u8)
Computes the exponential function of the given register
LnReg(u8, u8)
Computes the natural log of the given register
NotReg(u8, u8)
Computes the logical negation of the given register
Equivalent to if arg == 0 { 1 } else { 0 }
AddRegImm(u8, u8, f32)
Add a register and an immediate
MulRegImm(u8, u8, f32)
Multiply a register and an immediate
DivRegImm(u8, u8, f32)
Divides a register and an immediate
DivImmReg(u8, u8, f32)
Divides an immediate by a register
SubImmReg(u8, u8, f32)
Subtract a register from an immediate
SubRegImm(u8, u8, f32)
Subtract an immediate from a register
ModRegReg(u8, u8, u8)
Take the module (least nonnegative remainder) of two registers
ModRegImm(u8, u8, f32)
Take the module (least nonnegative remainder) of a register and an immediate
AtanRegImm(u8, u8, f32)
atan2 of a position (y, x)
specified as register, immediate
CompareRegImm(u8, u8, f32)
Compares a register with an immediate
MinRegImm(u8, u8, f32)
Compute the minimum of a register and an immediate
MaxRegImm(u8, u8, f32)
Compute the maximum of a register and an immediate
AndRegImm(u8, u8, f32)
Logical AND
(short-circuiting)
This is equivalent to if lhs == 0 { lhs } else { imm }
OrRegImm(u8, u8, f32)
Logical OR
(short-circuiting)
This is equivalent to if lhs != 0 { lhs } else { imm }
ModImmReg(u8, u8, f32)
Take the module (least nonnegative remainder) of an immediate and a register
AtanImmReg(u8, u8, f32)
atan2 of a position (y, x)
specified as immediate, register
CompareImmReg(u8, u8, f32)
Compares an immediate with a register
AddRegReg(u8, u8, u8)
Add two registers
MulRegReg(u8, u8, u8)
Multiply two registers
DivRegReg(u8, u8, u8)
Divides two registers
SubRegReg(u8, u8, u8)
Subtract one register from another
CompareRegReg(u8, u8, u8)
Compares two registers
AtanRegReg(u8, u8, u8)
atan2 of a position (y, x)
specified as register, register
MinRegReg(u8, u8, u8)
Take the minimum of two registers
MaxRegReg(u8, u8, u8)
Take the maximum of two registers
AndRegReg(u8, u8, u8)
Logical AND
(short-circuiting)
This is equivalent to if lhs == 0 { lhs } else { rhs }
OrRegReg(u8, u8, u8)
Logical OR
(short-circuiting)
This is equivalent to if lhs != 0 { lhs } else { rhs }
Load(u8, u32)
Read from a memory slot to a register
Store(u8, u32)
Write from a register to a memory slot
Trait Implementations§
Source§impl<'de> Deserialize<'de> for RegOp
impl<'de> Deserialize<'de> for RegOp
Source§fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
Source§impl<'_enum> From<&'_enum RegOp> for RegOpDiscriminants
impl<'_enum> From<&'_enum RegOp> for RegOpDiscriminants
Source§fn from(val: &'_enum RegOp) -> RegOpDiscriminants
fn from(val: &'_enum RegOp) -> RegOpDiscriminants
Source§impl From<RegOp> for RegOpDiscriminants
impl From<RegOp> for RegOpDiscriminants
Source§fn from(val: RegOp) -> RegOpDiscriminants
fn from(val: RegOp) -> RegOpDiscriminants
Source§impl IntoDiscriminant for RegOp
impl IntoDiscriminant for RegOp
Source§type Discriminant = RegOpDiscriminants
type Discriminant = RegOpDiscriminants
fn discriminant(&self) -> Self::Discriminant
impl Copy for RegOp
impl StructuralPartialEq for RegOp
Auto Trait Implementations§
impl Freeze for RegOp
impl RefUnwindSafe for RegOp
impl Send for RegOp
impl Sync for RegOp
impl Unpin for RegOp
impl UnwindSafe for RegOp
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