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SimdBase

Trait SimdBase 

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pub trait SimdBase<S: Simd>:
    Copy
    + Sync
    + Send
    + 'static
    + Bytes
    + SimdFrom<Self::Element, S>
    + Index<usize, Output = Self::Element>
    + IndexMut<usize, Output = Self::Element>
    + Deref<Target = Self::Array>
    + DerefMut<Target = Self::Array> {
    type Element: SimdElement;
    type Mask: SimdMask<S, Element = <Self::Element as SimdElement>::Mask>;
    type Block: SimdBase<S, Element = Self::Element>;
    type Array;

    const N: usize;

    // Required methods
    fn witness(&self) -> S;
    fn as_slice(&self) -> &[Self::Element];
    fn as_mut_slice(&mut self) -> &mut [Self::Element];
    fn from_slice(simd: S, slice: &[Self::Element]) -> Self;
    fn store_slice(&self, slice: &mut [Self::Element]);
    fn block_splat(block: Self::Block) -> Self;
    fn from_fn(simd: S, f: impl FnMut(usize) -> Self::Element) -> Self;
    fn splat(simd: S, val: Self::Element) -> Self;
    fn slide<const SHIFT: usize>(self, rhs: impl SimdInto<Self, S>) -> Self;
    fn slide_within_blocks<const SHIFT: usize>(
        self,
        rhs: impl SimdInto<Self, S>,
    ) -> Self;
}
Expand description

Base functionality implemented by all SIMD vectors.

Required Associated Constants§

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const N: usize

This vector type’s lane count. This is useful when you’re working with a native-width vector (e.g. Simd::f32s) and want to process data in native-width chunks.

Required Associated Types§

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type Element: SimdElement

The type of this vector’s elements.

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type Mask: SimdMask<S, Element = <Self::Element as SimdElement>::Mask>

A SIMD vector mask with the same number of elements.

The mask element is represented as an integer which is all-0 for false and all-1 for true. When we get deep into AVX-512, we need to think about predication masks.

One possibility to consider is that the SIMD trait grows maskAxB associated types.

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type Block: SimdBase<S, Element = Self::Element>

A 128-bit SIMD vector of the same scalar type.

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type Array

The array type that this vector type corresponds to, which will always be [Self::Element; Self::N]. It has the same layout as this vector type, but likely has a lower alignment.

Required Methods§

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fn witness(&self) -> S

Get the Simd implementation associated with this type.

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fn as_slice(&self) -> &[Self::Element]

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fn as_mut_slice(&mut self) -> &mut [Self::Element]

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fn from_slice(simd: S, slice: &[Self::Element]) -> Self

Create a SIMD vector from a slice.

The slice must be exactly the size of the SIMD vector.

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fn store_slice(&self, slice: &mut [Self::Element])

Store a SIMD vector into a slice.

The slice must be exactly the size of the SIMD vector.

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fn block_splat(block: Self::Block) -> Self

Create a SIMD vector from a 128-bit vector of the same scalar type, repeated.

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fn from_fn(simd: S, f: impl FnMut(usize) -> Self::Element) -> Self

Create a SIMD vector where each element is produced by calling f with that element’s lane index (from 0 to SimdBase::N - 1).

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fn splat(simd: S, val: Self::Element) -> Self

Create a SIMD vector with all elements set to the given value.

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fn slide<const SHIFT: usize>(self, rhs: impl SimdInto<Self, S>) -> Self

Concatenate [self, rhs] and extract Self::N elements starting at index SHIFT.

SHIFT must be within [0, Self::N].

This can be used to implement a “shift items” operation by providing all zeroes as one operand. For a left shift, the right-hand side should be all zeroes. For a right shift by M items, the left-hand side should be all zeroes, and the shift amount will be Self::N - M.

This can also be used to rotate items within a vector by providing the same vector as both operands.


slide::<1>([a b c d], [e f g h]) == [b c d e]
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fn slide_within_blocks<const SHIFT: usize>( self, rhs: impl SimdInto<Self, S>, ) -> Self

Like slide, but operates independently on each 128-bit block.

Dyn Compatibility§

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors§

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impl<S: Simd> SimdBase<S> for f32x4<S>

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impl<S: Simd> SimdBase<S> for f32x8<S>

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impl<S: Simd> SimdBase<S> for f32x16<S>

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impl<S: Simd> SimdBase<S> for f64x2<S>

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impl<S: Simd> SimdBase<S> for f64x4<S>

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impl<S: Simd> SimdBase<S> for f64x8<S>

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impl<S: Simd> SimdBase<S> for i8x16<S>

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impl<S: Simd> SimdBase<S> for i8x32<S>

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impl<S: Simd> SimdBase<S> for i8x64<S>

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impl<S: Simd> SimdBase<S> for i16x8<S>

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impl<S: Simd> SimdBase<S> for i16x16<S>

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impl<S: Simd> SimdBase<S> for i16x32<S>

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impl<S: Simd> SimdBase<S> for i32x4<S>

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impl<S: Simd> SimdBase<S> for i32x8<S>

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impl<S: Simd> SimdBase<S> for i32x16<S>

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impl<S: Simd> SimdBase<S> for mask8x16<S>

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impl<S: Simd> SimdBase<S> for mask8x32<S>

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impl<S: Simd> SimdBase<S> for mask8x64<S>

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impl<S: Simd> SimdBase<S> for mask16x8<S>

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impl<S: Simd> SimdBase<S> for mask16x16<S>

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impl<S: Simd> SimdBase<S> for mask16x32<S>

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impl<S: Simd> SimdBase<S> for mask32x4<S>

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impl<S: Simd> SimdBase<S> for mask32x8<S>

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impl<S: Simd> SimdBase<S> for mask32x16<S>

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impl<S: Simd> SimdBase<S> for mask64x2<S>

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impl<S: Simd> SimdBase<S> for mask64x4<S>

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impl<S: Simd> SimdBase<S> for mask64x8<S>

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impl<S: Simd> SimdBase<S> for u8x16<S>

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impl<S: Simd> SimdBase<S> for u8x32<S>

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impl<S: Simd> SimdBase<S> for u8x64<S>

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impl<S: Simd> SimdBase<S> for u16x8<S>

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impl<S: Simd> SimdBase<S> for u16x16<S>

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impl<S: Simd> SimdBase<S> for u16x32<S>

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impl<S: Simd> SimdBase<S> for u32x4<S>

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impl<S: Simd> SimdBase<S> for u32x8<S>

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impl<S: Simd> SimdBase<S> for u32x16<S>