#[repr(u64)]pub enum PmuEvent {
TfmaWaitTenb = 18,
}Expand description
PMU event codes for the ET-SoC-1. The value is written to mhpmeventN
(CSR 0x320 + N) to select what counter N accumulates.
Firmware or a privileged shim configures the mapping; U-mode can read
the resulting counts via pmu_read but typically cannot write
mhpmeventN without M-mode delegation.
Variants§
TfmaWaitTenb = 18
Cycles spent waiting for TenB load to complete before TensorFMA32. Measures the B-load serialisation cost; high values indicate that the crossbar or DRAM is the bottleneck for B tiles.
(PRM Chapter 8, event code 18.)
Trait Implementations§
impl Copy for PmuEvent
impl Eq for PmuEvent
impl StructuralPartialEq for PmuEvent
Auto Trait Implementations§
impl Freeze for PmuEvent
impl RefUnwindSafe for PmuEvent
impl Send for PmuEvent
impl Sync for PmuEvent
impl Unpin for PmuEvent
impl UnsafeUnpin for PmuEvent
impl UnwindSafe for PmuEvent
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more