Struct esp8266::spi1::spi_ctrl2::R [−][src]
pub struct R(_);Expand description
Register SPI_CTRL2 reader
Implementations
Bits 28:31 - spi_cs signal is delayed by 80MHz clock cycles
Bits 26:27 - spi_cs signal is delayed by spi_clk. 0: zero; 1: half cycle; 2: one cycle
Bits 23:25 - MOSI signals are delayed by 80MHz clock cycles
Bits 21:22 - MOSI signals are delayed by spi_clk. 0: zero; 1: half cycle; 2: one cycle
Bits 18:20 - MISO signals are delayed by 80MHz clock cycles
Bits 16:17 - MISO signals are delayed by spi_clk. 0: zero; 1: half cycle; 2: one cycle
Methods from Deref<Target = R<SPI_CTRL2_SPEC>>
Trait Implementations
Performs the conversion.