Struct esp8266::spi1::spi_clock::R [−][src]
pub struct R(_);Expand description
Register SPI_CLOCK reader
Implementations
Bit 31 - In the master mode, 1: spi_clk is eqaul to 80MHz, 0: spi_clk is divided from 80 MHz clock.
Bits 18:30 - In the master mode, it is pre-divider of spi_clk.
Bits 12:17 - In the master mode, it is the divider of spi_clk. So spi_clk frequency is 80MHz/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)
Bits 6:11 - In the master mode, it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode, it must be 0.
Bits 0:5 - In the master mode, it must be eqaul to spi_clkcnt_N. In the slave mode, it must be 0.
Methods from Deref<Target = R<SPI_CLOCK_SPEC>>
Trait Implementations
Performs the conversion.